KR100853153B1 - A digital broadcasting receiver - Google Patents

Abstract

A digital broadcasting receiver is provided to enable a converter to convert a signal, outputted in an SPI(Serial Peripheral Interface) method, into a signal in a TS interface method between a baseband unit and a multimedia unit to process data in the multimedia unit regardless of an output method of the baseband unit, thereby connecting the baseband unit for transmitting the data in the SPI method without a change of the multimedia unit supporting only an existing TS method. A digital broadcasting receiver includes an RF(Radio Frequency) unit(100), a baseband unit(110), a converter(120), and a multimedia unit(130). The baseband unit receives a broadcasting signal from the outside to output a sync signal, n-bit data, and a start signal. The converter includes a sync signal generation module(122), a buffer unit(124), and a valid signal generation module(126). The sync signal generation module generates a clock per n clocks of the sync signal outputted from the baseband unit to generate a TS(Transport Stream) interface sync signal. The buffer unit stores the n-bit data outputted from the baseband unit temporarily and outputs the temporarily stored data to n pins. The valid signal generation module sets a point of time when 188xn-bit data is inputted to the buffer unit from the start point of a start signal outputted from the baseband unit to a valid section to generate a TS interface valid signal. The multimedia unit reproduces data outputted from the buffer unit on the basis of the generated TS interface sync signal and valid signal, and the start signal outputted from the baseband unit.

Description

Digital broadcast receiver {A DIGITAL BROADCASTING RECEIVER}

1 is a diagram illustrating types of signals input by a general TS interface method.

2 is a diagram illustrating types of signals input by a general SPI interface method.

3 is a block diagram illustrating the inside of a digital broadcast receiver to which a transmission mode conversion apparatus according to an embodiment of the present invention is applied.

<Description of the code | symbol about the principal part of drawing>

100: RF section 110: base band section

120: converter 122: synchronization signal generation module

124: buffer unit 126: valid signal generation module

130: multimedia unit

The present invention relates to a digital broadcast receiver, and more particularly, to a digital broadcast receiver for converting a signal output by a SPI (Serial Peripheral Interface) method to a transport stream (TS) interface method.

DMB broadcasts received by digital broadcast receivers are largely divided into terrestrial DMB and satellite DMB. In this way, the inside of the terminal receiving the terrestrial DMB and satellite DMB can be largely divided into three. That is, the DMB receiving terminal is composed of an RF portion for detecting a broadcast signal, a baseband portion for separating and processing the received broadcast signal, and a multimedia chip portion constituting a screen to be displayed on an LCD window.

In general, in the baseband portion, a signal input to a multimedia chip is configured according to a standard. The signal standard used in the DMB uses a TS (Transport Stream) interface, that is, a parallel transmission scheme.

The TS interface, which is a parallel transmission method, is composed of a synchronization signal, a data signal, a start signal, a valid signal, and an error signal, as shown in FIG. Data constituting the screen is contained in a data signal, which is input to the multimedia chip in accordance with the synchronization signal. The start signal informs the start of the data, and the valid signal means a valid data section.

Each signal in the TS interface having such a configuration enters the multimedia chip in parallel, that is, eight data enter eight paths in one synchronization. For example, 8 bits (1 byte) of data are input to the multimedia chip at one synchronization, and the multimedia chip processes the data in packet units. Here, since the packet unit means 188 bytes of data, the valid signal means the data portion of one packet of 188 bytes.

Here, the DMB receiving terminal receives a packet and then receives data again for receiving a seamless broadcast. In the multimedia chip part, video signals and audio signals to be outputted on the LCD screen are composed of signals inputted for the TS interface. Therefore, since the existing multimedia chips operate according to the TS interface, they only need to send data to the TS interface promised in the baseband portion.

However, as the baseband makers diversify and increase in recent years, there are cases where a serial chip is sent to a multimedia chip through a serial peripheral interface (SPI). Since the SPI data transmission standard is a serial transmission method, data is transmitted one bit to one synchronization signal, and the configuration of the transmitted signal is shown in FIG. 2.

However, in general, since the DMB receiving terminal is composed of a multimedia chip adapted to the TS interface, there is a problem in that the data does not operate properly when the data comes in through the SPI.

SUMMARY OF THE INVENTION An object of the present invention is to solve such a problem of the prior art, and includes a conversion unit for converting a signal output by the SPI method to the TS interface method between the baseband unit and the multimedia unit, thereby providing There is provided a digital broadcast receiver capable of processing data regardless of the multimedia unit.

In order to achieve the above object, the present invention provides a baseband unit for receiving a digital multimedia broadcasting signal from the outside and outputting a synchronization signal, n-bit data and a start signal, and n clocks of the synchronization signal output from the baseband unit. A synchronization signal generation module generating one clock per TS to generate a TS interface synchronization signal, a buffer unit for temporarily storing n bits of data output from the baseband unit and then outputting the temporarily stored data to n pins; And a valid signal generation module configured to generate a TS interface valid signal by setting a valid interval from a start point of a start signal output from the baseband unit until 188 × n bits of data are input to the buffer unit, and the generated TS interface. Sync signal, valid signal and start output from the baseband section It includes a multimedia unit for reproducing the data output from the buffer unit based on the signal.

Hereinafter, an apparatus for converting a transmission scheme in a digital broadcast receiver according to the present invention will be described in detail with reference to the accompanying drawings.

3 is a block diagram illustrating the inside of a digital broadcast receiver to which a transmission mode conversion apparatus according to an embodiment of the present invention is applied.

Referring to FIG. 3, the broadcast receiver includes an RF unit 100 for frequency converting a digital multimedia broadcasting signal received through an antenna (not shown) into an IF signal, and an IF signal input from the RF unit 100 in an SPI manner. The baseband unit 110 to modulate, the conversion unit 120 for converting the SPI signal input from the baseband unit 110 to the TS method and the multimedia unit for reproducing the signal output from the conversion unit 120 130. Here, the conversion unit 120 is composed of a synchronization signal generation module 122, a buffer unit 124, and a valid signal generation module 126.

The baseband unit 110 is connected to the converter 120 by four pins, modulates the IF signal, and outputs an SPI type synchronization signal, a start signal, a data signal, and a valid signal through each pin. Output is done by using pin, that is, SPI method.

The synchronization signal generation module 122 of the conversion unit 120 generates one clock per n (eg, eight) clocks from the SPI-based synchronization signal input from the baseband unit 110 and is suitable for TS. An interface synchronization signal is generated. For example, when the synchronization signal of the SPI is input, the count value is incremented by "1" per clock, and when the count value is "8", it is initialized after generating one clock. For example, the counter.

As another example of the synchronization signal generation module 122, period information of the synchronization signal input from the baseband unit 110 is extracted, and a synchronization signal obtained by converting the extracted period by eight times, that is, a TS interface synchronization signal, is generated.

As another example of the synchronization signal generation module 122, the clock frequency information of the synchronization signal input from the baseband unit 110 is extracted, and a synchronization signal, that is, a TS interface synchronization signal, is reduced by eight times.

The buffer unit 124 temporarily stores n bits of data among the data signals input by the SPI method, and then transmits the data to the multimedia unit 130 through a TS interface method, for example, n pins.

The valid signal generation module 126 is a valid interval (“1”) while a 188 × n bit of data enters the buffer unit 124 at the start point (“1” time point) of the start signal input from the baseband unit 110. TS interface valid signal is generated by setting an invalid period (“0”) from the valid period to the restart point of the start signal.

In the example of the valid signal generation module 126, the count operation is performed for each start point of the start signal, the count value is increased each time data is output from the buffer unit 124, and the valid value is set until the count value becomes 188. Thereafter, a counter for generating a TS interface valid signal by setting the restart point of the start signal to an invalid period and setting the start point of the valid period again may be used.

In another example of the valid signal generation module 126, the count operation is performed for each start point of the start signal to increase the count value each time data is input to the buffer unit 124, and the valid period is continued until the count value becomes 188 × n. A counter that generates a TS interface valid signal by setting up to the restart point of the start signal and then setting it back to the start point of the valid section after setting to the restart point of the start signal.

The converter 120 passes the start signal and the error signal of the SPI method as it is and outputs it to the multimedia unit 130.

The multimedia unit 130 receives n pins from the buffer unit 124 based on the TS interface synchronization signal generated by the synchronization signal generation module 122, the TS interface valid signal and the start signal generated by the valid signal generation module 126. By processing the data received through the digital multimedia broadcasting signal is reproduced.

According to the present invention, a method of outputting from the baseband unit 110 is provided between the baseband unit 110 and the multimedia unit 130 by providing a conversion unit 120 for converting a signal output by the SPI method to the TS interface method. Regardless, the multimedia unit 130 may process data.

The present invention is not limited to the above-described preferred embodiments, and various modifications can be made by those skilled in the art without departing from the gist of the invention as claimed in the claims. Such changes will fall within the scope of the claims.

As described above, the present invention includes a conversion unit for converting a signal output by the SPI method between the baseband unit and the multimedia unit to the TS interface method, so that the multimedia unit can process data regardless of the method output from the baseband unit. It is possible to connect the baseband unit for transmitting data in the SPI method without changing the multimedia unit supporting only the existing TS method.

Claims (6)

A baseband unit for receiving a digital multimedia broadcasting signal from the outside and outputting a synchronization signal, n-bit data, and a start signal; A synchronization signal generation module for generating one clock per n clocks of the synchronization signal output from the baseband unit and generating a TS interface synchronization signal; A buffer unit for temporarily storing n bits of data output from the baseband unit and then outputting the temporarily stored data to n pins; A valid signal generation module configured to generate a TS interface valid signal by setting a valid interval from a start point of a start signal output from the baseband part until 188 × n bits of data are input to the buffer part; A multimedia unit for reproducing data output from the buffer unit based on the generated TS interface synchronization signal, a valid signal and a start signal output from the baseband unit Digital broadcast receiver comprising a. The method of claim 1, The synchronization signal generation module, When the synchronization signal is input from the baseband unit, the count value per clock is incremented by "1", and when the count value is "n", the digital broadcast is generated after generating one clock. receiving set. The method of claim 1, The synchronization signal generating module extracts period information of a synchronization signal output from the baseband unit, and converts the extracted period by eight times to generate the TS interface synchronization signal. The method of claim 1, And the synchronization signal generation module extracts clock frequency information of the synchronization signal output from the baseband unit and generates the TS interface synchronization signal in which the extracted frequency information is reduced by eight times. The method of claim 1, The valid signal generation module counts at each start point of the start signal output from the baseband unit, increases the count value each time data is output from the buffer unit, and makes a valid interval until the count value reaches 188. And a counter configured to generate the TS interface valid signal. The method of claim 1, The valid signal generation module counts at each starting point of the start signal output from the baseband unit, increases the count value each time data is input to the buffer unit, and is effective until the count value becomes 188 × n. And a counter for setting the interval to generate the TS interface valid signal.

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