KR100847332B1 - Liquid crystal display having reduced flicker - Google Patents

Abstract

A liquid crystal display (LCD) with reduced flicker includes a plurality of signal lines, a plurality of scanning lines and a plurality of pixels. Each pixel includes a liquid crystal cell with a pixel electrode, a storage capacitor and a switching transistor. The switching transistor includes a gate electrode connected to one of the scanning lines, a drain electrode connected to one of the signal lines, and a source electrode connected to the pixel electrode. An overlap region is present between the gate electrode and the source electrode. The area of the overlapping area is increased by increasing a distance between an input terminal of the scanning line corresponding to the overlapping area and the pixel electrode corresponding to the overlapping area.

Flicker, liquid crystal, display, pixel, signal line, scanning, transistor, switching

Description

 Liquid crystal display having reduced flicker

1 is a schematic diagram of a conventional TFT-LCD.

FIG. 2 is a circuit diagram of the TFT-LCD shown in FIG. 1.

3 is a top view of the pixel array of the TFT-LCD shown in FIG.

4 is a top view of a pixel array of a TFT-LCD according to the present invention.

5 is a top view of a pixel array of another TFT-LCD according to the present invention.

TECHNICAL FIELD The present invention relates to liquid crystal displays, and more particularly, to liquid crystal displays with reduced flicker.

Thin film transistor displays, such as thin film transistor liquid crystal displays (TFT-LCDs), have other arrangements, such as capacitors and bonding pads, arranged in a matrix as switches for driving liquid crystal molecules that produce brilliant images. Many thin film transistors are used with the elements. Advantages of the TFT-LCD over conventional CRT monitors include better portability, lower power consumption and lower radiation. Therefore, the TFT-LCD is widely used in various portable products such as notebooks, personal data assistants (PDAs), electronic toys, and the like.

1 and 2, FIG. 1 is a schematic diagram of a conventional TFT-LCD 10. As shown in FIG. 2 is an equivalent circuit diagram of the TFT-LCD 10. The TFT-LCD 10 includes a scanning line control circuit 12, a signal line control circuit 14, and a pixel array 16 having a plurality of pixels connected to the scanning lines. For example, pixel A, pixel B and pixel C are connected to a common scanning line. As shown in FIG. 2, the pixel 20 includes a liquid crystal cell LC and a thin film transistor TFT connected to a common counter electrode CE, the thin film transistor having a gate connected to a scanning line G ₀ . An electrode, a drain electrode connected to the signal line D ₀ , and a source electrode connected to the pixel electrode of the liquid crystal cell. In addition, the pixel 20 includes a storage capacitor SC connected between the liquid crystal cell and the scanning line G ₁ . The storage capacitor is used to reduce the voltage variation of the liquid crystal cell due to current leakage and thus help the liquid crystal cell store charges.

As shown in FIG. 2, light passing through the pixels changes according to a voltage applied to the liquid crystal cell. By changing the voltage applied to the liquid crystal cell, the amount of light passing through each pixel can be changed so that the TFT-LCD can display predetermined images. The voltage applied to the liquid crystal cell is the difference between the voltage of the common counter electrode and the voltage of the pixel electrode. When the thin film transistor is turned off, the pixel electrode is in a floating state. If any fluctuation occurs in the voltages of the electrical elements around the pixel electrode, the fluctuation will cause the voltage of the pixel electrode to deviate from its desired voltage. The deviation of the voltage of the pixel electrode is referred to as a penetration voltage V _FD represented by Equation 1.

Where C _LC is the capacitance of the liquid crystal cell LC, C _SC is the capacitance of the storage capacitor SC, C _GS is the capacitance between the source electrode and the gate electrode of the thin film transistor, and ΔV _G is the gate. It is the magnitude of the pulse voltage applied to the electrode.

In general, adjusting the voltage of the common counter electrode may compensate for the through voltage. However, since the resistance and capacitance of the scanning line round the falling edge of the pulse voltage applied to the gate electrode, the through voltage of the pixel decreases as the distance between the scanning line control circuit and the pixel increases. For example, as shown in FIG. 1, the through voltage of the pixel A is greater than the through voltage of the pixel B, wherein the through voltage of the pixel B is greater than the through voltage of the pixel C (that is, (V _FD ) _A > (V _FD ) _B > (V _FD ) _C , where (V _FD ) _A , (V _FD ) _B and (V _FD ) _C represent the penetration voltages of the pixels A, B, C, respectively. ). Therefore, it is difficult to compensate the through voltages for all the pixels by adjusting the voltage of the common counter electrode. Therefore, it is difficult to provide a flicker-free TFT-LCD.

The method disclosed in US Pat. No. 6,028,650 attempts to solve the above problem. Referring to FIG. 3, FIG. 3 is a top view of the pixel array 30 of the TFT-LCD 10. The pixel array 30 corresponds to the scanning lines 32 and 32a, the signal lines 34a, 34b, and 34c connected to the scanning line control circuit DR1 and the pixels A, B, and C shown in FIG. 1. Pixels A, B, and C. The pixels A, B, C each comprise thin film transistors Q _A , Q _B , Q _C and their corresponding liquid crystal cells. Gate electrodes of the thin film transistors Q _A , Q _B , Q _C are connected to the scanning line 32. Drain electrodes of the thin film transistors Q _A , Q _B , and Q _C are connected to the signal lines 34a, 34b, and 34c, respectively. Source electrodes of the thin film transistors Q _A , Q _B and Q _C are respectively connected to the pixel electrodes 38a, 38b and 38c of the liquid crystal cells.

(V_FD)_B

(V_FD)_C).To form the pixel array 30, a first patterned conductive layer, which is used as scanning lines 32 and 32a, is formed on a substrate (not shown). Next, an insulating layer and a semiconductor layer are added sequentially. Then, a second patterned conductive layer used as signal lines 34a, 34b, 34c is deposited on the semiconductor layer. Finally, a transparent conductive layer is deposited to form pixel electrodes 38a, 38b, 38c of pixels A, B, and C. The overlapping area 40a of the scanning line 32a and the pixel electrode 38a is a storage capacitor of the pixel A. Similarly, overlapping regions 40b and 40c are storage capacitors of pixels B and C. The capacitances of the storage capacitors of pixels A, B, C are represented by (C _SC ) _A , (C _SC ) _B , (C _SC ) _C. The area of the overlapping area 40a is larger than the area of the overlapping area 40b, and the area of the overlapping area 40b is larger than the area of the overlapping area 40c. As a result, (C _{SC) A} is larger than (C _SC) greater than _B (C _{SC) B} is _{(C SC)} C. Thus, the through voltages of pixels A, B, C, represented by (V _FD ) _A , (V _FD ) _B , (V _FD ) _C , are approximately equal (ie, (V _FD ) _A

(V _FD ) _B

(V _FD ) _C ).

Briefly, the above method adjusts the capacitances of the storage capacitors to compensate for the through voltages of all the pixels. The further the storage capacitor is from the scanning line control circuit, the smaller its capacitance. As a result, it is difficult for such storage capacitors with low capacitance to help the liquid crystal cells retain charges. In addition, the closer the storage capacitor is to the scanning line control circuit, the larger its capacitance, and therefore, the width of the scanning line must be formed wider to form the storage capacitor. However, the aperture ratio of the LCD device will decrease as the width of the scanning line increases.

The technical problem to be solved by the present invention is to provide a liquid crystal display (LCD) having a reduced flicker in order to solve the above problem.

In order to achieve the above object, a liquid crystal display (LCD) having reduced flicker according to the present invention includes a plurality of signal lines, a plurality of scanning lines and a plurality of pixels. Each pixel includes a liquid crystal cell with a pixel electrode, a storage capacitor and a switching transistor. The switching transistor includes a gate electrode connected to one of the scanning lines, a drain electrode connected to one of the signal lines, and a source electrode connected to the pixel electrode. An overlap region is present between the gate electrode and the source electrode. The area of the overlapping area is increased by increasing the distance between the input terminal of the scanning line corresponding to the overlapping area and the pixel electrode corresponding to the overlapping area.

It is advantageous for the claimed invention to adjust the capacitance between the gate electrode and the source electrode of the thin film transistor by changing the areas of the overlapping regions such that the penetration voltages of all pixels are approximately equal. No change occurs in the width of the storage capacitors and the scanning lines. Thus, the storage capacitors can help the liquid crystal cells retain charges effectively. The aperture ratio of the LCD device can also be improved.

These and other objects of the claimed invention will no doubt become apparent to those skilled in the art after reading the following detailed description of the preferred embodiment, which is described with the drawings.

Referring to FIG. 4, FIG. 4 is a top view of a pixel array of a TFT-LCD according to the present invention. As shown in FIG. 4, the pixel array 50 includes a scanning line 52 electrically connected to the scanning line control circuit DR1, signal lines 54a, 54b, 54c and pixels A shown in FIG. 1, Pixels A, B, and C corresponding to B and C, respectively. The pixels A, B, C each comprise thin film transistors T _A , T _B , T _C and their corresponding liquid crystal cells. Gate electrodes of the thin film transistors T _A , T _B , and T _C are connected to the scanning line 52. Drain electrodes of the thin film transistors T _A , T _B , and T _C are connected to the signal lines 54a, 54b, and 54c, respectively. Source electrodes of the thin film transistors T _A , T _B , and T _C are respectively connected to pixel electrodes 58a, 58b, 58c of the liquid crystal cells. Region 60a (shown as a slash) is an overlapping region of the scanning line 52 and the source electrode 56a. Region 60b (shown with a slash) is an overlapping region of the scanning line 52 and the source electrode 56b. Region 60c (shown with a slash) is an overlapping region of the scanning line 52 and the source electrode 56c. Furthermore, the gate electrodes of the thin film transistors T _A , T _B , T _C include blocks 57 a, 57 b, 57 _c located in overlapping regions 60 a, 60 b, 60 _c . The area of the block 57a is smaller than the area of the block 57b, and the area of the block 57b is smaller than the area of the block 57c. Therefore, the area of the overlapping area 60a is smaller than the area of the overlapping area 60b, and the area of the overlapping area 60b is smaller than the area of the overlapping area 60c. A pair of protective structures 62a are provided to prevent the block 57a from being separated from the gate electrode. The protective structures 62a are located on either side of the block 57a or in the overlapping area 60a. Similarly, protective structures 62b and 62c are provided to prevent the blocks 57b and 57c from being separated from the gate electrodes.

In order to form the pixel array 50, a first patterned conductive layer used as the scanning line 52 is formed on a substrate (not shown). Then, an insulating layer and a semiconductor layer are sequentially deposited on the scanning line 52 and the substrate. A second patterned conductive layer used as signal lines 54a, 54b, 54c is deposited on the semiconductor layer. Finally, a transparent conductive layer is deposited to form pixel electrodes 58a, 58b, 58c of pixels A, B, and C.

See Equation 1. In general, both C _SC and C _LC are much larger than C _GS (ie C _SC , C _LC >> C _GS ). Therefore, Equation 1 can be rewritten as follows.

(V_FD)_B

(V_FD)_C 이다. 즉, 픽셀들 A, B, C의 관통 전압들은 상기 조건 (C_GS)_A<(C_GS)_B <(C_GS)_C 이 달성되는 한 대략 동일하다. 따라서, 본 발명은 상기 게이트 전극들 이외에 블록들(57a, 57b, 57c)을 추가하고 있다. 상기 중복 영역(60a)의 면적은 상기 중복 영역(60b)의 면적보다 더 작고, 상기 중복 영역(60b)의 면적은 상기 중복 영역(60c)의 면적보다 더 작다. 유사한 방식으로, (C_GS)_A는 (C_GS)_B보다 더 작고, (C_GS )_B는 (C_GS)_C 보다 더 작다. 따라서, 픽셀들 A, B, C의 관통 전압들은 대략 동일하다(즉, (V_FD)_A

(V_FD)_B

(V_FD)_C).See Equation 2. With respect to pixels A and B shown in FIG. 4, (C _GS ) _A = (C _GS ) _B = (C _GS ) _C , (C _SC ) _A = (C _SC ) _B = (C _SC ) _C and ( When C _LC ) _A = (C _LC ) _B = (C _LC ) _C , the through voltages of pixels A, B, C are (V _FD ) _A > (V _FD ) _B > (V _FD ) _C. However, (C _GS ) _A <(C _GS ) _B <(C _GS ) _C , (C _SC ) _A = (C _SC ) _B = (C _SC ) _C and (C _LC ) _A = (C _LC ) _B = (C _LC ) _C , (V _FD ) _A

(V _FD ) _B

(V _FD ) _C. That is, the through voltages of pixels A, B, C are approximately equal as long as the condition (C _GS ) _A <(C _GS ) _B <(C _GS ) _C is achieved. Therefore, the present invention adds blocks 57a, 57b, and 57c in addition to the gate electrodes. The area of the overlapping area 60a is smaller than the area of the overlapping area 60b, and the area of the overlapping area 60b is smaller than the area of the overlapping area 60c. In a similar manner, (C _{GS) A} is (C _GS) smaller than _B, (C _{GS) B} is smaller than _{(C GS)} C. Thus, the through voltages of pixels A, B and C are approximately equal (i.e. (V _FD ) _A

(V _FD ) _B

(V _FD ) _C ).

In the first embodiment of the present invention, there are 1024 pixels in the pixel array 50 which are divided into a plurality of regions. Blocks added next to the gate electrodes in a common area have approximately the same areas. The area of the block in the first area is larger than the area of the block in the second area adjacent to the first area by a predetermined value. For example, as shown in FIG. 4, since the region I is next to the region II, the area of the block 57b is larger than the area of the block 57a by a predetermined value. Similarly, since the area II is next to the area III, the area of the block 57c is larger than the area of the block 57b by a predetermined value. In addition, the shapes of the blocks 57a, 57b, 57c need not necessarily be rectangular. They may be of any shape as long as the area of the overlapping area 60a is smaller than the area of the overlapping area 60b, and the area of the overlapping area 60b is smaller than the area of the overlapping area 60c.

(V_FD)_B

(V_FD)_C). 상기 블록들(59a, 59b, 59c)은 상기 중복 영역(60a)의 면적이 상기 중복 영역(60b)의 면적보다 더 작은 한 어떤 모양일 수 있고, 상기 중복 영역(60b)의 면적이 상기 중복 영역(60c)의 면적보다 더 작다는 것은 다시 주목되어야 한다.See FIG. 5. 5 is a top view of a pixel array of another embodiment of a TFT-LCD according to the present invention. As shown in FIG. 5, the source electrodes of the thin film transistors T _A , T _B , T _C are blocks 59a, 59b located in the overlap regions 60a, 60b, 60c (shown with a slash). , 59c). The area of the block 59a is smaller than the area of the block 59b, and the area of the block 59b is smaller than the area of the block 59c. Therefore, the area of the overlapping area 60a is smaller than the area of the overlapping area 60b, and the area of the overlapping area 60b is smaller than the area of the overlapping area 60c. In this way, (C _{GS) A} is (C _GS) smaller than _B, (C _{GS) B} is smaller than _{(C GS)} C. Thus, the through voltages of pixels A, B and C are approximately equal (i.e. (V _FD ) _A

(V _FD ) _B

(V _FD ) _C ). The blocks 59a, 59b, 59c may have any shape as long as the area of the overlapping area 60a is smaller than the area of the overlapping area 60b, and the area of the overlapping area 60b is the overlapping area. It should be noted again that it is smaller than the area of 60c.

Furthermore, in both embodiments, the pixel array 50 may be divided into 1024 regions, each region containing only one pixel. In this way, the through voltages of all the pixels are exactly the same.

Briefly, the present invention adjusts the capacitance C _GS between the gate electrode and the source electrode of the thin film transistors such that the through voltages of all pixels are approximately equal. In order to adjust the capacitance C _GS , blocks having a variable area are added to the gate electrodes or the source electrodes. The area of the overlapping region of the gate electrode and the source electrode is increased by increasing the distance between the input terminal of the scanning line corresponding to the overlapping region and the pixel corresponding to the overlapping region. Thus, the capacitance C _GS can be effectively adjusted.

Compared with the prior art, the present invention adjusts the capacitance C _GS by changing the areas of overlapping regions of the gate electrode and the source electrode such that the through voltages of all pixels are approximately equal. Therefore, a liquid crystal display with reduced flicker is provided. No changes occur in the width of the storage capacitors and the scanning lines. Thus, the storage capacitors can help the liquid crystal cells retain charge. The aperture ratio of the LCD device can also be improved.

It will be readily appreciated by those skilled in the art that many variations and modifications of the apparatus may be made while maintaining the teachings of the present invention. Accordingly, the above disclosure should be considered as limited only by the boundaries and limitations of the appended claims.

Claims (8)

A plurality of signal lines; A plurality of scanning lines; And Includes a plurality of pixels, Each of the pixels includes a liquid crystal cell having a pixel electrode and a storage capacitor and a switching transistor, wherein the switching transistor includes a gate electrode connected to a scanning line, a drain electrode connected to a signal line, and a source electrode connected to the pixel electrode, The area of the overlapping region of the gate electrode and the source electrode is increased by increasing the distance between the input terminal of the scanning line corresponding to the overlapping region and the pixel corresponding to the overlapping region, The gate electrode includes a first block located within the overlap region, the area of the first block being increased by increasing the distance, And the gate electrode further comprises a pair of protective structures located on both sides of the first block to prevent the first block from being separated from the gate electrode. delete The liquid crystal display of claim 1, wherein the source electrode includes a second block located within the overlapping area, and the area of the second block is increased by increasing the distance. delete A scanning line connected to the scanning line control circuit; A first region of the scanning line including at least one first transistor having a first gate electrode connected to the scanning line, a first drain electrode connected to a first signal line, and a first source electrode connected to a first pixel electrode A first region in which a first overlapping region exists between the first gate electrode and the first source electrode; And The first region of the scanning line including at least one second transistor having a second gate electrode connected to the scanning line, a second drain electrode connected to a second signal line, and a second source electrode connected to a second pixel electrode A second region adjacent to the second region, the second region having a second overlapping region between the second gate electrode and the second source electrode; The first area is located between the scanning line control circuit and the second area, the area of the second overlapping area is greater than the area of the first overlapping area, The first gate electrode includes a first block located in the first overlapping region, the second gate electrode includes a second block located in the second overlapping region, and the area of the second block is the first block. Larger than the area of the block, And the first gate electrode further comprises a pair of protective structures located on both sides of the first block to prevent the first block from being separated from the first gate electrode. delete delete 6. The method of claim 5, wherein the first source electrode comprises a third block located within the first overlapping region, and the second source electrode comprises a fourth block located within the second overlapping region, and the fourth block The area of the liquid crystal display, characterized in that larger than the area of the third block.

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