KR100815912B1 - Liquid crystal display device - Google Patents

Abstract

The present invention relates to a liquid crystal display device that allows the charges in the liquid crystal panel to be completely discharged when the power supply of the liquid crystal display device is turned off. A plurality of formed scanning lines and a plurality of signal lines formed in succession in the column direction, a plurality of first antistatic means connected to each of the scan lines, a plurality of second antistatic means connected to the respective signal lines, and a plurality of 1 is a scan line short interconnection for electrically binding the antistatic means, a signal line short interconnection for electrically binding the plurality of second antistatic means, a grounding means for inducing a potential in the pixel region to escape to a ground state when the power is turned off; Third antistatic means and the signal connected between the scan line short circuit and the grounding means; And a fourth anti-static means connected between the short-circuit wiring and the grounding means is characterized in that formed.

Description

Liquid crystal display {LIQUID CRYSTAL DISPLAY DEVICE}

1 is a perspective view of a conventional liquid crystal panel.

2 is a cross-sectional view of a conventional thin film transistor.

3 is a structural diagram of a liquid crystal panel having a conventional antistatic circuit.

Figure 4 is a conventional antistatic circuit diagram.

5 is a structural diagram of a liquid crystal panel according to a first embodiment of the present invention.

6 is a structural diagram of a liquid crystal panel according to a second embodiment of the present invention.

The present invention relates to a liquid crystal display device, and more particularly, to a liquid crystal display device capable of improving initial image quality.

As the information society develops, the demand for display devices is increasing in various forms, and in recent years, the LCD (Lipuid Crystal Display Device), PDP (Plasma Display Panel), ELD (Electro Luminescent Display), and VFD (Vacuum Fluorescent) Various flat panel display devices such as displays have been studied, and some of them are already used as display devices in various devices.                         

Among them, LCD (hereinafter referred to as liquid crystal display) is most commonly used as a substitute for a cathode ray tube for mobile image display devices due to its excellent image quality, light weight, thinness, and low power consumption. In addition to mobile applications such as notebook computers, various monitors have been developed.

Such a liquid crystal display device is composed of two substrates coupled to face each other and a liquid crystal material which is injected between the two substrates to generate a phase transition according to a change in temperature or a change in concentration.

The liquid crystal is a material having an intermediate property between a liquid and a solid having a liquidity and a long range order of the solid. In other words, the solid crystal melts and becomes an intermediate state rather than a solid crystal or liquid before it becomes a liquid. When light is applied to such liquid crystals or an electric field or magnetic field is added, birefringence peculiar to optically anisotropic crystals is exhibited, and both liquid and crystal are exhibited within a certain temperature range.

Such a liquid crystal display device is composed of a liquid crystal panel for displaying an image and a driver IC for generating an image signal. The detailed structure of the liquid crystal panel is shown in FIG.

First, a plurality of scan lines 14 and a plurality of signal lines 16 are formed in a matrix form on the first substrate 21, and pixel electrodes 26 and thin film transistors 13 are formed at intersections thereof. It is. The common substrate 24 and the color filter 23 are formed on the second substrate 22 facing the first substrate 21, and the first substrate 21 and the second substrate 22 are formed on the second substrate 22. The liquid crystal 25 is inject | poured in between.

The pixel electrode 26 facing the common electrode 24 with the liquid crystal 25 therebetween serves as a pixel of the liquid crystal display device. In addition, a polarizing plate 20 is provided on the outer surfaces of the first substrate 21 and the second substrate 22 in accordance with the alignment direction of the liquid crystal 25 to make the transmission direction of external light constant.

As shown in FIG. 2, the thin film transistor 13 includes a gate electrode 30 made of metal such as aluminum, chromium, and molybdenum, and a source electrode 32 and drain electrode 33 made of metal such as aluminum, chromium, and molybdenum. And a semiconductor layer 34 and an impurity semiconductor layer 36. The gate electrode 30 is connected to the scan line 14 shown in FIG. 1, the source electrode 32 is connected to the signal line 16 shown in FIG. 1, and the drain electrode 33 is It is connected to the pixel electrode 26. In the thin film transistor 13 having the above structure, when a scan voltage is applied to the gate electrode 30 through the scan line 14, a signal voltage flowing through the signal line 16 is transferred from the source electrode 32 to the drain electrode 33. As a result, the semiconductor layer 34 is applied to the semiconductor layer 34.

When a signal voltage is applied to the source electrode 32, a signal voltage is applied to the pixel electrode 26 connected to the source electrode 32 to generate a voltage difference between the pixel electrode 26 and the common electrode 24 of the pixel. do. Then, due to the voltage difference, the molecular arrangement of the liquid crystal 25 existing between the pixel electrode 26 and the common electrode 24 is changed, and the light transmittance of the pixel is changed because the molecular arrangement of the liquid crystal 25 is changed. This change causes a visual difference between the pixel to which the data voltage is applied and the pixel to which the data voltage is not applied. As the pixels having such visual differences are gathered, the liquid crystal display serves as a display device.

In manufacturing such a liquid crystal display device, there is a possibility that high-pressure static electricity is generated in the manufacturing environment. Since various wires, thin film transistors, and the like formed on the liquid crystal panel may be destroyed by such high-pressure static electricity, prevention means are necessary. In the related art, an antistatic circuit is provided on each of the scan line and the signal line, and the antistatic circuit is connected to a common short circuit line.

In addition, the conventional antistatic circuit is improved, and the antistatic circuit formed on the scan line and the antistatic circuit formed on the signal line are stabilized and connected to separate short circuit lines in order to improve detection power in the inspection process of the substrate. Applicant has filed a liquid crystal display device with the Korean Patent Office under the application number 97-00459. The structure of the liquid crystal panel having the conventional antistatic circuit is as shown in FIG. 3.

Scan lines 40 and signal lines 50 are orthogonally formed on the first substrate with an insulating film (not shown) interposed therebetween. Although not shown in the figure at the intersection thereof, a thin film transistor and a pixel electrode are formed. A gate shorting bar 85 is formed at one end of the scan line 40, and a data shorting bar 95 is formed at one end of the signal line 50. In addition, the scan line short circuit 60 is connected to the scan line 40 and the first antistatic circuit 90, and the signal line short circuit 70 is connected to the signal line 50 and the second antistatic circuit 80. Connected via For example, the first and second antistatic circuits 90 and 80 may use a structure such as the equivalent circuit illustrated in FIG. 4.

A first voltage connected between the scan line 40 and the gate short circuit 60 is applied by applying a low level voltage among the scan voltages to drive the thin film transistor to the electrode 60a of the scan line short circuit line 60. The antistatic circuit 90 is stabilized.

In addition, the second antistatic circuit 80 connected between the signal line 50 and the signal line short circuit 70 by applying a voltage equal to the voltage applied to the common electrode to the electrode 70a of the signal line short circuit 70. Stabilize.

On the other hand, the liquid crystal panel according to a method known to those skilled in the art, such as TN mode, In Plane Switching Mode, Ferroelectric Liquid Crystal (FLC) mode, Optically Compensated Birefringence (OCB) mode, etc. The liquid crystal panel may be manufactured by changing.

However, the conventional liquid crystal display has the following problems.

For example, in a liquid crystal panel driven in a twist nematic (TN) mode, when the power supply of the liquid crystal display device is turned off, the voltage applied to the common electrode of the second substrate (upper substrate) is silver ( Ag) Charges slowly exit the PCB through the dot. In addition, the charges applied to the scan line are gradually removed through the antistatic circuit in the liquid crystal panel or through the driver IC.

However, most of the charges applied to the pixel electrode are very slow because they pass through the thin film transistor and the signal line to the driver IC or the antistatic circuit. The exiting level does not fall to the ground level, but has a potential level.

In other words, since the charges of the pixel electrode are most difficult to escape, a potential difference appears between the common electrodes that are quickly escaped, which acts as a DC. Such residual DC voltage causes a phenomenon such as initial afterimage or initial image quality deterioration.

In particular, in the case of the liquid crystal panel driven in the In Plane Switching (IPS) mode, various degradations of image quality are caused by the residual DC voltage.

Accordingly, an object of the present invention is to provide a liquid crystal display device capable of completely discharging the charges in the liquid crystal panel when the power supply of the liquid crystal display device is turned off.

The liquid crystal display device of the present invention for achieving the above object is a substrate, a plurality of scan lines formed continuously in a row direction and a plurality of signal lines formed continuously in a column direction to define a matrix pixel area on the substrate; A plurality of first antistatic means connected to each scan line, a plurality of second antistatic means connected to each signal line, a scan line short circuit electrically coupling the plurality of first antistatic means, and the plurality of first antistatic means 2 a signal line short wiring for electrically binding the antistatic means, a grounding means for inducing a potential in the pixel region to exit to a ground state when the power is turned off, and a third antistatic means connected between the scan line shorting wiring and the grounding means; And a fourth antistatic means connected between the signal line short wiring and the ground means. Characterized in that made.

Hereinafter, exemplary embodiments of the present invention will be described in detail with reference to the accompanying drawings.

5 illustrates a thin film transistor array substrate of a liquid crystal display of the present invention.

As illustrated, a plurality of scan lines 140 and signal lines 150 are orthogonal to define an area of a matrix on an insulating substrate (not shown), and the thin film transistor and the pixel electrode are not shown in the drawing. Is formed. The gate shorting bar 100 is formed at one end of the scan line 140, and the data shorting bar 110 is formed at one end of the signal line 150.

In addition, the scan line short interconnection line 160 is connected to the plurality of scan lines 140 and the plurality of first antistatic circuits 120, and the signal line short interconnection line 170 is connected to the plurality of signal lines 150 and the plurality of signal lines 150. It is connected via the second antistatic circuit 130. A third antistatic means 180 is connected between the scan line short circuit 160 and the grounding means 200, and a fourth antistatic means between the signal line short circuit 170 and the grounding means 200. 190 is connected.

Here, the first to fourth antistatic means 120, 130, 180, 190 use the same device. That is, the first to fourth antistatic means 120, 130, 180, 190 may be formed in the same process.

In other words, the first to fourth antistatic means 120, 130, 180, and 190 are composed of three NMOS transistors shown in FIG. 4 as in the prior art, which will be described below.

First, the first antistatic means 120 may include a first transistor including a first gate and a first source connected to the scan line short circuit 160, a second source and a scan line connected to a first drain of the first transistor. A second transistor including a second gate and a second drain connected to 140, a third gate connected to a contact between the first drain and a second source, a third source connected to the scan line short circuit 160, and The third transistor includes a third drain connected to the scan line 140.

The second antistatic means 130 may include a first transistor including a first gate and a first source connected to the signal line short circuit 170, a second source and a signal line connected to a first drain of the first transistor. A second transistor including a second gate and a second drain connected to the second gate; a third gate connected to a contact between the first drain and the second source; a third source and the signal line connected to the signal line short circuit 170; And a third transistor consisting of a third drain connected to 150.

The third antistatic means 180 may include a first transistor including a first gate and a first source connected to the scan line short circuit 160, a second source connected to a first drain of the first transistor, and the grounding means. A second transistor including a second gate and a second drain connected to the second gate; a third gate connected to a contact between the first drain and the second source; and a third source connected to the scan line short circuit 160; It consists of a third transistor consisting of a third drain connected to the grounding means 200.

The fourth antistatic means includes a first transistor including a first gate and a first source connected to the signal line short circuit 170, a second source connected to a first drain of the first transistor, and the grounding means 200. A second transistor comprising a second gate connected to the second drain and a second drain; a third gate connected to a contact between the first drain and the second source; a third source connected to the signal line short circuit 170 and the grounding means ( And a third transistor configured as a third drain connected to the line 200.

Here, a low level voltage Vg1 among the scan voltages applied to the scan line 140 to drive the thin film transistor is applied to the electrode 170a of the signal line short interconnection line 170 to the scan line 140. The first antistatic means 120 connected between the scan line short circuits 160 is stabilized. In addition, the second antistatic means 130 connected between the signal line 150 and the signal line short circuit 170 by applying a voltage Vcom equal to the voltage applied to the common electrode to the electrode of the signal line short interconnection line 170. Stabilize.

The reason why the low level voltage Vg1 of the scan voltage is applied to the electrode 160a of the scan line short circuit 160 is as follows. In a liquid crystal panel driven frame-by-frame, when an image corresponding to one frame is displayed, a high level voltage of the scanning voltage is applied to all the scanning lines once for a predetermined period, and the predetermined period is controlled in one frame. The remaining time except the voltage Vg1 of the low level of the scan voltage is applied to each scan line. If the scan line is grounded without applying a voltage to the scan line short circuit 160, after a scan voltage is applied to a scan line, a voltage difference of Vg1 is generated at both ends of the first antistatic means 120 connected to the scan line. The insulation state of the prevention means 120 becomes unstable. In this case, when an irregular signal change (for example, noise) or weak static electricity occurs in Vg1 and a potential difference higher than Vg1 occurs immediately at both ends of the first antistatic means 120, the first antistatic means ( There is a fear that the insulation state of 120 may be affected to affect the thin film transistor of another adjacent scan line.

However, when the same voltage as the scan voltage Vg1 is applied to the scan line short circuit 160, the first antistatic means 120 for the rest of the time except for the time when the high level voltage of the scan voltage is applied to the scan line. The both ends of the there is no voltage difference, the insulating state of the first antistatic means 120 is stably preserved. Therefore, a voltage equal to the scan voltage is applied to the scan line short circuit 160.

The reason for applying the same Vcom as the common voltage to the signal line short wiring 170 is as follows. The liquid crystal display device is operated by a change in the light transmittance of liquid crystal molecules generated by a potential difference between the pixel electrode and the common electrode. The common voltage applied to the common electrode always has a constant period and a potential difference, but has a different value according to an image signal to display the pixel voltage applied to the pixel electrode. Therefore, the light transmittance of the liquid crystal molecules changes due to the difference between the pixel voltage and the common voltage. At this time, the pixel voltage cannot be applied to the signal line short interconnection line 170. This is because the pixel voltage is maintained by the signal voltage applied to the signal line after receiving the external image signal, and thus cannot be connected to the signal line short circuit 170 that must be constantly applied with a constant potential.

By the way, the voltage of the waveform similar to the signal voltage is a common voltage without a separate voltage application means connected. Therefore, the common voltage is used as the voltage applied to the signal line short wiring 170 to stabilize the insulating characteristics of the second antistatic means 130.

When the power is turned off after the thin film transistor array is driven as described above, the pixel charges exiting through the signal line 150 are connected to the signal line short circuit through which the common voltage is applied through the fourth antistatic means 190. 170 is connected to form an equipotential with each other. Since the signal line short wiring 170 is connected to the grounding means 200, all potentials in the liquid crystal panel are discharged to the ground state, and the residual potential difference disappears in the liquid crystal panel.

Therefore, when power supply is turned off, it is possible to prevent phenomenon such as initial afterimage and initial image quality deterioration caused by the conventional residual DC voltage.

In the above-described embodiment, although the scan line short wiring and the signal line short wiring are separated and connected to the respective short circuits, the first and second antistatic means are required. However, as shown in FIG. And a fifth antistatic means (210) between the scan line (140) and the signal line short circuit (170) and the grounding means (200) connected to each other. By connecting the same effect as in the first embodiment can be obtained.

On the other hand, the liquid crystal panel according to a method known to those skilled in the art, such as TN mode, In Plane Switching Mode, Ferroelectric Liquid Crystal (FLC) mode, Optically Compensated Birefringence (OCB) mode, etc. The liquid crystal panel may be manufactured by changing.

The present invention described above is not limited to the above-described embodiment and the accompanying drawings, and it is common in the art that various substitutions, modifications, and changes can be made without departing from the technical spirit of the present invention. It will be evident to those who have knowledge of.

The liquid crystal display of the present invention described above has the following effects.

By connecting the signal line short wiring with a separate grounding means, all potentials in the liquid crystal panel escape to the ground state when the power is turned off, so that the residual potential difference in the liquid crystal panel disappears. Therefore, it is possible to prevent the problems with the initial picture quality caused by the conventional residual potential difference.

Claims (7)

Substrate, A plurality of scan lines continuously formed in a row direction and a plurality of signal lines continuously formed in a column direction to define a matrix area of a pixel shape on the substrate; A plurality of first antistatic means connected to the respective scanning lines; A plurality of second antistatic means connected to the respective signal lines; A scan line short interconnection wire for electrically binding the plurality of first antistatic means; A signal line short wiring for electrically binding the plurality of second antistatic means; Grounding means for inducing a potential in the pixel region to escape to a ground state when the power is turned off; Third antistatic means connected between the scan line short circuit and the grounding means; And a fourth antistatic means connected between said signal line short wiring and said grounding means. The method of claim 1, And the first to fourth static electricity preventing means have the same thin film transistor array, respectively. The method of claim 1, The first antistatic means may include a first transistor comprising a first gate and a first source connected to the scan line short interconnection line; A second transistor comprising a second source connected to the first drain of the first transistor, a second gate connected to the scan line, and a second drain; And a third transistor comprising a third gate connected to the contact between the first drain and the second source, a third source connected to the scan line short interconnection, and a third drain connected to the scan line. Device. The method of claim 1, The second antistatic means may include a first transistor comprising a first gate and a first source connected to the signal line short interconnection line; A second transistor comprising a second source connected to the first drain of the first transistor, a second gate connected to the signal line, and a second drain; And a third transistor comprising a third gate connected to the contact between the first drain and the second source, a third source connected to the signal line short interconnection, and a third drain connected to the signal line. Device. The method of claim 1, The third antistatic means may include a first transistor comprising a first gate and a first source connected to the scan line short interconnection line; A second transistor comprising a second source connected to the first drain of the first transistor, a second gate connected to the ground means, and a second drain; And a third transistor comprising a third gate connected to the contact between the first drain and the second source, a third source connected to the scan line short circuit, and a third drain connected to the grounding means. Display. The method of claim 1, The fourth antistatic means may include a first transistor comprising a first gate and a first source connected to the signal line short interconnection line; A second transistor comprising a second source connected to the first drain of the first transistor, a second gate connected to the ground means, and a second drain; And a third transistor comprising a third gate connected to the contact between the first drain and the second source, a third source connected to the signal line short circuit, and a third drain connected to the grounding means. Display. The method of claim 1, And the scan line short line and the signal line short line are separated from each other.

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