KR100811840B1 - method for boosting DC to DC and DC to DC booster for performing the same - Google Patents

Abstract

Disclosed are a DC power boosting method for stabilizing an output voltage by adding or subtracting a switching frequency of a switching circuit according to an output voltage, and enabling all components other than a capacitor element to be configured in one integrated circuit, and a DC power booster for performing the same. The present invention comprises a first switching step of charging a first voltage to the first capacitor by switching the DC power input; A second switching step of switching a DC power supply to charge a second voltage in the second capacitor after alternating with the first switching operation after the first switching step; An output voltage sensing step of sensing a DC voltage output after the second switching step; And a switching control step of outputting a frequency proportional to the DC voltage output in the output voltage sensing step to increase or decrease the switching period of the first switching step and the second switching step according to the output frequency. Include.

Description

Method for boosting DC to DC and DC to DC booster for performing the same}

1 is a circuit diagram showing an example of a DC-DC converter using a conventional PWM control method.

2 is a conceptual diagram illustrating the operation of the double voltage booster of the ground separation method as the first embodiment of the DC power booster according to the present invention.

3 is a conceptual diagram illustrating the operation of the triple voltage booster of the common ground method of another embodiment of the DC power booster according to the present invention.

4 is a block diagram illustrating an operation of an N-times voltage booster having a common ground type in a DC power booster according to the present invention.

FIG. 5 is a circuit diagram illustrating an operation of a double voltage booster of a ground separation method, which is a first embodiment of a DC power booster according to the present invention.

<Explanation of symbols for the main parts of the drawings>

102: current limiter 110: switching unit

120: common ground portion 121: charging capacitor

130: switching control unit 201 ~ 20N: output capacitor

The present invention relates to a DC power boosting method and a DC power booster for performing the same, in particular, by stabilizing the output voltage by adding or subtracting the number of switching of the switching circuit in accordance with the output voltage, all components other than the capacitor element in one integrated circuit The present invention relates to a method for boosting a DC power supply and to a DC power booster for performing the same.

In general, a DC-DC converter converts a DC voltage to a desired DC voltage by reducing or boosting the DC voltage. The DC-DC converter includes a buck converter and a boost converter. The buck converter is a step down converter, which converts a high DC voltage into a relatively low DC voltage, and the boost converter is a step up converter, which is a relatively low DC voltage. This converter converts high DC voltage.

The pulse width modulation (PWM) control method is widely used in a power supply device for supplying a DC load to a load stage by decompressing and boosting a DC power. The PWM control method converts the DC voltage input according to the pulse width (Duty) output from the PWM control unit into a switching method and outputs it with a constant voltage.

Figure 1 shows an example of a DC-DC converter using a conventional PWM control method, DC-DC converter using a PWM control method of the booster circuit unit 11 for boosting the input voltage (Vin), such as a battery And a feedback control unit 12 for detecting an output voltage and outputting a feedback voltage. In addition, a PWM controller 13 is connected to the output side of the feedback controller 12 for controlling the duty ratio of the clock signal Sclk according to the feedback voltage Vfd and providing it to the booster circuit unit 11. The booster circuit part 11 includes a coil L1, a diode D1, a capacitor C1, and a switching element Q1.

In the DC-DC converter using the PWM control scheme configured as described above, the DC voltage input when the switching element Q1 is "ON" by the PWM control unit 13 is accumulated in the coil L1, and the PWM control unit When the switching element Q1 is " OFF " at (13), the input of the DC voltage is cut off to become the power accumulated in the coil L1. At this time, the output voltage is determined according to the pulse width of the PWM pulse signal output from the PWM control unit.

However, in the DC-DC converter using the conventional PWM control method as described above, the switching efficiency is lowered due to switching noise and instantaneous rush current during switching of the switching element, so as to dissipate heat of the coil to accumulate power. There was a problem that the size of the heat dissipation or cooling system attached to the power circuit is increased so that the size of the overall power circuit.

The present invention has been invented to solve the above problems, in the step-up DC-DC converter by supplying a stable DC power to the load only by the operation of the charging capacitor and the switching element to prevent the switching noise applied to the input and output stage, It is an object of the present invention to provide a DC power boosting method and a DC power booster for performing the same.

The present invention for achieving such an object,
A common grounding step of reducing the occurrence of noise by receiving a DC voltage and limiting current, and charging the input DC voltage to the charging capacitor by the switching elements SW1 and SW2;

A first switching step of charging an first voltage to the first capacitor by switching an input DC voltage in cooperation with the switching elements SW1 and SW2 of the common grounding step;
A second switching step of alternately with the first switching operation after the first switching step and switching the input DC voltage in cooperation with the switching elements SW1 and SW2 of the common grounding step to charge the second capacitor with the second voltage;
An output voltage sensing step of sensing a DC voltage output after the second switching step; And
And a switching control step of stabilizing the output power by controlling the output period to be increased in proportion to the DC voltage output in the output voltage sensing step to increase or decrease the switching period of the first switching step and the second switching step according to the output frequency. do.

delete

delete

delete

Hereinafter, exemplary embodiments of the present invention will be described in detail with reference to the accompanying drawings.

2 is a conceptual diagram illustrating the operation of the double voltage booster of the ground separation method as the first embodiment of the DC power booster according to the present invention, and FIG. 3 is another embodiment of the DC power booster according to the present invention. This is a conceptual diagram illustrating the operation of the triple voltage booster of the common ground method. In addition, Figure 4 is a block diagram for explaining the operation of the N times voltage booster of the common ground method in the DC power booster according to the present invention, Figure 5 is a ground separation method of the first embodiment of the DC power booster according to the present invention This is a circuit diagram for explaining the operation of the double voltage booster.

Referring to FIG. 2, the double voltage booster of the ground separation method according to the present invention may be sequentially operated according to the switching operation of the switching circuit 110 and the switching circuit 110 to switch the input DC voltage according to the output DC voltage. It consists of a first capacitor 120 and a second capacitor 130 for charging the charge.

The double voltage booster of the ground separation method according to the present invention is connected to SW1, SW2 of the switching circuit 110 when the contact is connected to the first terminal, the input DC voltage is charged to the first capacitor 201, the second When the contact is connected to the terminal, the input DC voltage is charged in the second capacitor 202 so that the output DC voltage connected in series with the first capacitor and the second capacitor is twice the input DC voltage. As the power consumption of the load stage increases, the faster the operation of SW1 and SW2 of the switching circuit 110, the DC voltage of the output stage becomes twice the input voltage. Resistor R1 uses a low resistance within a few ohms (Ω) for current limiting to protect the contact of switching circuit 110. The configuration of FIG. 2 is a ground separation method, which can be used in a booster. . The double voltage booster according to the present invention can be configured as a single chip (Monolithic IC) by the operation of the booster only by the switching operation. No need for transformers and coils to boost the power supply can provide a lightweight, economical and simple voltage booster.

3 is a conceptual diagram illustrating the operation of the triple voltage booster of the ground common method, in which terminals of the switching circuit 110 are connected to the first, second, and third capacitors 201, 202, and 203, respectively. The same reference numerals are used for the same parts since the configuration of FIG. 2 is identical except that three points and a common ground unit 120 are further formed.

The common grounding unit 120 forms a current limiting resistor R1 at one end of the input DC voltage and forms switching elements SW1 and SW2 at both ends of the input DC voltage in order to solve the grounding problem in the circuit. The charging capacitor 121 is formed on the output side of the switching elements SW1 and SW2. The switching elements SW1 and SW2 of the common ground unit 120 interlock with each other and the switching elements SW1 and SW1 of the common ground unit 120 only when the switches SW3 and SW4 of the switching circuit 110 are positioned at the terminal 1. SW2) are also operated to be in the position of terminal 1 to solve the grounding problem.

The switches SW3 and SW4 of the switching circuit 110 are operated to sequentially connect the terminals 1, 2 and 3, and the switching elements SW1 and SW2 of the common ground unit 120 are positioned at the terminal 1. In the switches SW3 and SW4 of the switching circuit 110 are also located at the terminal 1 so that the input DC voltage is charged in the charging capacitor 121 and the first capacitor 201.

Afterwards, when the switching elements SW1 and SW2 of the common ground unit 120 are positioned at the terminal # 2, the switches SW3 and SW4 of the switching circuit 110 are also located at the terminal # 2 to charge the charging capacitor 121. Is charged to the second capacitor 202.

Here, if the capacitance of the charging capacitor 121 is 1000uF, and the capacitance of the first, second and third capacitors 201, 202, and 203 is configured to 100uF, the switching element SW1, of the common grounding unit 120, When the switches SW3 and SW4 of the SW2 and the switching circuit 110 are both at the position of the terminal 2, part of the voltage charged in the charging capacitor 121 is charged in the second capacitor 202.

Since the switches SW3 and SW4 of the switching circuit 110 are located at the terminal 3, the switching elements SW1 and SW2 of the common ground unit 120 are located at the terminal 2, and thus, the charging capacitor 121 is charged. The remaining voltage in the voltage is charged in the third capacitor 203. In the configuration of FIG. 3, the resistors R1 and R2 are necessarily required as low resistances within several ohms for current limiting to protect the contacts of the switches.

FIG. 4 is a block diagram illustrating the operation of the N common voltage booster of the common ground method in the DC power booster according to the present invention. In the case of the N common voltage booster of the common ground method, the structure of FIG. . That is, the N-times booster of the common ground method of FIG. 4 includes the current limiter 122 formed at one end of the input DC voltage, and the first and second switching elements SW1 and SW2 and the first and second switching elements formed at both ends of the input DC voltage. The common ground part 120 including the charging capacitor 121 formed on the output side of the first and second switching elements SW1 and SW2 is provided.

On the output side of the common ground unit 120, a plurality of switches for switching the DC input voltage and the voltage charged in the charging capacitor 121 while interlocking with the first and second switching elements SW1 and SW2 of the common ground unit 120 The switching circuit 110 composed of the switch units SW3 to SWN is formed.

The plurality of switch units SW3 to SW N constituting the switching circuit 110 and the first and second switching elements SW1 and SW2 of the common ground unit 120 sense the output voltage and switch according to the set voltage. The switching operation is performed by the control of the switching controller 130 for converting the on / off duty.

On the output side of the plurality of switch units SW3 to SW N constituting the switching circuit 110, first output capacitors 201 to N-th output capacitors for sequentially charging electric charges according to the switching operation of the switching circuit 110. 20N are formed, respectively.

The N-fold voltage booster of the common ground type according to the present invention configured as described above receives the DC input from the DC input terminal and passes the current limiter 122 to operate the first and second switching elements 114 in the switching controller 130. And the switch units SW3 to SWN of the switching circuit 110 are sequentially operated to charge the input DC voltage to the charging capacitor 121 and the first output capacitor 201.

Subsequently, the switching controller 130 sequentially operates the respective switch units SW3 to SWN of the switching circuit 110 in a state in which the switching elements SW1 and SW2 of the common ground unit 120 are opened to charge capacitors (S). The charging voltage of 121 is sequentially charged from the second output capacitor 202 to the Nth output capacitor 20N.

Here, the output capacitors 202 to 20N use a capacitor having a small inductance component, and the charging capacitor 121 uses a capacitor having a large inductance component to reduce spike noise when switching. The switching controller 130 controls the switching operation by sensing the DC output voltage. When the output voltage is lower than the set voltage, the switching controller 130 changes the switching duty to charge the output capacitors 202 to 20N more quickly from the DC input terminal. When the set voltage is exceeded, the switching controller 130 stops the switching operation so that the set current or more is not output. In recent years, efficient switching operation is possible due to the development of high voltage switching elements, and in the present invention, since the high voltage switching element is configured as a simple high voltage switching, it can be implemented as a single semiconductor except for the charging capacitors 120 and 130. It can be composed of a single semiconductor device is a new way that can be supplied with DC power.

The double voltage booster of the ground separation method according to the present invention shown in FIG. 2 may also be implemented in the circuit of FIG. 5, and the PNP type fifth transistor Q5 and the NPN type transistors are provided at both ends of the first capacitor 201. The collector stages of the seventh transistor Q7 are connected, and the emitter stages of the fifth transistor Q5 and the seventh transistor Q7 are respectively connected to both ends of the DC input terminal.

The base terminal of the fifth transistor Q5 is connected to the collector terminal of the first transistor Q1 through the resistor R9, and the base terminal of the seventh transistor Q7 is connected to the third transistor Q3 through the resistor R11. It is connected to the emitter stage of.

In addition, the base terminals of the first transistor Q1 and the third transistor Q3 are connected to one output terminal of the buffer 134 of the switching controller 130 through the first resistor R1 and the third resistor R3, respectively. do.

Similarly, collector terminals of the PNP type sixth transistor Q6 and the NPN type eighth transistor Q8 are connected to both ends of the second capacitor 202, and the emitters of the sixth transistor Q6 and the eighth transistor Q8 are connected. The terminals are respectively connected to both ends of the DC input terminal.

The base terminal of the sixth transistor Q6 is connected to the collector terminal of the second transistor Q2 through the resistor R10, and the base terminal of the eighth transistor Q8 is connected to the fourth transistor Q4 through the resistor R12. It is connected to the emitter stage of.

In addition, the base terminal of the second transistor Q2 and the fourth transistor Q4 is connected to the other output terminal of the buffer 134 of the switching controller 130 through the second resistor R2 and the fourth resistor R4, respectively. do.

The buffer 134 of the switching controller 130 is connected to the V / F converter 132, one of the input terminals of the V / F converter 132 is connected to the DC output terminal, the frequency according to the output DC voltage signal Output the signal.

In the double booster according to the present invention configured as described above, the common grounding portion is excluded to simplify the description and help the understanding. The V / F converter 132 of the switching control unit 130 detects the output DC voltage, and when the output DC voltage decreases, the number of switching increases to increase the output voltage. That is, the buffer 134 receiving the frequency signal output from the V / F converter 132 has an inverted output and an inverted output in order to alternately switch the first capacitor 201 and the second capacitor 202. Produces generated output. When the non-inverting Q terminal of the buffer 134 is output high, a signal is applied to the base terminal of the first transistor Q1 through the resistor R1 to conduct the first transistor Q1, and the first transistor ( When Q1) is operated, a signal is applied to the base terminal of the fifth transistor Q5 through the resistor R9 to conduct the fifth transistor Q5. At the same time, when the non-inverting Q terminal of the buffer 134 is high output, a signal is also applied to the base terminal of the third transistor Q3 through the resistor R3 to conduct the third transistor Q3. When the transistor Q3 is operated, a signal is applied to the base terminal of the seventh transistor Q7 through the resistor R11 to conduct the seventh transistor Q7.

Therefore, when the non-inverting Q terminal of the buffer 134 is high output, the fifth transistor Q5 and the seventh transistor Q7 are turned on to charge the first capacitor 201 with the input DC voltage. .

In the same way, when the inverting Q terminal of the buffer 134 is high output, the sixth transistor Q6 and the eighth transistor Q8 are turned on to charge the second capacitor 202 with the input DC voltage. By doing so, the output terminals of the first capacitor C1 and the second capacitor C2 connected in series may output a DC voltage twice the input DC voltage.

That is, the buffer 134 receiving the frequency signal output from the V / F converter 132 of the switching controller 130 outputting the frequency signal according to the output DC voltage signal is the first transistor Q1 and the third transistor ( When the signal is output to Q3), the fifth transistor Q5 and the seventh transistor Q7 operate accordingly to store the input DC voltage in the first capacitor 201, and the buffer 134 makes the second transistor Q2. And when the signal is output to the fourth transistor Q4, the sixth transistor Q6 and the eighth transistor Q8 operate to store the input DC voltage in the second capacitor 202. The second capacitor C2 is connected in series to output a DC voltage twice the input DC voltage.

In the implementation circuit of the present invention, in order to make the switching current of the final stage sufficient, it is good to use a high gain of the transistor or increase the number of amplification stages, and a device having a gain and a high current specification of 10 times or more than a general circuit case. do.

As described above, the power conversion device according to the present invention is to boost the DC / AC power supplied from the power supply terminal only by switching to supply a stable direct current power to the load using a capacitor to the load terminal Pumping prevents switching noise on the input and output stages, and improves conversion efficiency by allowing a single IC to supply power supplies other than capacitors.

Although the preferred embodiments of the present invention have been described in detail with reference to the accompanying drawings, the present invention is not limited thereto and may be improved or modified by those skilled in the art within the scope of the technical idea of the present invention.

Claims (7)

A common grounding step of reducing the occurrence of noise by receiving a DC voltage and limiting current, and charging the input DC voltage to the charging capacitor by the switching elements SW1 and SW2; A first switching step of charging the first capacitor with a first voltage by switching the input DC voltage in association with the switching elements SW1 and SW2 of the common grounding step; A second switching step of alternating with the first switching operation after the first switching step and switching the input DC voltage in conjunction with the switching elements SW1 and SW2 of the common grounding step to charge a second voltage to the second capacitor; ; An output voltage sensing step of sensing a DC voltage output after the second switching step; And Outputting a frequency proportional to the DC voltage output in the output voltage sensing step, thereby controlling the switching period of the first switching step and the second switching step to be increased or decreased by the output frequency to stabilize the output power; DC power boosting method comprising. delete A current limiter 122 is formed at one end of an input side of the DC voltage to prevent noise. A plurality of switching elements for switching a power source are connected to both ends of the DC voltage, and a charging capacitor is connected to an output side of the plurality of switching elements. A common ground unit 120 formed by forming 121; A switching circuit formed on an output side of the common ground unit 120 and configured of a plurality of switch units SW3 to SWN for switching a DC voltage charged in the charging capacitor 121 in cooperation with the plurality of switching elements ( 110); The plurality of switch units are connected to a plurality of switch units SW3 to SW N constituting the switching circuit 110, and outputs frequencies according to DC voltages output from the plurality of switch units SW3 to SW N. A switching controller 130 for increasing or decreasing the number of switching of SW3 to SWN; And First output capacitors 201 to Nth output capacitors 20N which are connected to the output sides of the plurality of switch units SW3 to SWN constituting the switching circuit 110 to sequentially charge electric charges according to a switching operation. DC power booster, including). delete 4. The charging capacitor 121 of claim 3, wherein the charging capacitor 121 is formed of a capacitor having a large inductance component, and the first output capacitor 201 to the Nth output capacitor 20N are formed of a capacitor having a small inductance component. DC power booster. 4. The DC power booster of claim 3, wherein the remaining components of the DC power booster except for the charging capacitor 121 are configured as a single IC. The V / F converter for receiving the output DC voltage and outputting the frequency according to the output DC voltage and the output of the V / F converter for outputting the inverted and non-inverted signal according to claim 3 DC power booster, characterized in that consisting of a buffer.

Images