KR100811475B1 - Image Display Apparatus - Google Patents

Abstract

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to an image display apparatus, wherein at least one of a plurality of image data is blocked between an image processor and a timing controller and replaced with specific image data, thereby reducing the occurrence of noise. There is an effect of preventing deterioration of image quality of an image.

The video display device of the present invention relates to an image processor which processes an input image signal and outputs image data having a predetermined bit, a timing controller that receives image data, and outputs a driving control signal. And an image display panel configured to display an image on a screen, wherein the timing controller includes an image data receiver for receiving image data, an image data calculator for generating driving control signals, and an image transmitted from the image data receiver to the image data calculator. It is preferable to include an image data blocker for blocking at least one of the data and supplying specific image data to the image data calculator.

Description

Image Display Apparatus

1 is a diagram for explaining an example of the configuration of a video display device of the present invention.

2 is a diagram for explaining an example of a more detailed configuration of a timing controller.

3A to 3B are diagrams for explaining an example of the arrangement of the video data blocking unit and its detailed configuration.

4 is a diagram for explaining the effect of the video display device of the present invention;

5 is a diagram for explaining an example of a method for selectively arranging an image data blocking unit.

6A to 6B are views for explaining an example of the structure of a plasma display panel that can be applied to the video display device of the present invention.

<Explanation of symbols for the main parts of the drawings>

100: image processor 110: timing controller

120: drive unit 130: image display panel

The present invention relates to an image display device.

The image display apparatus includes an image display panel, an image processor for processing an image input from the outside, and an image display panel for displaying an image processed by the image processor on a screen.

The image display panel includes a liquid crystal display panel (LCD), a field emission display panel (FED), an organic electroluminescent panel (organic EL: organic electroluminescense), and a plasma display panel. There are kinds.

The image processor outputs image data having a predetermined number of bits by processing an image input from the outside. An image according to the image data is displayed on the image display panel.

On the other hand, there is a problem that a relatively large noise occurs in the conventional video display device, thereby deteriorating the image quality of the implemented image.

SUMMARY OF THE INVENTION In order to solve the above problems, an object of the present invention is to provide an image display apparatus in which noise is reduced by improving a transmission method of image data according to a signal to an image input from the outside.

The image display device of the present invention for achieving the above object is an image processing unit for processing the input image signal to output a predetermined bit (Bit) image data, a timing controller for receiving the image data and outputting a drive control signal and driving And an image display panel for displaying an image on a screen in association with a control signal, wherein the timing controller includes an image data receiver configured to receive image data, an image data calculator configured to generate a driving control signal, and an image data calculator from the image data receiver. It is preferable to include an image data blocker for blocking at least any one of the image data transmitted to the supply and supply the specific image data to the image data operation unit.

In addition, the image data blocker may include at least one of the image data transmitted from the image data receiver to the image data calculator when the number of bits of the image data received by the image data receiver is less than the number of bits of the image data transmitted by the image data receiver. Blocking and supplying the specific image data to the image data operation unit.

The image data blocking unit may block image data that does not correspond to the image data received by the image data receiver from among the image data transmitted from the image data receiver to the image data calculator, and supply specific image data to the image data calculator. .

In addition, the plurality of image data transmission lines may be disposed between the image data receiver and the image data operation unit, and the image data blocking unit may be disposed on at least one of the plurality of image data transmission lines.

Also, the image data blocking unit may select the image data when the image data that does not correspond to the image data received by the image data receiver is transmitted from the image data receiver to the image data calculator through the corresponding image data transmission line. It cuts off and supplies specific image data to the image data calculating unit.

In addition, the specific image data may be a logic low signal.

Hereinafter, an image display device of the present invention will be described in detail with reference to the accompanying drawings.

1 is a view for explaining an example of the configuration of a video display device of the present invention.

Referring to FIG. 1, an image display apparatus of the present invention includes an image processor 100, a timing controller 110, and an image display panel 130. In addition, the video display device of the present invention preferably further includes a driver 120 for supplying a drive signal.

Here, the image processor 100 performs image processing on an image signal input from the outside and outputs image data of a predetermined bit.

The timing controller 110 receives the image data and outputs a driving control signal, preferably, a driving control signal according to a predetermined timing control.

The image processor 100 and the timing controller 110 may be configured in the form of a predetermined board, and may be spaced apart from each other.

The image display panel 130 displays a predetermined image on the screen in relation to the driving control signal output by the timing controller 110. It is preferable that a plurality of electrodes are formed in the image display panel 130.

In addition, the driving unit 120 outputs a driving signal corresponding to the driving control signal output by the timing controller 110 so that the image display panel 130 displays a predetermined image on the screen according to the driving control signal. Supply to the electrode (Electrode) formed in the 130 is preferable.

Here, in FIG. 1, only the case where the driving unit 120 is formed as one board is illustrated, but the driving unit 120 may be divided into a plurality of boards according to electrodes formed on the image display panel 130. It is possible.

For example, when the first electrode and the second electrode parallel to each other and the third electrode crossing the first electrode and the second electrode are formed in the image display panel 130 included in the image display device of the present invention, The driver 120 may include a first driver (not shown) for supplying a driving signal to the first electrode, a second driver for supplying a driving signal to the second electrode, and a third driver for supplying a driving signal to the third electrode ( Not shown).

Here, the timing controller 110 will be described in more detail.

2 is a diagram for explaining an example of a more detailed configuration of a timing controller.

Referring to FIG. 2, the timing controller 110 may include an image data receiver 200, an image data calculator 220, and an image data blocker 210.

Here, the image data receiver 200 receives image data output from the image processor 100. The image data receiver 200 is a reception interface for receiving image data.

The image data calculator 220 generates a driving control signal by calculating the image data received by the image data receiver 200 from the image processor 100.

The image data blocking unit 210 selectively blocks at least one of the image data transmitted from the image data receiving unit 200 to the image data calculating unit 220 and supplies the predetermined specific image data to the image data calculating unit 220. .

In this case, the image data blocking unit 210 is different from the number of bits of the image data received by the image data receiving unit 200 than the number of bits of the image data transmitted by the image data receiving unit 200. When the receiver 200 receives 8-bit image data and transmits 10-bit image data, the receiver 200 cuts off at least one of the image data transmitted from the image data receiver 200 to the image data calculator 220. In addition, the predetermined specific image data is preferably supplied to the image data calculator 220.

More preferably, the image data blocking unit 210 may select image data that does not correspond to the image data received by the image data receiving unit 200 among the image data transmitted from the image data receiving unit 200 to the image data calculating unit 220. Blocking and supplying the predetermined specific image data to the image data operation unit 220.

For example, assume that the image processing unit 100 transmits 8-bit image data from the first image data 1 to the eighth image data 8. In addition, it is assumed that the image data receiver 200 transmits 10-bit image data from the first 'image data 1' to the tenth 'image data 10' to the image data operation unit 220.

In this case, the image data receiver 200 receives 8-bit image data, whereas in transmission, the image data receiver 200 receives first 8 'image data 1' to 8 'image data corresponding to the received 8-bit image data. The 8-bit video data up to (8 '), the 9' video data 9 'and the 10' video data 10 'which do not correspond to the received 8-bit video data are transmitted together.

Here, the image data blocking unit 210 is image data that does not correspond to the image data received by the image data receiving unit 200 among the image data transmitted from the image data receiving unit 200 to the image data calculating unit 220, that is, the ninth. The video data 9 'and the 10' video data 10 'are blocked, and other specific video data is substituted for the blocked 9' video data 10 'and the 10' video data 10 '. The image data operation unit 220 is to be supplied.

As such, the specific image data is supplied to the image data calculator 220 in response to the blocked image data.

As such, when the number of bits of the image data received by the image data receiver 200 and the number of bits of the transmitted image data are different, the signal type used by the image processor 100 and the timing controller 110 may be used. This can happen when the signal types are different.

For example, when the image processor 100 uses an 8-bit signal processing method and the timing controller 110 uses a 10-bit signal processing method, the image processor 100 may output 8-bit image data. It is preferable that the video data receiver 200 of the timing controller 110 has a 10-bit interface as a matter of course. Accordingly, a case may occur where the number of bits of the image data received by the image data receiver 200 and the number of bits of the image data to be transmitted are different.

In particular, when the manufacturer of the image processor 100 and the manufacturer of the timing controller 110 are different, the number of bits of the image data received by the image data receiver 200 and the number of bits of the transmitted image data may be different as described above. Can occur frequently.

As described above, in order to block image data that does not correspond to the image data received by the image data receiving unit 200 among the image data transmitted from the image data receiving unit 200 to the image data calculating unit 220 ( 210 is preferably disposed in the transmission line of the image data. Looking at this in more detail as follows.

3A to 3B are diagrams for explaining an example of the arrangement of the video data blocking unit and its detailed configuration.

First, referring to FIG. 3A, a plurality of image data transmission lines for transmitting image data from the image data receiver 200 to the image data calculator 220 are disposed between the image data receiver 200 and the image data calculator 220. do.

For example, when the image processing unit 100 uses an 8-bit method and the timing controller 110 uses a 10-bit method as shown in FIG. 3A, a total of 10 image data transmission lines may be arranged. have.

Here, the image data blocking unit 210 may be disposed on at least one of the plurality of image data transmission lines.

For example, as shown in FIG. 3A, there are 10 image data blocking units 210 in total (a to j), and each of the 10 image data blocking units 210 may be disposed on an image data transmission line. .

In this way, the image data blocking unit 210 disposed on the image data transmission line is the image data receiving unit 200 of the image data transmitted from the image data receiving unit 200 to the image data calculating unit 220 through the corresponding image data transmission line. When the image data that does not correspond to the received image data is transmitted, the corresponding image data is blocked, and the specific image data is supplied to the image data operation unit 220.

For example, as shown in FIG. 3A, the image processing unit 100 uses an 8-bit method, and the timing controller 110 uses the 10-bit method. Eight image data corresponding to two image data that do not correspond to the image data can be transmitted.

In more detail, the image data transmitter 300 of the image processor 100 may have a total of eight terminals from 1 to 8 in order to transmit 8-bit image data. In addition, the image data receiver 200 of the timing controller 110 may have a total of 10 terminals from 1 to 10 in order to use the 10-bit method.

Here, terminals 1 to 8 of the image data transmitter 300 of the image processor 100 may be connected to terminals 1 to 8 of the image data receiver 200 of the timing controller 110, respectively.

On the other hand, terminals 9 and 10 of the image data receiver 200 of the timing controller 110 may not be connected because the image processor 100 uses an 8-bit method.

Here, the i-th image data blocking unit and the j-th image data blocking unit block image data transmitted from the 9th and 10th terminals of the image data receiving unit 200 of the timing controller 110 to the image data calculating unit 220, respectively. Done. The i-th image data cutoff unit and the j-th image data cutoff unit supply specific image data to the image data operation unit 220.

On the other hand, the remaining a-th image data blocking unit and the h-th image data blocking unit supply the corresponding image data to the image data operation unit 220 as it is.

An example of implementing an image data blocking unit for performing the above operation is illustrated in FIG. 3B.

Referring to FIG. 3B, the image data blocking unit 210 may include a multiplexer.

The image data transmitted by the image data receiver 200 may be input to the terminal 1 of the multiplexer, and specific image data may be input to the terminal 2.

Here, the control signal may be input to the terminal of ③. The control signal is a signal transmitted from the image processor 100 and includes information on a signal type of the image processor 100.

For example, assume that the image processor 100 uses an 8-bit method and the timing controller 110 uses a 10-bit method.

Here, the image data blocking unit 210 may check the information that the method used by the timing controller 110 is 2 bits more than the method of the image processor 100 through a control signal input to the terminal of ③.

Then, the image data blocking unit 210 including the multiplexer, for example, the i-th image data blocking unit and the j-th image data blocking unit of FIG. 3A, block the image data input through the terminal of ①, and input the terminal of ②. The video data is output as an output signal.

The specific image data thus output is supplied to the image data calculator 220.

Here, the specific image data is preferably a logic low signal. For example, it is a low signal of '00'.

As described above, the at least one of the plurality of image data is blocked, and the reason for selecting specific image data instead of the blocked image data will be described with reference to FIG. 4.

4 is a view for explaining the effect of the video display device of the present invention.

Referring to FIG. 4, the case where the image data blocking unit as shown by reference numeral 210 of FIG. 3A is omitted.

In this case, as shown in FIG. 3A, when the image processor 400 uses an 8-bit method and the timing controller 420 uses a 10-bit method, the timing controller 420 indicated by the area A is used. Terminals 9 and 10 of the image data receiver 430 of FIG. 5 are floated.

That is, no signal is supplied to terminals 9 and 10 of the image data receiver 430 of the timing controller 420.

In this state, since the timing controller 420 uses a 10-bit method, all terminals from terminals 1 to 10 of the image data receiver 430 are connected to the image data calculator 440.

Accordingly, the image data transmitted from the 9th and 10th terminals of the image data receiver 430 of the timing controller 420 to the image data calculator 440 is vulnerable to noise during transmission and reception of the image data. can do.

For example, when the generator operates in the vicinity of the image display device of the present invention during transmission and reception of image data, severe noise may be generated at terminals 9 and 10 of the image data receiver 430 of the timing controller 420. May occur.

Accordingly, the operation of the image data calculator 440 may become unstable, and as a result, the image quality of the image to be implemented may deteriorate.

In order to prevent the above-described problem from occurring, as shown in FIG. 3A, image data blocking units i and j are disposed at terminals 9 and 10 of the image data receiver 430 of the timing controller 420. The i-th image data blocker and the j-th image data blocker may be configured to supply specific image data, preferably a logic low signal 0, to the image data calculator 440.

That is, the video data signal that is not used is set to a logic low signal, that is, 0 so that noise does not occur according to an external environment.

Then, the image data operation unit 440 performs a stable operation, and as a result can prevent the image quality of the implemented image from deteriorating.

Meanwhile, in the above description, only the case in which the image data blocking unit is disposed in all the image data transmission lines is illustrated. Alternatively, the image data blocking unit may be arranged only in a predetermined transmission line among the plurality of image data transmission lines. This is as follows.

5 is a diagram for explaining an example of a method of selectively arranging an image data blocking unit.

As shown in FIG. 5, it is assumed that the image processor 500 uses an 8-bit method and the timing controller 520 uses a 10-bit method.

Here, a total of eight terminals from terminals 1 to 8 of the image data transmitter 510 of the image processor 500 may be connected to terminals 1 to 8 of the image data receiver 530 of the timing controller 520. Each is connected.

In addition, terminals 9 to 12 of the image data receiver 530 of the timing controller 520 are floated, and between the terminals 9 to 12 of the image data receiver 530 and the image data calculator 550. A total of four image data cutouts 540 from a to d may be arranged in each.

The reason for this arrangement is that image data transmitted from terminals 1 to 8 of the image data transmission unit 510 of the image processing unit 500 does not need to be replaced with specific image data, for example, a logic low signal. .

In addition, if the image data blocking unit 540 is selectively disposed in this way, the manufacturing cost can be reduced.

On the other hand, it is preferable that the image display panel included in the image display apparatus of the present invention described above is a plasma display panel displaying an image using plasma discharge.

The reason is that the plasma display panel may be more vulnerable to noise because its size is relatively larger than other image display panels, for example, liquid crystal display panels, and thus the total length of the transmission line of image data is relatively long.

In addition, the plasma display panel is characterized in that the discharge is generated in the discharge cell to display an image, when noise is generated, the discharge becomes unstable, and thus the image quality of the image can be rapidly deteriorated.

An example of the plasma display panel that can be applied to the image display device of the present invention is as follows.

6A to 6B are views for explaining an example of the structure of a plasma display panel that can be applied to the image display device of the present invention.

First, referring to FIG. 6A, a plasma display panel that may be applied to the present invention includes a front substrate 601 on which electrodes are formed, preferably scan electrodes 602 and Y and sustain electrodes 603 and Z are formed. A front panel 600 and a back substrate 611 on which an electrode intersecting the scan electrodes 602 and Y and the sustain electrodes 603 and Z, preferably address electrodes 613 and X, are formed. The rear panel 610 may be bonded to each other.

Here, the electrodes formed on the front substrate 601, preferably the scan electrodes 602 and Y and the sustain electrodes 603 and Z, generate a discharge in a discharge space, that is, a discharge cell, and at the same time, Discharge can be maintained.

The dielectric layer, preferably on the front substrate 601 on which the scan electrodes 602 and Y and the sustain electrodes 603 and Z are formed, covers the scan electrodes 602 and Y and the sustain electrodes 603 and Z. Upper dielectric layer 604 may be formed.

This upper dielectric layer 604 limits the discharge currents of the scan electrodes 602 and Y and the sustain electrodes 603 and Z and can insulate between the scan electrodes 602 and Y and the sustain electrodes 603 and Z. have.

A protective layer 605 is formed on the upper dielectric layer 604 to facilitate discharge conditions. The protective layer 605 may be formed through a method of depositing a material such as magnesium oxide (MgO) on the upper dielectric layer 604.

On the other hand, the electrodes formed on the rear substrate 611, preferably the address electrodes 613 and X, are electrodes for supplying a data signal to the discharge cells.

A dielectric layer, preferably a lower dielectric layer 615 may be formed on the rear substrate 611 on which the address electrodes 613 and X are formed to cover the address electrodes 613 and X.

The lower dielectric layer 615 may insulate the address electrodes 613 and X.

On top of the lower dielectric layer 615, a partition 612 such as a stripe type, a well type, a delta type, a honeycomb type, or the like, for partitioning a discharge cell is formed. Is formed. Accordingly, discharge cells such as red (R), green (G), and blue (B) may be formed between the front substrate 601 and the rear substrate 611.

Here, it is preferable that a predetermined discharge gas is filled in the discharge cell partitioned by the partition wall 612.

In addition, a phosphor layer 614 may be formed in a discharge cell partitioned by the partition wall 612 to emit visible light for image display during address discharge. For example, red (R), green (G), and blue (B) phosphor layers may be formed.

In the plasma display panel described above, when a driving signal is supplied to at least one of the scan electrodes 602 and Y, the sustain electrodes 603 and Z, and the address electrodes 613 and X, the plasma display panel is divided by the partition wall 612. Discharge may occur within the discharge cell.

Then, vacuum ultraviolet rays are generated in the discharge gas filled in the discharge cells, and the vacuum ultraviolet rays are applied to the phosphor layer 614 formed in the discharge cells. Then, a predetermined visible light is generated in the phosphor layer 614, and the visible light is emitted to the outside through the front substrate 601 in which the upper dielectric layer 604 is formed, and thus the front substrate 601. A predetermined image may be displayed on the outer surface of the.

Meanwhile, in the description of FIG. 6A, only the case where the scan electrodes 602 and Y and the sustain electrodes 603 and Z are each formed of one layer is illustrated and described. However, the scan electrodes 602 and Y may be different from each other. It is also possible that at least one of the sustain electrodes 603 and Z consists of a plurality of layers. This will be described with reference to FIG. 6B.

Referring to FIG. 6B, the scan electrodes 602 and Y and the sustain electrodes 603 and Z may be formed of two layers, respectively.

In particular, in consideration of light transmittance and electrical conductivity, the scan electrodes 602 and Y and the sustain electrodes 603 and Z are opaque silver (Ag) to emit light generated in the discharge cell to the outside and to secure driving efficiency. Bus electrodes 602b and 603b and transparent electrodes 602a and 603a made of transparent indium tin oxide (ITO).

As such, the reason why the scan electrodes 602 and Y and the sustain electrodes 603 and Z include the transparent electrodes 602a and 603a is that when visible light generated in the discharge cells is emitted to the outside of the plasma display panel. To be released effectively.

In addition, the reason why the scan electrodes 602 and Y and the sustain electrodes 603 and Z include the bus electrodes 602b and 603b is that the scan electrodes 602 and Y and the sustain electrodes 603 and Z are transparent electrodes. In the case of including only 602a and 603a, the driving efficiency can be reduced because the electrical conductivity of the transparent electrodes 602a and 603a is relatively low, so that the transparent electrodes 602a and 603a can cause such a reduction in driving efficiency. To compensate for the low electrical conductivity.

In this case, when the scan electrodes 602 and Y and the sustain electrodes 603 and Z include the bus electrodes 602b and 603b, the transparent electrodes (602b and 603b) may be used to prevent reflection of external light by the bus electrodes 602b and 603b. The black layers 620 and 621 may be further provided between the 602a and 603a and the bus electrodes 602b and 603b.

Meanwhile, the transparent electrodes 602a and 603a may be omitted in the same structure as in FIG. 6B. In other words, ITO-Less is also possible.

For example, the scan electrodes 602 and Y and the sustain electrodes 603 and Z may be made of only the bus electrodes 602b and 603b without the transparent electrodes 602a and 603a in FIG. 6B. That is, the scan electrodes 602 and Y and the sustain electrodes 603 and Z may be formed of one layer of the bus electrodes 602b and 603b.

6A through 6B illustrate and describe only one example of the plasma display panel that may be applied to the image display device of the present invention, and the present invention is not limited to the plasma display panel having the structure shown in FIGS. 6A through 6B. To reveal. For example, the plasma display panel of FIGS. 6A to 6B shows only the case where the upper dielectric layer 604 and the lower dielectric layer 615 are each one layer, but the upper dielectric layer 604 and At least one or more of the lower dielectric layers 615 may be formed of a plurality of layers.

In addition, a black layer (not shown) may be further formed on the partition 612 to prevent reflection of the external light due to the partition 612.

As such, the structure of the plasma display panel that can be applied to the image display device of the present invention can be variously changed.

As such, the technical configuration of the present invention described above can be understood by those skilled in the art that the present invention can be implemented in other specific forms without changing the technical spirit or essential features of the present invention.

Therefore, the exemplary embodiments described above are to be understood as illustrative and not restrictive in all respects, and the scope of the present invention is indicated by the appended claims rather than the foregoing detailed description, and the meaning and scope of the claims are as follows. And all changes or modifications derived from the equivalent concept should be interpreted as being included in the scope of the present invention.

As described above in detail, the image display device of the present invention reduces the occurrence of noise by blocking at least one of the plurality of image data and replacing the image data with specific image data between the image processor and the timing controller, thereby realizing an image. There is an effect of preventing the deterioration of image quality.

Claims (6)

An image processor which processes an input image signal and outputs image data of a predetermined bit; A timing controller configured to receive the image data and output a driving control signal; And An image display panel displaying an image on a screen in relation to the driving control signal; Including, The timing controller An image data receiver configured to receive the image data; An image data calculating unit generating the driving control signal; And And an image data blocking unit which blocks at least one of the image data transmitted from the image data receiving unit to the image data calculating unit and supplies specific image data to the image data calculating unit. If the number of bits of the image data received by the image data receiving unit is less than the number of bits of the image data transmitted by the image data receiving unit, the image data blocking unit may include the image data transmitted from the image data receiving unit to the image data calculating unit. And cut off at least one, and supply the specific image data to the image data calculator. delete The method of claim 1, The image data blocking unit Image display, characterized in that for blocking the image data that does not correspond to the image data received from the image data receiving unit of the image data transmitted from the image data receiving unit to the image data operation unit and supplies the specific image data to the image data operation unit. Device. The method of claim 1, A plurality of image data transmission lines are disposed between the image data receiver and the image data calculator. And the image data blocking unit is disposed on at least one of a plurality of image data transmission lines. The method of claim 4, wherein The image data blocking unit When the image data that is not corresponding to the image data received by the image data receiver is transmitted among the image data transmitted from the image data receiver to the image data calculator through the corresponding image data transmission line, the corresponding image data is blocked and specified. And the image data is supplied to the image data calculating unit. The method according to any one of claims 1, 3 or 5, And the specific image data is a logic low signal.

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