KR100800880B1 - Layer processing apparatus and method for synchronous ethernet - Google Patents

Abstract

A layer processing method and an apparatus for a synchronous Ethernet are provided to enable the synchronous Ethernet to be compatible with a commercial device by receiving parameters for the synchronous Ethernet from a PHY device and a MAC device. A PHY layer(300) is directly related to a hardware layer as the lowest layer of an OSI(Open Systems Interconnection) structure, and transmits or receives an Ethernet frame. An asynchronous frame unit(330) includes a MAC(Media Access Control) layer(350), and a bridging layer(360). The MAC layer delivers the Ethernet frame to the PHY layer and packetizes the Ethernet frame. The bridging layer determines whether the Ethernet frame is delivered to an upper layer and transmits the Ethernet frame to a corresponding destination. A synchronous frame unit(320) inserts a MAC address, an Ethernet type, and a synchronous header to the synchronous frame from an upper layer.

Description

Layer Processing Apparatus and Method for Synchronous Ethernet {Layer Processing Apparatus And Method for Synchronous Ethernet}

1 is a structural diagram of an embodiment of a hierarchical structure of Ethernet according to the conventional IEEE 802.3

2 is a structural diagram of an embodiment of a transmission cycle in a conventional synchronous Ethernet.

3 is a schematic diagram of a synchronization Ethernet layering processing structure according to an embodiment of the present invention.

4 is a structural diagram of a transmission cycle in synchronous Ethernet according to an embodiment of the present invention;

5 is an operation flowchart of a transmission method in a synchronous Ethernet layering processing structure according to an embodiment of the present invention;

6 is an operation flowchart of a receiving method in a synchronous Ethernet layering processing structure according to an embodiment of the present invention.

* Description of the main drawing codes *

100, 300: PHY layer 110, 310: xMII layer

120, 350: MAC layer 130, 360: bridging layer

140-1 to 140-3, 340: MAC client 320: Sync frame unit

330: asynchronous frame unit 370: parser

380: scheduler 390: synchronization buffer

400: sync frame processing unit

The present invention relates to a layering processing apparatus and method for synchronous Ethernet.

Ethernet is the most widely installed local area network technology. Now defined as a standard in the Institute of Electrical and Electronics Engineers (IEEE) 802.3, Ethernet was originally developed by Xerox and was developed by Xerox, DEC, and Intel.

Conventional Ethernet is competitively accessed using the CSMA / CD (Carrier Sense Multiple Access / Collision Detect) protocol defined in IEEE 802.3, so that the upper layer service frame is transferred to the Ethernet frame while maintaining the Inter Frame Gap (IFG) interval. Create and send At this time, regardless of the type of higher service frame, transmission is performed in the order of occurrence. In other words, Ethernet is one of the most commonly used technologies to transfer data between different terminals or between different users.

1 is a structural diagram of an embodiment of a hierarchical structure of Ethernet according to the conventional IEEE 802.3.

According to the layering baseline as shown in FIG. 1, the lower layer of the OSI layer (Open Systems Interconnection Layer) structure is a PHY layer 100 directly related to hardware and in charge of input / output of an Ethernet frame, and a higher layer. MAC layer 120 for packetizing Ethernet frames from 140-1 to 140-3 and forwarding them to PHY layer 100, and for packetizing Ethernet frames forwarding from PHY layer 100 to higher layers. And a bridging layer 130 that analyzes the received Ethernet frame to determine whether to relay based on the information included in the Ethernet frame, and transmits the Ethernet frame to a corresponding destination when the relay is determined. X Media Independ, which is an 802.3 MAC-PLS (Physical Layer Signaling) interface layer to connect between layer 100 and data link layers 120 and 130 ent Interface) layer 110 is present.

Ethernet is known as a technology that is not suitable for video or voice transmission, which is sensitive to transmission time delay, because it transmits CSMA / CD schemes that give the same priority to all Ethernet frames and transmit them through competition.

Recently, however, technologies for transmitting synchronous data such as video / audio using the existing Ethernet have been actively discussed, and Ethernet for transmitting synchronous data, which is being discussed, is referred to as synchronous Ethernet (Synchronous). Ethernet). In other words, the synchronization Ethernet is performed with priority on the synchronization frame and the unsynchronization frame, and it is difficult to handle such synchronization Ethernet with the conventional Ethernet hierarchy as shown in FIG. There is a need to provide a new hierarchical structure that is suitable for.

2 is a structural diagram of an embodiment of a transmission cycle in a conventional synchronous Ethernet.

As shown in FIG. 2, in the presently applied synchronous Ethernet, a transmission cycle for data transmission is configured as one cycle 200 of 125usec units, and each cycle includes an async frame interval for transmission of asynchronous data. 210 and a sync frame section 205 for transmission of synchronization data.

In more detail, the sync frame interval 205 for the transmission of the synchronization data is the highest priority part in the transmission cycle, according to the presently discussed sub-sync frames 201, 202, 203, and 204, respectively. This includes. The asynchronous frame section 210 for transmitting asynchronous data includes sub asynchronous frames 211, 212, and 213 having variable sizes in a corresponding region.

In the conventional Ethernet, IEEE 802.1p has been proposed as a method for reducing delay by having a classification of service (COS) for data that has priority such as multimedia data. However, the proposed IEEE 802.1p technology gives some improvement effect by prioritizing multimedia transmission compared to the existing IEEE 802.3 Ethernet technology. To be competitive compared to the reservation method, a procedure for requesting and allocating bands of data is required, but such a procedure does not exist at present. In addition, since there is no procedure for requesting and allocating the bandwidth of each data, a bandwidth manager for managing bandwidth allocation is required, and the size of the jitter buffer increases naturally for such bandwidth management. .

Therefore, the currently proposed IEEE 802.1p method is difficult to use the hierarchical structure because it is different from the method according to the synchronous Ethernet, and a study on the new hierarchical structure for the synchronous Ethernet processing is needed. In addition, even if a new hierarchical structure is proposed, it is necessary to study the hierarchical structure for synchronous Ethernet processing that can fully support the existing Ethernet 802.3 structure and support synchronous Ethernet without major modification.

An object of the present invention is to provide a synchronization Ethernet layer structure and processing method for implementing the synchronization Ethernet using a conventional commercial physical layer device and MAC device in implementing the synchronization Ethernet.

In order to achieve the above object, the present invention provides a layering processing apparatus for a synchronous Ethernet, which is directly related to hardware as a lower layer of an OSI layer structure, which is responsible for input / output of an Ethernet frame, and delivers the Ethernet frame to the PHY layer. Determining whether to relay on the basis of the information contained in the Ethernet frame by analyzing the MAC layer and the MAC layer for packetizing the Ethernet frame delivered from the PHY layer to the upper layer, and if the relay is determined, the corresponding destination It comprises a bridging layer for transmitting the Ethernet frame to the raw frame, characterized in that it comprises an asynchronous frame unit for processing more than the MAC layer and the synchronization frame unit for processing more than the MAC layer for the sync frame of the Ethernet frame.

In addition, when the Ethernet frame such as multimedia data is input from the upper layer of the OSI hierarchical structure, the present invention determines whether the data to be transmitted in the synchronous frame or the data to be transmitted in the asynchronous frame, and when the Ethernet frame is determined as the synchronous frame Receiving through the interface to insert a MAC address, type and sync header in the MAC-IN-MAC method for the sync frame, and transfer the inserted sync frame and the asynchronous frame to the xMII layer to each queue Waiting and waiting in the respective queues comprising a synchronization Ethernet frame of one transmission cycle and delivering to the PHY layer.

Hereinafter, exemplary embodiments of the present invention will be described in detail with reference to the accompanying drawings. Note that the same components in the drawings are represented by the same reference numerals and symbols as much as possible even though they are shown in different drawings. In addition, in describing the present invention, when it is determined that a detailed description of a related known function or configuration may unnecessarily obscure the subject matter of the present invention, the detailed description thereof will be omitted.

3 is a schematic diagram of a synchronization Ethernet layering processing structure according to an embodiment of the present invention.

As shown in FIG. 3, the structure of the synchronous Ethernet layering process according to the present invention is the lowest layer of the OSI layer structure, which is directly related to hardware and is responsible for input / output of an Ethernet frame, a PHY layer 300, and a PHY layer 300. The x Media Independent Interface (xMII) layer 310, which is an 802.3 MAC-PLS (Physical Layer Signaling) interface layer for connecting the data link layers 320 and 330, and a synchronization frame unit for processing more than the MAC layer for sync frames. 320 and an asynchronous frame unit 330 for processing above the MAC layer for the asynchronous frame.

The asynchronous frame unit 330 Ethernet-frames the packet from the upper layer 340 to the PHY layer 300 and packetizes the Ethernet frame transmitted from the PHY layer 300 as in the existing hierarchical structure. A bridging layer for analyzing the MAC layer 350 and the received Ethernet frame for transmission to the 340 to determine whether to relay based on the information contained in the Ethernet frame, and transmitting the Ethernet frame to the corresponding destination when the relay is determined. 360).

In particular, in the present invention, the parser 370 and the sync frame unit 320 which divides the synchronous Ethernet frame into the synchronous frame and the asynchronous frame in the xMII layer 310 and transmits them to the upper layers 330 and 340 according to their characteristics. And a scheduler 380 for scheduling the synchronous frames and the asynchronous frames received from the asynchronous frame unit 330 based on priority in one cycle.

The sync frame unit 320 is connected to a higher layer for processing multimedia information and performs a buffering operation for continuity at the time of input / output, and a sync buffer 390 is connected to the sync buffer 390 and is transferred from a higher layer. The MAC address, type (Ether-Type) and Synch Header are inserted in the MAC-IN-MAC method and transmitted to the lower layer or parsed for the sync frame transmitted from the lower layer. Ether-Type) and Synch Header are deleted and transferred to the sync buffer 390.

4 is a structural diagram of a transmission cycle in synchronous Ethernet according to an embodiment of the present invention.

As shown in FIG. 4, in the synchronous Ethernet applied to the present invention, a transmission cycle for data transmission is configured as one cycle 200 in units of 125usec, and each cycle is asynchronous for transmission of asynchronous data. And a frame section 210 and a synch frame section 205 for transmission of synchronization data.

In this way, the synchronous frame section 205 and the asynchronous frame section 210 are divided within a frame having a constant cycle, so that information such as multimedia data to be transmitted can be inserted and deleted while maintaining compatibility with the existing IEEE 802.3 standard. .

In one embodiment of the present invention, each sync frame 201 to 204 is composed of eight octets, and a preamble 410 field configured to synchronize transmission timing of the frame, and indicates a transmission destination of the frame. A Destination Address 420 field consisting of 6 octets for the purpose, and a Source Address 430 field consisting of 6 octets for indicating the transmission origin of the frame. Type field 440 of two octets for indicating the format of the data, synchronous data field 450 of 46 to 1500 octets for the multimedia data to be transmitted, and errors during transmission in frame transmission In order to check whether or not, it includes a frame check sequence (FCS) 460 field composed of 4 octets.

An embodiment according to the present invention proposes to allocate a transmission area for transmitting information included in the synchronization data field 407 of the synchronization frame. That is, between the preamble 410 field and the destination address 420 field of the sync frame, the destination address and the source address 420 and 430, which are the original MAC address, are copied to the MAC address 412 and 414. ), And the sync header 418 is stored, and a type (416) field is located behind the MAC addresses 412 and 414.

This type (Ether-Type) field contains information for identifying that the frame is a sync frame, and makes a reservation using one of these types (Ether-Type) 416. For example, if a value such as 0x3305 is detected, the synchronization header 418 of 8 octets is found after that. The detailed structure of the synchronization header 418 is illustrated in Table 1.

TABLE 1

[Ethernet Header]  Preamble 8  DA (multicast for Sync-E specific 6  SA 6  Ether type = 0x3305 2 [Sync Header]  S P1 P2 C R V V V One Reserved 2 Frame Counter in this Cycle One Cycle counter 4 [Ethernet Header] DA 6 SA 6 Ether type 2 [Payloads] [FCS] FCS 4

Synchronization header (Synch Header, 1 Octet) 418 is Sync (1 bit): 1 when the legacy switch that supports 802.1q priority, although Synch frame and P1 and P2 (2 bit) do not support synchronous link Set Synch P1 and P2 to have the highest priority in the 3-bit priority field for compatibility with the device. Here, sync = 1, P1 = 1, and P2 = 1. When Cycle Start (1 bit) is 1, first sync frame in this cycle, Reserved (1 bit) is a reserved area, and Version (3 bits) is a version area, for example, "001".

In addition, Reserved (16 bits) includes a reserved area, Frame Counter in the Cycle (1 octet) includes a frame number in a corresponding 125us cycle, and FCS (Frame Check Sequence, 4 octet) 460 includes a Wrap-around Cycle Identifier. .

3 and 4, the operation of the layered processing structure for the synchronous Ethernet according to the present invention will be described.

5 is an operational flowchart of a transmission method in a synchronous Ethernet layering processing structure according to an embodiment of the present invention.

As shown in FIG. 5, when a downlink signal (ie, a signal from an upper layer to a lower layer) is first looked at, multimedia data such as broadcast data having an interface such as ASI is inputted from an upper layer of the OSI layer structure. After determining whether the data to be transmitted in the frame or the data to be transmitted in the asynchronous frame (S500), it is received through the corresponding interface and stored in the sync buffer 390 of the sync frame unit 320. For the data stored in the sync buffer 390, the sync frame processor 400 uses the MAC addresses 412 and 414, the Ether-Type 416, and the Synch Header (MAC-IN-MAC). 418 is inserted to form a sync frame (S510 to S530). Here, the synchronization header 418 includes slot reservations such as a frame counter for counting a sync frame and cycle counter information for counting a transmission cycle for transmission.

In addition, the sync frame configured in the sync frame processor 400 is delivered to the scheduler 380 of the xMII layer 310 and queued (S540), and the asynchronous frame transmitted through the asynchronous frame unit 330 is also included in its queue. Wait (S550) is composed of a synchronization Ethernet frame of one transmission cycle (125usec) is delivered to the other device through the PHY layer 300 (S560). Here, the asynchronous frame unit 330 composed of the bridging layer 360 and the MAC layer 350 performs an operation of the data link layer of the conventional IEEE 802.3.

6 is an operational flowchart of a receiving method in a synchronous Ethernet layering processing structure according to an embodiment of the present invention.

As shown in FIG. 6, in the case of an uplink signal, a synchronization Ethernet frame having an OSI layer structure is received through the PHY layer 300, and a type field 440 of 2 octets for indicating the type of a frame is checked. In operation S600, the parser 370 of the xMII layer 310 determines whether the synchronization frame region or the asynchronous frame region is transmitted (S610), and then transfers the synchronization frame region to the synchronization frame processor 400. In the case of an area, it is transmitted to the asynchronous frame unit 330. Here, the asynchronous frame unit 330 is composed of a bridging layer 360 and the MAC layer 350 to perform the operation of the data link layer of the conventional IEEE 802.3.

The synchronous frame of the synchronous frame region transferred to the synchronous frame unit 320 is transferred to the synchronous frame processing unit 400 composed of software and analyzed the synchronous header 418 included in the multimedia data (S620). In reverse order, the sync header 418, the type 416, and the MAC addresses 412 and 414 inserted in the MAC-IN-MAC method are deleted (S630 to S650), and the asynchronous frame part is deleted. Restore to an Ethernet frame, such as an asynchronous frame transmitted through 330. The recovered synchronous frame and the asynchronous frame are queued in each queue (S660, S670) and transferred to the layer for processing the multimedia data of the upper layer (S680).

As described above, a hierarchical structure and a processing method for synchronous Ethernet according to an embodiment of the present invention can be made. Meanwhile, in the above description of the present invention, specific embodiments have been described, but various modifications do not depart from the gist of the present invention. There may be various embodiments without. Therefore, the scope of the present invention should not be defined by the described embodiments, but by the claims and equivalents thereof.

According to the present invention made as described above by providing a synchronization Ethernet layer structure and processing method that satisfies the IEEE 802.11 standard by storing the parameters necessary for the synchronization Ethernet in the commercial physical layer device and MAC device in implementing the synchronization Ethernet, Compatibility with existing commercial devices and layers can enhance Synchronous Ethernet's competitiveness.

Claims (11)

In the layering processing apparatus for synchronous Ethernet, A PHY layer, which is the lowest layer of the OSI layer structure, is directly related to hardware and performs input / output of an Ethernet frame; The Ethernet layer is delivered to the PHY layer, the MAC layer for packetizing the Ethernet frame delivered from the PHY layer to the upper layer, and whether the relay is analyzed based on the information contained in the Ethernet frame by analyzing the Ethernet frame. An asynchronous frame unit configured to configure an bridging layer for transmitting an Ethernet frame to a corresponding destination when a relay is determined; And And a sync frame unit for inserting a MAC address, an Ether-Type, and a sync header into a sync frame transmitted from an upper layer. The method of claim 1, wherein the sync frame unit parses a sync frame transmitted from a lower layer to delete a MAC address inserted in a synch header, an ether-type, and a MAC-IN-MAC scheme. Layered processing unit for synchronous Ethernet. The method of claim 1, And an xMII layer, which is an 802.3 MAC-PLS interface layer for connecting between the PHY layer and a data link layer consisting of the synchronous frame unit and the asynchronous frame unit. 4. The apparatus of claim 3, wherein the xMII layer comprises: a parser for dividing the Ethernet frame into respective sync frames and asynchronous frames; And And a scheduler for scheduling the synchronous frames and the asynchronous frames received from the synchronous frame unit and the asynchronous frame unit based on priority in one cycle. The Ethernet frame of claim 1, wherein a transmission cycle for data transmission comprises one cycle of 125usec units, and each cycle includes an asynchronous frame for transmission of asynchronous data and a synchronization frame for transmission of synchronization data. Layered processing device for synchronous Ethernet. 2. The apparatus of claim 1, wherein the sync frame comprises: a preamble field configured to synchronize transmission timing of the Ethernet frame; A destination address field configured to indicate a transmission destination of the Ethernet frame; A source address field configured to indicate a transmission source of the Ethernet frame; A type field for indicating a format of the Ethernet frame; A synchronization data field for storing the multimedia data to be transmitted; And And an FCS field configured to check whether an error occurs during transmission in the Ethernet frame transmission. The method of claim 5, wherein the sync frame unit copies the original MAC address between the preamble field and the destination address field of the sync frame to insert a MAC address in the outer space, and a type field is located behind the inserted MAC address. Inserting a sync header layered processing device for synchronous Ethernet. 8. The apparatus of claim 7, wherein the type field contains information for identifying that the frame is a sync frame. In a synchronous Ethernet hierarchy, Determining whether data to be transmitted in a synchronous frame or asynchronous frame is input when an Ethernet frame such as multimedia data is input from an upper layer of the OSI hierarchy structure; If the Ethernet frame is determined to be a sync frame, receiving the same through a corresponding interface and inserting a MAC address, a type, and a sync header in a MAC-IN-MAC manner for the sync frame; Transferring the inserted sync frame and the asynchronous frame to an xMII layer and waiting in each queue; And Waiting in each of the queues comprising the step of constituting the synchronization Ethernet frame of one transmission cycle and transmitting to the PHY layer, characterized in that the layering processing method for synchronous Ethernet. 10. The method of claim 9, wherein the inserting process comprises copying an original MAC address between a preamble field and a destination address field of the sync frame, inserting a MAC address in the outer part, and a type field and the sync after the MAC address inserted in the outer part. And inserting a header. In a synchronous Ethernet hierarchy, Checking a type field indicating a format of a frame when an Ethernet frame such as multimedia data is input from a lower layer of the OSI hierarchy; Determining whether the frame is a synchronous frame region or an asynchronous frame region through the type field; Analyzing a sync header included in the sync frame when determining the sync frame through the type field; Deleting a sync header, a type, and a MAC address inserted in a MAC-IN-MAC scheme for the sync frame; Restoring the deleted sync frame and the asynchronous frame to the original Ethernet frame and waiting for the restored sync frame and the asynchronous frame to each queue; And Waiting in each of the queues and transferring to the layer for processing the multimedia data of the upper layer.

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