KR100796511B1 - Method for obtaining drain saturation voltage in mosfet - Google Patents

Method for obtaining drain saturation voltage in mosfet Download PDF

Info

Publication number
KR100796511B1
KR100796511B1 KR1020060072031A KR20060072031A KR100796511B1 KR 100796511 B1 KR100796511 B1 KR 100796511B1 KR 1020060072031 A KR1020060072031 A KR 1020060072031A KR 20060072031 A KR20060072031 A KR 20060072031A KR 100796511 B1 KR100796511 B1 KR 100796511B1
Authority
KR
South Korea
Prior art keywords
voltage
drain
mosfet
obtaining
saturation voltage
Prior art date
Application number
KR1020060072031A
Other languages
Korean (ko)
Inventor
김철수
Original Assignee
동부일렉트로닉스 주식회사
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by 동부일렉트로닉스 주식회사 filed Critical 동부일렉트로닉스 주식회사
Priority to KR1020060072031A priority Critical patent/KR100796511B1/en
Application granted granted Critical
Publication of KR100796511B1 publication Critical patent/KR100796511B1/en

Links

Images

Classifications

    • G—PHYSICS
    • G01—MEASURING; TESTING
    • G01R—MEASURING ELECTRIC VARIABLES; MEASURING MAGNETIC VARIABLES
    • G01R19/00—Arrangements for measuring currents or voltages or for indicating presence or sign thereof
    • G01R19/04—Measuring peak values or amplitude or envelope of ac or of pulses
    • G—PHYSICS
    • G01—MEASURING; TESTING
    • G01R—MEASURING ELECTRIC VARIABLES; MEASURING MAGNETIC VARIABLES
    • G01R19/00—Arrangements for measuring currents or voltages or for indicating presence or sign thereof
    • G01R19/175—Indicating the instants of passage of current or voltage through a given value, e.g. passage through zero
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
    • H01L29/66—Types of semiconductor device ; Multistep manufacturing processes therefor
    • H01L29/68—Types of semiconductor device ; Multistep manufacturing processes therefor controllable by only the electric current supplied, or only the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched
    • H01L29/76—Unipolar devices, e.g. field effect transistors
    • H01L29/772—Field effect transistors
    • H01L29/78—Field effect transistors with field effect produced by an insulated gate

Landscapes

  • Physics & Mathematics (AREA)
  • General Physics & Mathematics (AREA)
  • Engineering & Computer Science (AREA)
  • Power Engineering (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Ceramic Engineering (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • Computer Hardware Design (AREA)
  • Testing Of Individual Semiconductor Devices (AREA)

Abstract

A method for calculating drain saturation voltage in an MOSFET is provided to reduce the time and economical loss for evaluating the on/off characteristics of a transistor and improving the transistor by simplifying a process for computing drain saturation voltage. A method for calculating drain saturation voltage in an MOSFET comprises steps for maintaining gate voltage(Vgs) of a predetermined range at zero(V) and measuring drain current(Ids) with increasing drain voltage(Vds) from zero to operation voltage(S110); calculating output conductance(gds) from drain voltage and drain current by using the following formula, gds=alphaIds/alphaVds(S120); calculating a G function from output conductance by using the following formula, G=gds.alpha/alphaVds(1/gds); differentiating the G function by drain voltage and obtaining first drain voltage that a differentiated value becomes zero(S130); judging whether gate voltage of the predetermined range is a maximum value or not(S140); and storing the first drain voltage as drain saturation voltage if the gate voltage becomes a maximum value(S150,S160).

Description

ＭＯＳＦＥＴ에서 드레인 포화 전압을 구하는 방법{Method for Obtaining Drain Saturation Voltage in MOSFET}Method for Obtaining Drain Saturation Voltage in MOSFET

도 1은 본 발명의 바람직한 실시예에 따른 MOSFET에서 드레인 포화 전압을 구하는 방법을 나타낸 흐름도이다.1 is a flowchart illustrating a method of obtaining a drain saturation voltage in a MOSFET according to a preferred embodiment of the present invention.

본 발명은 MOSFET에서 드레인 포화 전압을 구하는 방법에 관한 것으로, 좀 더욱 상세하게는 드레인 전압 및 드레인 전류를 측정하고, 측정한 드레인 전압 및 드레인 전류를 이용하여 출력 컨덕턴스를 계산하며, 출력 컨덕턴스를 이용하여 구한 G 함수를 한 번 더 미분하여 0이 되는 드레인 전압값을 구하는 방법에 관한 것이다.The present invention relates to a method for obtaining a drain saturation voltage in a MOSFET, and more particularly, to measure a drain voltage and a drain current, calculate an output conductance using the measured drain voltage and the drain current, and use the output conductance. The present invention relates to a method of obtaining a drain voltage value of 0 by differentiating the obtained G function once more.

MOSFET이 작동하는 데 필요한 선형 영역(Linear Region)과 포화 영역(Saturation Region)을 구분하는 점으로서, 드레인 포화 전압(Drain Saturation Voltage)이 이용된다. 이 파라미터(Parameter)를 통하여 MOSFET의 트라이오드 영역(Triode Region)과 포화 영역을 구분하고 MOSFET의 작동 영역(Operation Region)을 확인할 수 있다.The drain saturation voltage is used to distinguish between the linear region and the saturation region required for the MOSFET to operate. Through this parameter, the triode and saturation regions of the MOSFET can be distinguished and the operation region of the MOSFET can be identified.

따라서, MOS 트랜지스터가 포함된 반도체 소자의 제조에서는 개별 MOS 트랜지스터의 드레인 포화 전류를 확인하여 반도체 소자의 특성을 평가할 수 있다.Therefore, in the manufacture of a semiconductor device including a MOS transistor, it is possible to check the drain saturation current of the individual MOS transistor to evaluate the characteristics of the semiconductor device.

한편, 종래에 드레인 포화 전압(

Figure 112006055016007-pat00007
)을 구하는 방법은 MOSFET의 드레인 전류(
Figure 112006055016007-pat00008
) 및 드레인 전압(
Figure 112006055016007-pat00009
)으로부터 아래의 수학식 1을 이용하여 출력 컨덕턴스(
Figure 112006055016007-pat00010
)를 구하고, 아래의 수학식 2와 같이 G 함수를 얻으며,
Figure 112006055016007-pat00011
플롯(Plot)에서 드레인 포화 전압을 얻는다. MOSFET의 선형 영역에서는 G 함수가
Figure 112006055016007-pat00012
에 따라 증가하고, 포화 영역에서는 감소하므로, 드레인 포화 전압은
Figure 112006055016007-pat00013
플롯에서 최대(Peak)가 되는 지점에서의 드레인 전압이다.Meanwhile, the drain saturation voltage (
Figure 112006055016007-pat00007
) Is the drain current of the MOSFET (
Figure 112006055016007-pat00008
) And drain voltage (
Figure 112006055016007-pat00009
From the output conductance (
Figure 112006055016007-pat00010
) And the G function as shown in Equation 2 below.
Figure 112006055016007-pat00011
Obtain the drain saturation voltage in the plot. In the linear region of the MOSFET, the G function
Figure 112006055016007-pat00012
And decreases in the saturated region, so the drain saturation voltage
Figure 112006055016007-pat00013
The drain voltage at the point in the plot that peaks.

Figure 112006055016007-pat00014
Figure 112006055016007-pat00014

Figure 112006055016007-pat00015
Figure 112006055016007-pat00015

하지만, 종래에 드레인 포화 전압을 구하는 방법은 발명이 더 복잡할 뿐만 아니라 절차 중에 수작업으로 진행하는 것이 많아 측정 데이터에 에러값이 포함되는 경우도 발생하여 시간 및 경제적인 손실이 발생하게 되는 문제점이 있었다.However, in the conventional method of obtaining the drain saturation voltage, the invention is not only more complicated, but also has to be manually performed during the procedure, so that an error value is included in the measurement data, resulting in a time and economic loss. .

전술한 문제점을 해결하기 위해 본 발명은, 드레인 전압 및 드레인 전류를 측정하고, 측정한 드레인 전압 및 드레인 전류를 이용하여 출력 컨덕턴스를 계산하며, 출력 컨덕턴스를 이용하여 구한 G 함수를 한 번 더 미분하여 0이 되는 드레인 전압값을 구하는 방법을 제공하는 데 그 목적이 있다.In order to solve the above problems, the present invention measures the drain voltage and drain current, calculates the output conductance using the measured drain voltage and the drain current, and further differentiates the G function obtained using the output conductance. Its purpose is to provide a method for obtaining a drain voltage value of zero.

전술한 목적을 달성하기 위해 본 발명은, MOSFET에서 드레인 포화 전압을 구하는 방법으로서, (a) 0(V)에서 n(V) 범위의 게이트 전압(

Figure 112006055016007-pat00016
)을 일정하게 유지하고, 드레인 전압(
Figure 112006055016007-pat00017
)을 0(V)에서부터 동작 전압까지 증가시키면서 드레인 전류(
Figure 112006055016007-pat00018
)를 측정하는 단계; (b) 상기 드레인 전압 및 상기 드레인 전류로부터 수학식
Figure 112006055016007-pat00019
을 이용하여 출력 컨덕턴스(
Figure 112006055016007-pat00020
)를 계산하는 단계; (c) 상기 출력 컨덕턴스로부터 수학식
Figure 112006055016007-pat00021
를 이용하여 G 함수를 구하는 단계; (d) 상기 G 함수를 드레인 전압으로 미분하고, 미분한 값이 0이 되도록 하는 제 1 드레인 전압을 구하는 단계; (e) 상기 게이트 전압이 최대치인 n(V)인지 여부를 판단하는 단계; 및 (f) 상기 단계 (e)에서 상기 게이트 전압이 최대치인 n(V)인 경우 상기 제 1 드레인 전압을 드레인 포화 전압으로 저장하는 단계를 포함한다.In order to achieve the above object, the present invention provides a method for obtaining a drain saturation voltage in a MOSFET, which includes: (a) a gate voltage in the range of 0 (V) to n (V)
Figure 112006055016007-pat00016
) And keep the drain voltage (
Figure 112006055016007-pat00017
) While increasing the drain current from 0 (V) to the operating voltage.
Figure 112006055016007-pat00018
Measuring); (b) equation from the drain voltage and the drain current
Figure 112006055016007-pat00019
Using output conductance (
Figure 112006055016007-pat00020
Calculating; (c) equation from the output conductance
Figure 112006055016007-pat00021
Obtaining a G function using; (d) deriving a first drain voltage by differentiating the G function by the drain voltage and causing the derivative to be zero; (e) determining whether the gate voltage is n (V), the maximum value; And (f) storing the first drain voltage as a drain saturation voltage when the gate voltage in step (e) is n (V), the maximum value.

이하, 본 발명의 바람직한 실시예를 첨부된 도면들을 참조하여 상세히 설명한다. 우선 각 도면의 구성요소들에 참조부호를 부가함에 있어서, 동일한 구성요소들에 대해서는 비록 다른 도면상에 표시되더라도 가능한 한 동일한 부호를 가지도록 하고 있음에 유의해야 한다. 또한, 본 발명을 설명함에 있어, 관련된 공지 구성 또는 기능에 대한 구체적인 설명이 본 발명의 요지를 흐릴 수 있다고 판단되는 경우에는 그 상세한 설명은 생략한다.Hereinafter, exemplary embodiments of the present invention will be described in detail with reference to the accompanying drawings. First of all, in adding reference numerals to the components of each drawing, it should be noted that the same reference numerals are used as much as possible even if displayed on different drawings. In addition, in describing the present invention, when it is determined that the detailed description of the related well-known configuration or function may obscure the gist of the present invention, the detailed description thereof will be omitted.

도 1은 본 발명의 바람직한 실시예에 따른 MOSFET에서 드레인 포화 전압을 구하는 방법을 나타낸 흐름도이다.1 is a flowchart illustrating a method of obtaining a drain saturation voltage in a MOSFET according to a preferred embodiment of the present invention.

도 1을 참조하면, 측정 장비를 이용하여 0(V)에서 n(V) 범위의 게이트 전압(

Figure 112006055016007-pat00022
)을 일정하게 유지하고, 드레인 전압(
Figure 112006055016007-pat00023
)을 0(V)에서부터 동작 전압까지 증가시키면서 드레인 전류(
Figure 112006055016007-pat00024
)를 측정한다(S110).Referring to FIG. 1, gate voltages ranging from 0 (V) to n (V) using measurement equipment
Figure 112006055016007-pat00022
) And keep the drain voltage (
Figure 112006055016007-pat00023
) While increasing the drain current from 0 (V) to the operating voltage.
Figure 112006055016007-pat00024
) Is measured (S110).

단계 S110에서 측정한 드레인 전류(

Figure 112006055016007-pat00025
) 및 드레인 전압(
Figure 112006055016007-pat00026
)로부터 아래의 수학식 3을 이용하여 출력 컨덕턴스(
Figure 112006055016007-pat00027
)를 계산한다(S120). 여기서, 최소제곱법(Least Square Method)을 이용하여 에러율을 최소화한다.The drain current measured in step S110 (
Figure 112006055016007-pat00025
) And drain voltage (
Figure 112006055016007-pat00026
), The output conductance (
Figure 112006055016007-pat00027
) Is calculated (S120). Here, the error rate is minimized by using the Least Square Method.

Figure 112006055016007-pat00028
Figure 112006055016007-pat00028

단계 S120에서 출력 컨덕턴스를 수학식 4와 같이 드레인 전압에 대해

Figure 112006055016007-pat00029
로 미분하고 츨력 컨덕턴스(
Figure 112006055016007-pat00030
)를 곱해 G 함수를 구한다(S130).In step S120, the output conductance with respect to the drain voltage as
Figure 112006055016007-pat00029
Differential and output conductance (
Figure 112006055016007-pat00030
Multiply by) to obtain a G function (S130).

Figure 112006055016007-pat00031
Figure 112006055016007-pat00031

수학식 5와 같이 G 함수를 드레인 전압(

Figure 112006055016007-pat00032
)으로 미분하고, 미분한 값이 0이 되도록 하는 드레인 전압(즉, 드레인 포화 전압)을 구한다(S140).As shown in Equation 5, the G function
Figure 112006055016007-pat00032
), And obtain a drain voltage (ie, drain saturation voltage) such that the derivative value becomes 0 (S140).

Figure 112006055016007-pat00033
Figure 112006055016007-pat00033

게이트 전압(

Figure 112006055016007-pat00034
)이 최대치인 n(V)인지 여부를 판단한다(S150).Gate voltage
Figure 112006055016007-pat00034
) Is determined whether n (V) is the maximum value (S150).

단계 S150에서 게이트 전압(

Figure 112006055016007-pat00035
)이 최대치인 n(V)가 아닌 경우 게이트 전압(
Figure 112006055016007-pat00036
)을 증가시키고(S152), 단계 S110으로 돌아간다.In step S150, the gate voltage (
Figure 112006055016007-pat00035
) Is not the maximum n (V), the gate voltage (
Figure 112006055016007-pat00036
) Is increased (S152), and the process returns to step S110.

단계 S150에서 게이트 전압(

Figure 112006055016007-pat00037
)이 최대치인 n(V)인 경우 측정 및 계산한 데이터를 저장한다(S160).In step S150, the gate voltage (
Figure 112006055016007-pat00037
If) is the maximum value n (V) and stores the measured and calculated data (S160).

이상의 설명은 본 발명의 기술 사상을 예시적으로 설명한 것에 불과한 것으 로서, 본 발명이 속하는 기술 분야에서 통상의 지식을 가진 자라면 본 발명의 본질적인 특성에서 벗어나지 않는 범위에서 다양한 수정 및 변형이 가능할 것이다. 따라서, 본 발명에 개시된 실시예들은 본 발명의 기술 사상을 한정하기 위한 것이 아니라 설명하기 위한 것이고, 이러한 실시예에 의하여 본 발명의 기술 사상의 범위가 한정되는 것은 아니다. 본 발명의 보호 범위는 아래의 청구범위에 의하여 해석되어야 하며, 그와 동등한 범위 내에 있는 모든 기술 사상은 본 발명의 권리범위에 포함되는 것으로 해석되어야 할 것이다.The above description is merely illustrative of the technical idea of the present invention, and those skilled in the art to which the present invention pertains may make various modifications and changes without departing from the essential characteristics of the present invention. Therefore, the embodiments disclosed in the present invention are not intended to limit the technical idea of the present invention but to describe the present invention, and the scope of the technical idea of the present invention is not limited by these embodiments. The protection scope of the present invention should be interpreted by the following claims, and all technical ideas within the equivalent scope should be interpreted as being included in the scope of the present invention.

이상에서 설명한 바와 같이 본 발명에 의하면, 종래의 G 함수를 한 번 더 미분하고 미분한 값이 0이 되도록 하는 드레인 포화 전압을 구함으로써, 드레인 포화 전압을 구하는 절차의 간략화로 인해 트랜지스터의 온, 오프 특성 평가 및 트랜지스터 개발에 시간적, 경제적 손실이 감소하는 효과가 있다.As described above, according to the present invention, the transistor is turned on and off due to the simplification of the procedure for obtaining the drain saturation voltage by obtaining the drain saturation voltage which makes the conventional G function different once more and the derivative value becomes zero. This has the effect of reducing the time and economic losses in the characterization and transistor development.

Claims (3)

MOSFET에서 드레인 포화 전압을 구하는 방법에 있어서,In the method for obtaining the drain saturation voltage in the MOSFET, (a) 0(V)에서 소정 범위의 게이트 전압(
Figure 112007074539762-pat00038
)을 일정하게 유지하고, 드레인 전압(
Figure 112007074539762-pat00039
)을 0(V)에서부터 동작 전압까지 증가시키면서 드레인 전류(
Figure 112007074539762-pat00040
)를 측정하는 단계;(a) a gate voltage in the range of 0 (V) (
Figure 112007074539762-pat00038
) And keep the drain voltage (
Figure 112007074539762-pat00039
) While increasing the drain current from 0 (V) to the operating voltage.
Figure 112007074539762-pat00040
Measuring); (b) 상기 드레인 전압 및 상기 드레인 전류로부터 수학식
Figure 112007074539762-pat00041
을 이용하여 출력 컨덕턴스(
Figure 112007074539762-pat00042
)를 계산하는 단계;(b) equation from the drain voltage and the drain current
Figure 112007074539762-pat00041
Using output conductance (
Figure 112007074539762-pat00042
Calculating; (c) 상기 출력 컨덕턴스로부터 수학식
Figure 112007074539762-pat00043
를 이용하여 G 함수를 구하는 단계;(c) equation from the output conductance
Figure 112007074539762-pat00043
Obtaining a G function using; (d) 상기 G 함수를 드레인 전압으로 미분하고, 미분한 값이 0이 되도록 하는 제 1 드레인 전압을 구하는 단계;(d) deriving a first drain voltage by differentiating the G function by the drain voltage and causing the derivative to be zero; (e) 상기 소정범위의 게이트 전압이 최대치인지 여부를 판단하는 단계; 및(e) determining whether the gate voltage of the predetermined range is maximum; And (f) 상기 단계 (e)에서 상기 소정범위의 게이트 전압이 최대치인 경우 상기 제 1 드레인 전압을 드레인 포화 전압으로 저장하는 단계(f) storing the first drain voltage as a drain saturation voltage when the gate voltage of the predetermined range in step (e) is a maximum value; 를 포함하는 것을 특징으로 하는 MOSFET에서 드레인 포화 전압을 구하는 방법.Obtaining the drain saturation voltage in the MOSFET comprising a. 제 1 항에서,In claim 1, 상기 단계 (b)는Step (b) is 최소제곱법(Least Square Method)을 이용하여 출력 컨덕턴스(
Figure 112006055016007-pat00044
)를 계산하는 것을 특징으로 하는 MOSFET에서 드레인 포화 전압을 구하는 방법.Output Conductance (Least Square Method)
Figure 112006055016007-pat00044
To obtain the drain saturation voltage in the MOSFET. 제 1 항에서,In claim 1, 상기 단계 (f) 이후에,After the step (f), (g) 상기 단계 (e)에서 상기 소정범위의 게이트 전압이 최대치가 아닌 경우 상기 게이트 전압을 증가시키고, 상기 단계 (a)로 돌아가는 단계(g) increasing the gate voltage if the gate voltage in the predetermined range is not the maximum in step (e), and returning to step (a) 를 추가로 포함하는 것을 특징으로 하는 MOSFET에서 드레인 포화 전압을 구하는 방법.The method of obtaining a drain saturation voltage in the MOSFET characterized in that it further comprises.
KR1020060072031A 2006-07-31 2006-07-31 Method for obtaining drain saturation voltage in mosfet KR100796511B1 (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
KR1020060072031A KR100796511B1 (en) 2006-07-31 2006-07-31 Method for obtaining drain saturation voltage in mosfet

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
KR1020060072031A KR100796511B1 (en) 2006-07-31 2006-07-31 Method for obtaining drain saturation voltage in mosfet

Publications (1)

Publication Number Publication Date
KR100796511B1 true KR100796511B1 (en) 2008-01-21

Family

ID=39218716

Family Applications (1)

Application Number Title Priority Date Filing Date
KR1020060072031A KR100796511B1 (en) 2006-07-31 2006-07-31 Method for obtaining drain saturation voltage in mosfet

Country Status (1)

Country Link
KR (1) KR100796511B1 (en)

Citations (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH07128395A (en) * 1992-10-15 1995-05-19 Nippon Inter Electronics Corp Inspection method for semiconductor chip
KR960009224A (en) * 1994-08-19 1996-03-22 Simulation method of hot carrier degradation of P-MOS transistors
JPH09167923A (en) * 1995-12-14 1997-06-24 Mitsumi Electric Co Ltd Output amplifier for acoustic equipment
JPH11125649A (en) 1997-10-22 1999-05-11 Adekkusu Kk Voltage-measuring apparatus of average value type

Patent Citations (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH07128395A (en) * 1992-10-15 1995-05-19 Nippon Inter Electronics Corp Inspection method for semiconductor chip
KR960009224A (en) * 1994-08-19 1996-03-22 Simulation method of hot carrier degradation of P-MOS transistors
JPH09167923A (en) * 1995-12-14 1997-06-24 Mitsumi Electric Co Ltd Output amplifier for acoustic equipment
JPH11125649A (en) 1997-10-22 1999-05-11 Adekkusu Kk Voltage-measuring apparatus of average value type

Similar Documents

Publication Publication Date Title
US7218132B2 (en) System and method for accurate negative bias temperature instability characterization
CN102103184B (en) Method for extracting non-linear thermal resistance of transistor
WO2018010078A1 (en) Method for statistically analyzing process parameters of gan device based on large-signal equivalent circuit model
CN109188236A (en) A kind of threshold voltage detection method of metal-oxide-semiconductor
Holmstrom et al. A gate probe method of determining parasitic resistance in MESFET's
US8285524B2 (en) Simulation method for transistor unsuitable for existing model
CN111220888B (en) Method and device for testing turn-on voltage of transistor
KR100796511B1 (en) Method for obtaining drain saturation voltage in mosfet
SA522441303B1 (en) A CMC-Based Method for Surfactant Concentration Determination
US7039566B2 (en) Method of estimating a lifetime of hot carrier of MOS transistor, and simulation of hot carrier degradation
US20150192635A1 (en) Method for Analyzing Discrete Traps in Semiconductor Devices
Ruch et al. Localizing hot-carrier degradation in Silicon trench MOSFETs
KR20160110116A (en) Systems, methods and computer program products for analyzing performance of semiconductor devices
US20060241904A1 (en) Determination of standard deviation
US7859288B2 (en) Test apparatus and test method for testing a device based on quiescent current
JP2002353440A (en) Method and device for simulating characteristics of semiconductor element
CN110658436A (en) Characterization method for MOS transistor performance degradation under radio frequency stress
JP3204298B2 (en) Method and apparatus for measuring gate length of MOSFET device
ATE431017T1 (en) ESTIMATION OF A RECEIVED SIGNAL STRENGTH
Lee et al. Inversion MOS capacitance extraction for ultra-thin gate oxide using BSIM4
Fajardo et al. Correction of the errors due to the non zero drain-to-source voltage in the gm/ID based Vth extraction methods
Dubois et al. Modelling of hot-carrier degradation and its application for analog design for reliability
Zakharov et al. Identification of Non-Polynomial Calibration Dependence Accounting for Instrumental Uncertainties of Measuring Instruments
JP2016053571A (en) Measurement precision estimation device, method, and program
Diaz et al. Efficient Parameter Extraction and Statistical Analysis for a 0.25 um low-power CMOS Process

Legal Events

Date Code Title Description
A201 Request for examination
E902 Notification of reason for refusal
E701 Decision to grant or registration of patent right
GRNT Written decision to grant
FPAY Annual fee payment

Payment date: 20101222

Year of fee payment: 4

LAPS Lapse due to unpaid annual fee