KR100786550B1 - Display device and Method for manufacturing the display device - Google Patents

Abstract

It is an object of the present invention to provide an EL display device having high operating performance and reliability.

The third passivation film 45 includes an EL element 203 including a pixel electrode (anode) 46, an EL layer 47, and a cathode 48 so as to form a structure in which heat generated by the EL element 203 is released. Is placed below. Further, the third passivation film 45 prevents the alkali metal inside the EL element 203 from diffusing to the TFT side, and prevents moisture and oxygen from the TFT from penetrating into the EL element 203. In particular, the heat dissipation effect is given to the fourth passivation film 50 so that the EL element 203 is surrounded by the heat dissipation layer.

Electro-optical device, electronic device, passivation film, pixel electrode, EL element, EL layer, TFT

Description

Display device and method for manufacturing the same

1 shows a cross-sectional structure of a pixel portion of an EL display device.

2A and 2B show a plan view and a configuration of a pixel portion of an EL display device, respectively;

3A to 3E are views showing a manufacturing process of an active matrix type EL display device.

4A to 4D show manufacturing steps of an active matrix type EL display device.

5A to 5C show a manufacturing process of an active matrix type EL display device.

6 is a view of the EL module viewed from the outside;

7 shows a circuit block structure of an EL display device.

8 is an enlarged view of a pixel portion of an EL display device;

Fig. 9 is a diagram showing an element structure of a sampling circuit of an EL display device.

Fig. 10 is a diagram showing the configuration of a pixel portion of an EL display device.

Fig. 11 is a diagram showing a cross-sectional structure of an EL display device.

12A and 12B show a plan view and a configuration of a pixel portion of an EL display device, respectively;

Fig. 13 is a diagram showing a cross-sectional structure of a pixel portion of an EL display device.

Fig. 14 is a diagram showing a cross-sectional structure of a pixel portion of an EL display device.

15A and 15B show a plan view and a configuration of a pixel portion of an EL display device, respectively.

16A-16F illustrate specific examples of electronic devices.

17A and 17B are views of the EL module viewed from the outside.

18A-18C illustrate a process for producing a contact structure.

19 shows a laminated structure of an EL layer.

20A and 20B illustrate specific examples of electronic equipment.

21A and 21B show a circuit configuration of a pixel portion of an EL display device.

22A and 22B show a circuit configuration of a pixel portion of an EL display device.

Fig. 23 is a diagram showing a cross-sectional structure of a pixel portion of an EL display device.

* Description of the symbols for the main parts of the drawings *

11 substrate 12 base film

13 source region 14 drain region

15a to 15d: LDD region 16: High concentration impurity region

17a, 17b: channel forming region 18: gate insulating film

19a and 19b: Gate electrode 20: First interlayer insulating film

21: source wiring 22: drain wiring

The present invention provides an electroluminescence (EL) display device formed by an electro-optical device, usually a semiconductor element (element using a semiconductor thin film) made on a substrate, and an electron having an electro-optical device as a display device (also called a display portion). It relates to equipment (electronic device).

The technology of forming TFT on a substrate has been widely spread in recent years, and the application to the active matrix display device is progressing. In particular, a TFT using a polysilicon film has a higher field effect mobility (called mobility) than a TFT using a conventional amorphous silicon film, so that high speed operation is possible. As a result, the pixel control normally performed by the drive circuit external to a board | substrate can be performed by the drive circuit formed on the same board | substrate as a pixel.

In this kind of active matrix display device, many kinds of advantages that can be obtained by decorating different circuits and elements on the same substrate, for example, because of reduced manufacturing costs, miniaturization, increased yields and higher throughput, this kind of active matrix display The device is in the limelight.

The light emitting layer (EL layer) is made to emit light in an active matrix EL display device by arranging a switching element formed in each pixel from a TFT and driving a driving element which performs current control by the switching element. For example, there is an EL display device disclosed in US Pat. No. 5,684,365 (Japanese Patent Laid-Open No. 8-234683 and Japanese Patent Laid-Open No. 10-189252).

Deterioration of EL materials due to moisture has caused problems for these EL display devices. In particular, the organic EL material deteriorates not only moisture but also oxygen. Therefore, the EL element is generally shielded from moisture and the like by sealing the EL element as disclosed in Japanese Patent Laid-Open No. 8-78159.

However, the problem with the EL element is not limited only to moisture. The EL layer contains an alkali metal such as sodium (Na) in itself, and serious problems may occur during operation of the TFT if the alkali metal is diffused into the TFT. Further, deterioration due to heat accumulation also becomes a problem because the EL layer is weak in heat. Alkali metals are referred to throughout the specification as 'alkali metals' which include alkaline earth metals.

In view of the above prior art, it is an object of the present invention to provide an electro-optical device having good operating performance and high reliability, and in particular to provide an EL display device. Another object of the present invention is to increase the quality of electronic equipment (electronic devices) having an electro-optical device as a display device by increasing the image quality of the electro-optical device.

In order to achieve the above object, deterioration of the EL element due to moisture, deterioration due to heat and release of alkali metal are prevented by the present invention. Specifically, an insulating film satisfying these things is disposed in contact with the EL element, or more preferably, the EL element is surrounded by such an insulating film.

That is, an insulating film having moisture and alkali metal blocking effect and heat dissipation effect is disposed at the position closest to the EL element, and deterioration of the EL element is suppressed by the insulating film.

A laminate of an insulating film having a moisture and alkali metal blocking effect and an insulating film having a moisture proof effect can be used when such an insulating film cannot be used as a single layer. Further, a laminated film of an insulating film having a water blocking effect, an insulating film having an alkali metal blocking effect and an insulating film having a heat radiating effect can be used.

In both methods, a measurement method of both moisture and heat must be found in order to suppress deterioration of the EL element (also referred to as deterioration of the EL element), and it is measured for heat, moisture and alkali metal of the TFT itself driving the EL element. Needs to be.

1 to 2B are used to illustrate preferred embodiments of the present invention. Fig. 1 is a sectional view of a pixel of an EL display device of the present invention, Fig. 2A is a plan view, and Fig. 2B is a circuit configuration. In practice, the pixel portion (image display portion) is formed of a plurality of pixels of this kind arranged in a matrix state.

1 is a cross-sectional view taken along the line A-A 'in the plan view shown in FIG. 2A. Since the common symbols have been used in FIGS. 1 and 2A and 2B, the three figures may be referred to as appropriate. Moreover, the two pixels are shown in the top view of Fig. 2A, both of which have the same structure.

In Fig. 1, reference numeral 11 denotes a substrate, and reference 12 denotes a base film. Glass substrates, glass ceramic substrates, quartz substrates, silicon substrates, ceramic substrates, metal substrates or plastic substrates (including plastic films) may be used as the substrate 11.

In addition, the base film 12 is effective especially when a substrate containing moving ions or a substrate having conductivity is used, but need not be formed for a quartz substrate. The insulating film containing silicon may be formed as the base film 12. The term " silicon containing insulating film " particularly refers to an insulating film containing silicon, oxygen and nitrogen in a predetermined ratio, such as a silicon oxide film, a silicon nitride film, or a silicon oxynitride film (SiO _x N _y ).

In addition, by providing a heat radiating effect to the base film 12, it is effective in preventing deterioration of the TFT or EL element and dissipating heat generated in the TFT. All known materials can be used to give the heat dissipation effect.

Two TFTs are formed in the pixel here. Reference numeral 201 denotes a TFT functioning as a switching element (hereinafter referred to as a switching TFT), and reference numeral 202 denotes a TFT (hereinafter referred to as current control TFT) functioning as a current control element for controlling the amount of current flowing to the EL element. And both are formed of n-channel TFTs.

Since the field effect mobility of the n-channel TFT is larger than the field effect mobility of the p-channel TFT, the operating speed is high and the current can flow easily. Also, even though the same amount of current flows, the n-channel TFT can be made smaller. Therefore, the effective surface area of the display portion becomes large when using the n-channel TFT as the current control TFT, which is preferable.

The p-channel TFT has the advantage that high temperature carrier injection is not necessarily a problem, and the advantage that the off current value is low, and an example of using the p-channel TFT as a switching TFT and a current control TFT has already been reported. However, by using a structure in which the position of the LDD region is different, the problem of high temperature carrier injection and off current value in the n-channel TFT is solved by the present invention. The present invention is characterized by using n-channel TFTs for all the TFTs in all the pixels.

In the present invention, it is not necessary to limit the switching TFT and the current control TFT to the n-channel TFT, and the p-channel TFT can be used for any or all of the switching TFT and the current control TFT.

The switching TFT 201 includes an active layer including a source region 13, a drain region 14, LDD regions 15a to 15d, a high concentration impurity region 16, and channel formation regions 17a and 17b; The gate insulating film 18; The gate electrodes 19a and 19b, the first interlayer insulating film 20, the source wiring 21 and the drain wiring 22 are formed.

As shown in Fig. 2A, the gate electrodes 19a and 19b are double gate structures electrically connected by gate wiring 211 formed of different materials (materials having a lower resistance than the gate electrodes 19a and 19b). It is. Of course, not only a double gate structure, but also a so-called multi-gate structure (a structure including an active layer having two or more channel formation regions connected in series), for example, a triple gate structure can also be used. The multi-gate structure is extremely effective for lowering the value of the off current extremely, and by making the switching TFT 201 of the pixel into a multi-gate structure like the present invention, a low off current value can be realized for the switching TFT.

The active layer is formed of a semiconductor film having a crystal structure. That is, a single crystal semiconductor film can be used, and a polycrystalline semiconductor film or microcrystalline semiconductor film can also be used. The gate insulating film 18 may be formed of an insulating film containing silicon. Also, the conductive film can be used for all gate electrodes, source wirings, and drain wirings.

The LDD regions 15a to 15d of the switching TFT 201 are formed so as not to cover the gate electrodes 19a and 19b by interposing the gate insulating film 18. This structure is particularly effective for reducing the off current value.

An offset region (a region including a semiconductor layer having the same composition as that of the channel formation region and to which no gate voltage is applied) between the channel formation region and the LDD region is more preferable for reducing the off current value. In addition, when a multi-gate structure having two or more gate electrodes is used, the high concentration impurity region formed between the channel formation regions is effective to lower the value of the off current.

By using the multi-gate structure TFT as the switching TFT as described above, a switching element having a sufficiently low off current value is realized by the present invention. Therefore, the gate voltage of the current control TFT can be maintained for a sufficient time (for a period from one selection to the next selection) without forming a capacitor as shown in Fig. 2 of Japanese Patent Laid-Open No. 10-189252.

That is, it is possible to eliminate the capacitor which reduces the effective light emitting surface area, and can increase the effective light emitting surface area. This means that the image quality of the EL display device can be made brighter.

Next, the current control TFT 202 includes an active layer including a source region 31, a drain region 32, an LDD region 33, and a channel forming region 34; The gate insulating film 18; The gate electrode 35; A first interlayer insulating film 20; Source wiring 36; And drain wiring 37. The gate electrode 35 has a single gate structure, but multiple gate structures may also be used.

As shown in FIGS. 2A and 2B, the drain of the switching TFT 201 is electrically connected to the gate of the current control TFT 202. In particular, the gate electrode 35 of the current control TFT 202 is electrically connected to the drain region 14 of the switching TFT 201 through the drain wiring (also called a connection wiring) 22. In addition, the source wiring 36 is connected to the current supply wiring 212.

The characteristic of the current control TFT 202 is that its channel width is larger than the channel width of the switching TFT 201. That is, as shown in Fig. 8, when the channel length of the switching TFT is L1, the channel width is W1, the channel length of the current control TFT is L2, and the channel width is W2, the related equation is W2 / L2 > / L1 (preferably W2 / L2? 10 x W1 / L1). As a result, the current can flow more easily in the current control TFT than in the switching TFT.

The channel length of the multi-gate structure switching TFT is the sum of the channel lengths of two or more channel formation regions formed. Since the double gate structure is formed in the case of Fig. 8, the sum of the channel lengths L1a and L1b of each of the two channel formation regions is the channel length L1 of the switching TFT.

The channel lengths L1, L2 and the channel widths W1, W2 are not particularly limited to the range of values in the present invention, W1 is 0.1 to 5 µm (typically 1 to 3 µm), and W2 is 0.5 to 30 µm (typically 2-10 micrometers) is preferable. At this time, L1 is preferably 0.2 to 18 µm (typically 2 to 15 µm), and L2 is preferably 0.1 to 50 µm (typically 1 to 20 µm).

In order to prevent excessive current from flowing, it is preferable to set the channel length L of the current control TFT on the longer side. Preferably W2 / L2 ≧ 3 (more preferably W2 / L2 ≧ 5). In addition, the current per pixel is 0.5 to 2 mA (preferably 1 to 1.5 mA).

By setting the numerical value within this range, all standards from the EL display device having the VGA grade pixel (640 × 480) number to the EL display device having the high vision class pixel number (1920 × 1080) will be included. Can be.

Further, the length (width) of the LDD region formed in the switching TFT 201 is set to 0.5 to 3.5 탆, usually 2.0 to 2.5 탆.

The EL display device shown in Fig. 1 is characterized in that an LDD region 33 is formed between the drain region 32 and the channel forming region 34 in the current control TFT 202. In addition, the LDD region 33 has both a region not overlapping with the region overlapping with the gate electrode 35 by interposing the gate insulating film 18.

The current control TFT 202 supplies current for causing the EL element 203 to emit light, controls the amount to be supplied at the same time, and enables gray scale display. Therefore, there is no deterioration when a current flows, and a step corresponding to deterioration due to hot carrier injection does not need to be taken. Furthermore. When black is displayed. The current control TFT 202 is set to the off state, but if the off current value is high, then a bright black display is not possible, which causes a problem such as a reduction in contrast. Therefore, it is necessary to suppress the value of the off current.

In connection with deterioration due to high temperature carrier injection, it is known that the structure in which the LDD region overlaps with the gate electrode is very effective. However, if the entire LDD region is made to overlap with the gate electrode, the value of the off current thereafter increases, so the applicant of the present invention simultaneously shows that the high temperature carrier and the high temperature carrier and the LDD region which do not overlap with the gate electrode are formed in series. Solve all the off current value measures.

The length of the LDD region overlapping with the gate electrode may be made 0.1 to 3 mu m (preferably 0.3 to 1.5 mu m) in this respect. If the length of the LDD region is too long, the parasitic capacitance becomes large, and if it is too short, the high temperature carrier prevention effect is weakened. In addition, the length of the LDD region not overlapping with the gate electrode is set to 1.0 to 3.5 mu m (preferably 1.5 to 2.0 mu m). If the length of the LDD region is too long, sufficient current cannot flow, and if it is too short, the off current value reduction effect is weakened.

Since the parasitic capacitance is formed in the structure where the gate electrode and the LDD region overlap, it is preferable that such a region is not formed between the source region 31 and the channel formation region 34. Since the carrier (in this case, electron) flow direction is always the same in the current control TFT, it is sufficient to form the LDD region only on the drain region side.

Further, from the viewpoint of increasing the amount of current that can flow, the film thickness of the active layer (particularly the channel formation region) of the current control TFT 202 is made thick (preferably 50 to 100 nm, preferably 60 to 80 nm). Is effective. Conversely, in view of making the off current value smaller in the switching TFT 201, the film thickness of the active layer (particularly the channel formation region) is made thin (preferably 20 to 50 nm, preferably 25 to 40 nm). Is effective.

Next, reference numeral 41 denotes the first passivation film, and the film thickness thereof may be set to 10 to 1 m (preferably 200 to 500 nm). An insulating film containing silicon (particularly preferably a silicon oxynitride film or a silicon nitride film) can be used as the passivation film material. The passivation film 41 serves to protect the produced TFT from alkali metals and moisture. Alkali metals such as sodium are included in the EL layer formed on the final TFT. That is, since the first passivation film 41 acts as a protective layer, these alkali metals (mobile ions) do not penetrate into the TFT. Alkali metals and alkaline earth metals are those included in the term 'alkali metal' throughout this specification.

Further, by making the passivation film 41 have a heat dissipation effect, it is also effective in preventing thermal deterioration of the EL layer. Since light is emitted from the base 11 side in the structure of Fig. 1 of the EL display device, the passivation film 41 needs to have light transmission characteristics. In addition, since it deteriorates by adhering with oxygen, it is preferable not to use an insulating film intended to release oxygen when using an organic material as the EL layer.

At least one element selected from the group consisting of boron (B), carbon (C) and nitrogen (N) and at least one element selected from the group consisting of aluminum (Al), silicon (Si) and phosphorus (P) The insulating film can be given as a light transmitting material having heat dissipation characteristics (high thermal conductivity). For example, aluminum nitride compounds, typically aluminum nitride (AlxNy), silicon carbide compounds, typically silicon carbide (SixCy), silicon nitride compounds, typically silicon nitride (SixNy), boron nitride compounds, typically boron nitride (BxNy) Or it is possible to use boron phosphide compounds, typically boron phosphide (BxPy). In addition, an aluminum oxide compound, typically aluminum oxide (AlxOy), has excellent light transmittance, has a thermal conductivity of 20 Wm ⁻¹ K ⁻¹ , and can be said to be a preferred material. These materials not only have heat dissipation properties, but also are effective in preventing permeation of moisture and alkali metals and the like. x and y are arbitrary integers for the transparent material.

The compound may also be combined with other elements. For example, an aluminum nitride oxide represented by AlNxOy can be used, where nitrogen is added to the aluminum oxide. Such materials also have heat dissipation properties and are effective in preventing penetration of substances such as moisture and alkali metals. x and y are arbitrary integers for the aluminum nitride oxide.

Moreover, the material recorded in Japanese Patent Laid-Open No. 62-90260 can also be used. That is, a compound containing Si, Al, N, O, M (M is a rare earth element), preferably cesium (Ce), ytterbium (Yb), samarium (Sm), and erbium (Er). ), At least one element selected from the group consisting of yttrium (Y), lanthanum (La), gadolinium (Gd), dysprosium (Dy) and neodium (Nd) may also be used. These materials not only have heat dissipation characteristics, but also are effective in preventing penetration of substances such as moisture and alkali metals.

Moreover, carbon films containing at least diamond films or amorphous carbons (particularly those having properties close to diamond; diamond-like carbon) may also be used. They have very high thermal conductivity and are very effective as emissive layers. If the film thickness is large, it is preferable to use a film as thin as possible (preferably 5 to 10 nm) as there is brown banding and the conductivity is reduced.

Since the purpose of the first passivation film 41 is to protect the TFT from alkali metals and moisture, the first passivation film must be made so as not to lose this effect. Thin films made of materials having the above-mentioned radiation effect can be used alone, but thin films (usually silicon nitride films (Si _x N _y ) or silicon oxynitride films (SiO _x ) having a barrier against alkali metals and moisture can be used alone. It is also effective to laminate N _y )). x and y are arbitrary integers for the silicon nitride film and the silicon oxynitride film.

Reference numeral 42 denotes a color filter, and reference numeral 43 denotes a fluorescent substrate (also called a fluorescent dye layer). Both are the same color combination and include red (R), green (G), or blue (B). The color filter 42 is formed to increase the color purity, and the fluorescent material 43 is formed to perform color transformation.

The EL display device is largely divided into four kinds of color tone displays. That is, a method of forming three kinds of EL elements corresponding to R, G, and B, a method of combining a color filter and an EL element emitting white light, an EL element emitting blue or blue-green light, and a fluorescent material (fluorescent color changing layer) , CCM), and a method of using a transparent electrode as a cathode (as opposed to an electrode) and superimposing EL elements corresponding to R, G, and B.

The structure of FIG. 1 is an example in the case of using a combination of a blue light emitting EL element and a fluorescent material. The light emitting layer emitting blue light is formed here so that light having a wavelength in the blue region including ultraviolet light used as an EL element is formed and the fluorescent material 43 is activated as light and emits red, green, or blue light. . The color purity of the light is increased by the color filter 42 and this is output.

It is possible to implement the invention without regard to the light emitting method, all four of which can be used with the invention.

Furthermore, after the color filter 42 and the fluorescent material 43 are formed, planarization is performed by the second interlayer insulating film 44. The resin film is preferably the same as the second interlayer insulating film 44, and a polyimide, polyamide, acrylic or BCB (benzocyclobutane) or the like may be used. In addition, if sufficient planarization is possible, of course, an inorganic film may be used.

The planarization of the step caused by the TFT by the second interlayer insulating film 44 is extremely important. Since the EL layer formed thereafter is very thin, poor light emission sometimes occurs due to the presence of steps. Therefore, it is preferable to perform the planarization before forming the pixel electrode in order to form the EL layer which is as flat as possible.

Furthermore. Reference numeral 45 is a second passivation film (having the meaning of a heat dissipating layer), and the film thickness is preferably 5 nm to 1 m (typically 20 to 300 nm). This second passivation film is disposed in contact with the EL element and functions to release heat generated by the EL element. Also, when formed by the resin film, the second interlayer insulating film 44 is weak against heat, and the thermal radiation layer works so as not to be adversely affected by the heat generated by the EL element.

As described above, it is effective to flatten the TFT with the resin film in manufacturing the EL display element, but this is not a conventional structure considering the deterioration of the resin film due to heat generated by the EL element. It can be said that one of the features of the present invention is to solve the problem by disposing the first passivation film 45.

In addition, the second passivation film 45 not only prevents the alkali metal in the EL layer from diffusing to the TFT side, but also functions as a protective layer that prevents the above-mentioned deterioration due to heat. It functions as a protective layer that prevents penetration.

The same material as used as the first passivation film 41 can be used as the second passivation film 45. In particular, as a material having a high heat dissipation effect, a carbon film such as a diamond film or a diamond-shaped carbon film is preferable, and in order to prevent penetration of a material such as moisture, a laminated structure of a carbon film and a silicon nitride film (or silicon oxynitride film) is used. It is more preferable to use.

The structure in which the TFT side and the EL side are separated by an insulating film which has a high heat dissipation effect and can block moisture and alkali metal is an important characteristic of the present invention, and it can be said that this structure does not exist in the conventional EL display device.

Reference numeral 46 denotes a pixel electrode (EL element anode) made of a transparent conductive film. After drilling a contact hole in the second passivation film 45, the second interlayer insulating film 44 and the first passivation film 41, the pixel electrode 45 is connected to the drain wiring 37 of the current control TFT 202. It is formed to be.

An EL layer (preferably organic material) 47, a cathode 48, and a protective electrode 49 are formed on the pixel electrode 46 in this order. A single layer structure or a laminated structure can be used as the EL layer 47, but in many cases, a laminated structure can be used. Various laminated structures in combination of a light emitting layer, an electron transporting layer, an electron injection layer, a hole injection layer and a hole transporting layer have been proposed, but any structure can be used in the present invention. Doping of the fluorescent dye to the EL layer can of course also be performed. The light emitting element formed by the pixel electrode (anode), the EL layer and the cathode is referred to as an EL element throughout this specification.

All known EL materials can be used by the present invention. Organic materials are well known as such materials, and considering the driving voltage, it is preferable to use organic materials. For example, the materials disclosed in the following US patents and Japanese patent applications can be used as organic EL materials.

U.S. Patent 4,356,429, U.S. Patent 4,539,507, U.S. Patent 4,720,432, U.S. Patent 4,769,292, U.S. Patent 4,885,211, U.S. Patent 4,950,950, U.S. Patent 5,059,861, U.S. Patent 5,047,687, U.S. Patent 5,073,446, U.S. Patent 5,059,862, U.S. Patent 5,061,617, U.S. Patent 5,151,629, U.S. Patent 5,294,869, U.S. Patent 5,294,870, JP 10-189525, JP 8-241048 Japanese Patent Laid-Open No. 8-78159.

In particular, an organic material as shown in the following formula can be used as the hole injection layer.

Wherein Q is either N or CR (carbon chain), M is a metal, metal oxide or metal halide, R is hydrogen, alkyl, aralkyl, aryl or alkaryl, and T1, T2 is hydrogen, alkyl or Halogen etc. are unsaturated 6-membered rings containing a substituent.

Moreover, aromatic octavalent amine can be used as the organometallic hole transport layer containing tetraaryldiamine represented by the following formula.

In formula (2), Are is an arylene group, n is an integer of 1 to 4, and Ar, R ₇ , R ₈ and R ₉ are each selected from aryl groups.

The metal oxynoid compound may also be used as the organometallic EL layer, electron transport layer or electron injection layer. Materials such as those shown by the following formula may be used as the metal oxynoid compound.

R ₂ to R ₇ may be substituted, and the following metal oxinoids may be used.

In Formula 4, R ₂ to R ₇ are defined as above, L ₁ to L ₅ is a hydrocarbon group containing 1 to 12 carbon elements, and both L ₁ and L ₂ or both L ₂ and L ₃ are It is formed of a benzo ring. In addition, the following metal oxinoids may also be used.

Here, R ₂ to R ₆ may be substituted. Coordination compounds with organic or ligands are thus included as organic EL materials. The above examples are some examples of the organic EL materials that can be used as the EL materials of the present invention, and the EL materials need not necessarily be limited thereto.

Moreover, when using the ink spraying method for forming the EL layer, it is preferable to use a polymer material as the EL material. Polymeric materials such as polyparaphenylene vinylenes (PPVs) and polypuloene can be used as conventional polymer materials. For electron coloring, for example, it is preferable to use cyano-polyphenylene vinylene as a red light emitting material, polyphenylene vinylene as a green light emitting material and polyphenylene vinylene and polyalkylphenylene as a blue light emitting material. . As for the organic EL material which can be used for the ink jetting method, all materials recorded in Japanese Patent Laid-Open No. 10-012377 can be mentioned.

In addition, a material including a low one-count material such as magnesium (Mg), lithium (Li), cesium (Cs), barium (Ba), potassium (K), beryllium (Be), or calcium (Ca) may be a cathode. It is used as). Preferably an electrode made of MgAg (a material made of Mg and Ag in a mixture of Mg: Ag = 10: 1) is used. In addition, MgAgAl electrodes, LiAl electrodes and LiFAl electrodes may be given as other examples. In addition, the protective electrode 49 is an electrode formed to protect the film from moisture from the outside to the cathode 48, and a material containing aluminum (Al) or silver (Ag) is used. In addition, the protective electrode 49 has a heat radiation effect.

It should be noted that it is desirable to form the EL layer 47 and the cathode 48 in turn without being exposed to the atmosphere. That is, even in the form of a multilayer structure including an EL layer and a cathode, it is preferable to form all in succession in a multichamber (also referred to as cluster tool) type deposition apparatus. This is to avoid absorption of moisture when the EL layer is exposed to the air because the organic material is very weak against moisture when used as the EL layer. Further, it is more preferable to continuously form not only the EL layer 47 and the cathode 48 but also passages passing through the protective electrode.

Since the EL layer is very weak against heat, it is preferable to use vacuum evaporation (especially organic molecular beam evaporation is effective for forming a thin film in molecular heat), sputtering, plasma CVD, spin coating, screen printing, or ion plating as the thin film deposition method. Do. It is also possible to form the EL layer by the ink-jet method. As for the ink-jet method, there are a bubble jet method using cavitation (see Japanese Patent Application Laid-Open No. 5-116297) and a piezo method using a piezo element (see Japanese Patent Application Laid-Open No. Hei 8-290647). For the piezo method is preferred.

Reference numeral 50 designates a third passivation film, and the film thickness thereof may be set to 10 nm to 1 m (preferably 200 to 500 nm). The purpose of forming the third passivation film 50 is to protect the EL layer 47 from moisture, but the third passivation film 50 may be configured to have a heat radiation effect similar to the first passivation film 41. Even if it is good. Therefore, the same material used for the first passivation film 41 can be used as the material for forming the third passivation film 50. When the organic material is used as the EL layer 47, since the EL layer may deteriorate due to the adhesion using oxygen, it is preferable to use an insulating film that does not easily release oxygen.

In addition, since the EL layer is weak against heat as described above, it is preferable to perform film deposition at the lowest possible temperature (preferably in the range from room temperature to 120 ° C). Therefore, plasma CVD, sputtering, vacuum evaporation, ion plating, and solvent application (spin coating) are preferable for the film deposition method.

Although the deterioration of the EL element can be sufficiently suppressed only by the deposition of the second passivation film 45 as described above, preferably the EL element is the same as the second passivation film 45 and the third passivation film 50. Surrounded by two layers of insulating films formed to overlap the EL elements, the penetration of moisture and oxygen into the EL layer, diffusion of alkaline metal from the EL layer, and heat storage inside the EL layer are prevented. As a result, deterioration of the EL layer is further suppressed, and an EL display device having high reliability can be obtained.

The EL display device of the present invention has a pixel portion containing pixels of the structure shown in Fig. 1, and TFTs of other structures that respond to the function are disposed in the pixels. A switching TFT having a sufficiently low off current value and a current control TFT resistant to hot carrier injection can be formed in the same pixel, so that an EL display device having high reliability and capable of displaying a good image (high work performance) is provided. Can be formed.

Most important in the pixel structure of Fig. 1 is that the TFT of the multi-gate structure is used as the switching TFT and that the arrangement of LDD regions does not need to limit the position to the structure for the components.

Now, a more detailed description of the invention having the above configuration is performed by the embodiment shown below.

Example 1

Embodiments of the present invention are described using FIGS. 3A-5C. The TFT of the pixel portion and the driving circuit portion formed around the pixel portion will be described below. Note that for simplicity of description the CMOS circuit is shown as the basic circuit of the drive circuit.

First, as shown in FIG. 3A, a base film 301 is formed on the glass substrate 300 to a thickness of 300 nm. A silicon oxynitride film is laminated as the base film 301 of the first embodiment. It is preferable to set the nitrogen concentration to 10 to 25% by weight in the film in contact with the glass substrate 300.

In addition, it is preferable to form an insulating film made of the same material as the first passivation film 41 shown in FIG. 1 as part of the base film 301. Since a large current flows in the current control TFT and heat is easily generated, it is effective to bring the heat dissipation layer into contact with the current control TFT as closely as possible.

Next, an amorphous silicon film (not shown in the figure) is formed to a thickness of 50 nm on the base film 301 by a known deposition method. It is to be noted that this is not limited to the amorphous silicon film, and that another film may be formed in which a semiconductor film (including a microcrystalline semiconductor film) containing an amorphous structure is provided. In addition, a synthetic semiconductor film containing an amorphous structure such as an amorphous silicon germanium film may also be used. In addition, the film thickness may be made from 20 to 100 nm.

The amorphous silicon film is then crystallized by a known method of forming a crystalline silicon film (also referred to as a polycrystalline silicon film or a polysilicon film: 302). Thermal crystallization using an electric furnace, laser annealing crystallization using a laser, and lamp annealing crystallization using an infrared lamp are known crystallization methods. Crystallization is performed in Example 1 using light from an excimer laser using xenon chloride (XeCl) gas.

While linearly shaped pulsed radiation excimer laser light is used in Example 1, it should be noted that rectangular shapes may be used, and continuous emission argon laser light and continuous emission excimer laser light may be used.

A crystalline silicon film is used as the active layer of the TFT in Example 1, but it is also possible to use an amorphous silicon film as the active layer. However, since a large current flowing through the current control TFT is required, it is more effective to use a crystalline silicon film in which the current easily flows.

It should be noted that it is effective to form the active layer of the TFT which needs to reduce the off current by the amorphous silicon film and to form the active layer of the current control TFT by the crystalline silicon film. Because of the low carrier mobility, the flow of current is difficult in the amorphous silicon film, and the off current does not flow easily. That is, both an amorphous silicon film in which current cannot flow easily and a crystalline silicon film in which current easily flows can be advantageously made.

Next, as shown in FIG. 3B, a protective film 303 is formed on the crystalline silicon film 302 from a silicon oxide film having a thickness of 130 nm. This thickness may be selected in the range of 100-200 nm (preferably in the range 130-170 nm). In addition, other films may be used to provide an insulating film containing silicon. The protective film 303 is formed so that the crystalline silicon film is not directly exposed to the plasma during the addition of the impurity and the micro concentration control of the impurity is possible.

Thereafter, resist masks 304a and 304b are formed on the protective film 303, and impurity elements (hereinafter referred to as n-type impurity elements) to which n-type conductivity is added are applied. It should be noted that elements belonging to periodic table group 15 are generally used as n-type impurity elements, and phosphorus or arsenic can usually be used. Plasma doping is used in which phosphine (PH ₃ ) is a plasma activated without separation of mass and phosphorus is added at a concentration of 1 × 10 ¹⁸ atoms / cm ³ in Example 1. Of course, an ion implantation method in which separation of mass is performed may be used.

Therefore, the one-time amount formed by the above process at a concentration of 2 × 10 ¹⁶ to 5 × 10 ¹⁹ atoms / cm ³ (typically, in the range of 5 × 10 ¹⁷ to 5 × 10 ¹⁸ ) indicates that the n-type impurity element is n-type impurity Adjusted to be included in regions 305 and 306.

Next, as shown in FIG. 3C, the protective film 303 is removed, and activation of the added periodic table group 15 element is performed. Known activation techniques can be used as the activation means, and activation is done in Example 1 by irradiation of excimer laser light. Pulsed and continuous radiation lasers can be used and it is not necessary to limit the use of excimer laser light. The object is to activate the impurity element to be added, and it is preferable that irradiation is performed at an energy level at which the crystalline silicon film does not dissolve. It should be noted that laser irradiation may be performed with the protective film 303 in place.

Activation by heat treatment may be performed in accordance with activation of the impurity element by laser light. When activation is performed by heat treatment in consideration of the thermal resistance of the substrate, it is preferable to perform heat treatment on the order of 450 to 550 占 폚.

The boundary (connection) with the region along the edge of the n-type impurity regions 305 and 306, that is, the region along the periphery where n-type impurity elements present in the n-type impurity regions 305 and 306 are not added, is subjected to this process. Is formed by. This means that a very good concentration can be formed between the LDD region and the channel forming region at the point when the TFT is later completed.

As shown in Fig. 3D, after unnecessary portions of the crystalline silicon film are removed, an island-like semiconductor film (hereinafter referred to as active layer: 307 to 310) is formed.

Thereafter, as shown in FIG. 3E, a gate insulating film 311 covering the active layers 307 to 310 is formed. An insulating film containing silicon and having a thickness of 10 to 200 nm. Preferably, an insulating film having a thickness of 50 to 150 nm can be used as the gate insulating film 311. Single layer structures or laminated structures may be used. A 110 nm thick silicon oxynitride film is used in Example 1.

A conductive film having a thickness of 200 to 400 nm is formed to form the gate electrodes 312 to 316. In Embodiment 1, it should be noted that the gate electrode and the lead wire connected to the gate electrode (hereinafter referred to as the gate wiring) are formed of different materials. In particular, a material having a lower resistance than the gate electrode is used for the gate wiring. This is because a material that can be microfabricated is used as the gate electrode, and even when the gate wiring cannot be microfabricated, the material used for the wiring has a low resistance. Of course, the gate electrode and the gate wiring may be formed of the same material.

Further, the gate wiring can be formed of a single layer conductive film, and it is preferable to use a laminated film of two or three layers as necessary. All known conductive films can be used as the gate electrode material. However, as described above, materials that can be microfabricated, in particular, materials that can be formed with a line width of less than 2 μm are preferred.

Typically, a film of a material selected from the group consisting of tantalum (Ta), titanium (Ti), molybdenum (Mo), tungsten (W), and chromium (Cr), or nitrate compounds of the elements (typically tantalum nitride Film, tungsten nitride film, or titanium nitride film), or an alloy film (usually a Mo-W alloy or a Mo-Ta alloy) of a mixture of the elements, or a silicide film of the element (typically a tungsten silicide film or titanium silicide) Film), or a silicon film having conductivity may be used. Of course, single layer films or laminated films can be used.

A laminated film consisting of a tantalum nitride (TaN) film having a thickness of 50 nm and a Ta film having a thickness of 350 nm is used in Example 1. It is preferable to form such a film by sputtering. In addition, when an active gas such as xenon (Xe) or neon (Ne) is added as the sputtering gas, the film can be prevented from peeling off due to the stress.

The gate electrodes 313 and 316 are formed at the same time so as to overlap the n-type impurity regions 305 and 306 sandwiching the gate insulating film 311, respectively. This overlapping portion later becomes an LDD region overlapping the gate electrode.

Next, an n-type impurity element (phosphorus is used in Embodiment 1) is added to the gate electrodes 312 and 316 in a self-aligning manner as a mask as shown in Fig. 4A. The addition is such that phosphorus added to the impurity regions 317 to 323 is formed at a concentration of 1/10 to 1/2 of the concentration of the impurity regions 305 and 306 (typically between 1/4 and 1/3). Adjusted. In particular, a concentration of 1 × 10 ¹⁶ to 5 × 10 ¹⁸ atoms / cm ³ (typically 3 × 10 ¹⁷ to 3 × 10 ¹⁸ atoms / cm ³ ) is preferred.

The resist masks 324a to 324d are formed to cover the gate electrode, as shown in FIG. 4B, and an impurity region 325 to n containing a high concentration of phosphorus by adding an n-type impurity element (phosphorus is used in Example 1) is added. 331 is formed. Ion doping with phosphine (PH ₃ ) is also carried out here, wherein the concentration of phosphorus in this region is from 1 × 10 ²⁰ to 1 × 10 ²¹ atoms / cm ³ (typically from 2 × 10 ²⁰ to 5 × 10 ²⁰ Atom / cm ³ ).

The source region or the drain region of the n-channel TFT is formed by this process, and in the switching TFT, some of the n-type impurity regions 320 to 322 formed by the process of Fig. 4A remain. This remaining area corresponds to the LDD areas 15a to 15d of the switching TFT of FIG.

Next, as shown in FIG. 4C, the resist masks 324a to 324d are removed, and a new resist mask 332 is formed. Then, a p-type impurity element (boron is used in Example 1) is added, and impurity regions 333 and 334 containing a high concentration of boron are formed. Boron has a concentration of 3 × 10 ²⁰ to 3 × 10 ²¹ atoms / cm ³ (typically 5 × 10 ²⁰ to 1 × 10 ²¹ atoms / cm ³ ) by ion doping with diborane (B ₂ H ₆ ) Is added here.

Although phosphorus has already been added to the impurity regions 333 and 334 at a concentration of 1 × 10 ¹⁶ to 5 × 10 ¹⁸ atoms / cm ³ , boron is added to it at a concentration of at least three times that of the phosphorus. Therefore, the n-type impurity region is already completely converted to p-type and functions as a p-type impurity region.

Next, after removing the resist mask 332, the n-type and p-type impurity elements added at various concentrations are activated. Furnace annealing, laser annealing, or lamp annealing may be performed as the activation means. In Example 1, the heat treatment is performed in a nitrogen environment at 550 ° C. for 4 hours in an electric furnace.

It is important to remove as much oxygen from the environment as possible at the same time. This is because the presence of any oxygen makes the exposed surface of the electrode oxidized, increases the resistance, and at the same time makes it more difficult to make ohmic contacts. Therefore, the concentration of oxygen in the environment in the activation process is preferably 1 ppm or less, preferably 0.1 ppm or less.

After the activation process is completed, a 300 nm thick gate wiring 335 is formed. A metallic film having aluminum (Al) or copper (Cu) as the main component (including 50 to 100% of the mixture) can be used as the material of the gate wiring 335. When using the gate wiring 211 of FIG. 2, the gate wiring 335 is formed in such a way that the gate electrodes 314 and 315 of the switching TFT (corresponding to the gate electrodes 19a and 19b of FIG. 2) are electrically connected. (See FIG. 4D).

Since the wiring resistance of the gate wiring can be very small by using such an electrode form, a pixel display region (pixel portion) having a large surface area can be formed. That is, the pixel structure of Embodiment 1 is very effective because an EL display device having a screen having a diagonal size of 25.4 cm (10 inches) or larger (also, a diagonal of 76.2 cm (30 inches)) is realized.

The first interlayer insulating film 336 is next formed as shown in Fig. 5A. A single layer insulating film containing silicon is used as the first interlayer insulating film 336, but a lamination film may be included therebetween. In addition, a film thickness of 400 nm to 1.5 μm can be used. An 800 nm thick silicon oxide film on a 200 nm thick silicon oxynitride film is used in Example 1.

Further, the heat treatment is carried out for 1 to 12 hours at 300 to 450 ° C. in an environment containing 3 to 100% hydrogen for performing hydrogenation. This process is one of hydrogen termination of dangling bonds that are not bonded to the semiconductor film by thermally activated hydrogen. Plasma hydrogenation (using hydrogen activated by plasma) may also be performed as other hydrogenation means.

Note that the hydrogenation step may be inserted during formation of the first internal insulating film 336. That is, the hydrogen treatment is performed as above after forming the 200 nm thick silicon oxynitride film, and then, the remaining 800 nm thick silicon oxide film can be formed.

The contact hole is formed after the first interlayer insulating film 336, the source wirings 337 to 340, and the drain wirings 341 to 343 are formed. In Example 1, a laminated film having a three-layer structure of a 100 nm titanium film, a 300 nm aluminum film containing titanium, and a 150 nm titanium film formed continuously by sputtering is used as the wiring. Of course, other conductive films may be used, and alloy films containing silver, palladium, and copper may be used.

Next, the first passivation film 344 is formed to a thickness of 50 to 500 nm (typically 200 to 300 nm). A 300 nm thick silicon oxynitride film is used as the first passivation film 344 in the first embodiment. This may be replaced with a silicon nitride film. Of course, it is also possible to use the same material as the first passivation film 41 of FIG.

It should be noted that it is effective to carry out a plasma treatment using a gas containing hydrogen such as H ₂ or NH ₃ before forming the silicon oxynitride film. Hydrogen activated by this pretreatment is supplied to the first interlayer insulating film 336 and the film quality of the first passivation film 344 is improved by performing heat treatment. At the same time, hydrogen added to the first interlayer insulating film 336 diffuses to the lower side, and the active layer can be effectively hydrogenated.

Next, as shown in FIG. 5B, the color filter 345 and the phosphor 346 are formed. Known materials for these can be used. In addition, they can be formed by patterning them individually and can be patterned together after being formed continuously. Methods such as screen printing, ink jetting, or mask evaporation (optional forming method using mask material) can be used as the forming method.

Each film thickness can be selected in the range of 0.5-5 μm (typically 1-2 μm). In particular, the optimum film thickness of the phosphor 346 varies depending on the material used. In other words, if the thickness is too thin, the color tone conversion efficiency becomes poor, and if the thickness is too thick, the step becomes large and the amount of transmitted light decreases. Therefore, the optimum film thickness is selected by balancing the two properties.

In Example 1, which is an example of a hue changing method in which the hue of light emitted from the EL layer is changed, when a method of manufacturing respective EL layers corresponding to R, G, and B is used, the hue filter and the phosphor are emitted. Can be.

Next, the second interlayer insulating film 347 is formed from resin. Materials such as polyimide, acrylic, and BCB (benzocyclobutene) can be used as the resin. In particular, since flattening the film strengthens the second interlayer insulating film 347, acrylic having better planarization characteristics is preferable. In Example 1, the acrylic film is formed to a film thickness that can sufficiently level the step between the color filter 345 and the phosphor 346. This thickness is preferably 1 to 5 µm (more preferably 2 to 4 µm).

Thereafter, a second passivation film 348 is formed on the second interlayer insulating film 347 with a thickness of 100 nm. An insulating film containing Si, Al, N, O and La is used in this embodiment. A contact hole leading to the drain wiring 343 is formed in the second passivation film 348, the second interlayer insulating film 347, and the first passivation film 344, and the pixel electrode 349 is formed. Indium oxide and tin oxide compounds are formed in Example 1 to a thickness of 110 nm, and patterning is performed to form pixel electrodes. The pixel electrode 349 becomes the anode of the EL element. Note that it is also possible to use other materials, i.e., a compound film of indium oxide and zinc oxide or a zinc oxide film containing gallium oxide.

In Embodiment 1, the pixel electrode 349 is electrically connected to the drain region 331 of the current control TFT through the drain wiring 343. This structure has the following advantages.

Since the pixel electrode 349 is directly connected to an organic material such as an EL layer (emissive layer) or a filler transport layer, it is possible to diffuse movable ions contained in the EL layer through the pixel electrode. That is, in the structure of Embodiment 1, the introduction of movable ions into the active layer due to the blocked drain wiring 343 is prevented without directly connecting the pixel electrode 348 to the drain region 331 which is a part of the active layer. Can be.

Next, as shown in FIG. 5C, the EL layer 350, the cathode (MgAg electrode: 351), and the protective electrode 352 are formed in sequence without being exposed to the atmosphere. At this point, it is preferable to perform heat treatment of the pixel electrode 349 which completely removes all moisture before forming the EL layer 350 and the cathode 351. Known materials can be used as the EL layer 350.

The material described in the "embodiment" herein can be used as the EL layer 350. In Example 1, as shown in Fig. 19, an EL layer having a four-layer structure in which a hole injection layer, a hole transport layer, an emission layer, and an electron transport layer is used is used, but the electron transport layer is not formed and electron injection is performed. In some cases, a layer is formed. In addition, the hole injection layer may be omitted. Some examples of this type of combination have already been described, and any configuration can be used.

An amine such as TPD (triphenylamine dielectric) can be used as a hole injection layer or a hole transport layer, and can also be used as a hydrazone (typically DEH), stilbene (typically STB), or starburst (typically m-MTDATA). ) May be used. In particular, starburst materials having a high glass transition temperature and difficult to crystallize are preferred. In addition, polyaniline (PAni), polythiophene (PEDOT), and copperpitaloxyamine (CuPc) may be used.

BPPC, Perrin, and DCM can be used as the red emitting layer in the emitting layer, in particular by Eu (DBM) ₃ (Phen) (see Applied Physics by Kyodo J. et al., Page 35, lines 394 to 396). The Eu composite shown is monochromatic and handles sharp radiation at a wavelength of 620 nm.

In addition, Alq ₃ (8-hydroxyquinoline aluminum) materials, typically in which quinacridone or commarin are added at the level of several mol%, can be used as the green emitting layer. The chemical formula is as shown below.

In addition, a distyled-arylene amino dielectric, in which an amino constituent DSA is added to a DSA (distyled-arylin dielectric), can be used as a blue emitting layer. In particular, it is preferable to use distinyl-biphenyl (DPVBi) which is a high performance material. The chemical formula is as shown below.

The protective electrode 352 can be used to protect the EL layer 350 from moisture and oxygen, and in particular, a third passivation film 353 can be formed. In this embodiment, a 300 nm thick silicon oxynitride film is deposited as the third passivation film 353. The third passivation film may continue to be formed after the protective electrode 352 without being exposed to the atmosphere. Of course, the same material as the third passivation film 50 of FIG. 1 may be used as the third passivation film 353.

Although a four-layer structure consisting of a hole injection layer, a hole transport layer, an emission layer, and an electron injection layer is used in Example 1, there are examples of many combinations already reported and any of these configurations may be used. Further, the MgAg electrode is used as the cathode of the EL element in Embodiment 1, but other known materials may be used.

The protective electrode 352 is formed to prevent deterioration of the MgAg electrode 351, and a metal film having aluminum as a main component is conventional. Of course, other materials may be used. In addition, since the EL layer 350 and the MgAg electrode 351 are very weak against moisture, it is preferable to perform continuous formation through the protective electrode 352 without being exposed to the atmosphere to protect the EL layer from external air. .

It should be noted that the film thickness of the EL layer 350 is 10 to 400 nm (typically 60 to 160 nm), and the MgAg electrode 351 is 180 to 300 nm (typically 200 to 250 nm).

An active matrix type EL display device having the structure shown in Fig. 5C is completed. By arranging TFTs having an optimal structure in the pixel portion and the driving circuit portion, the active matrix type EL display device of Embodiment 1 exhibits very high reliability, and operation characteristics can be improved.

First, a TFT having a structure that reduces as much hot carrier injection as possible without reducing the operation speed is used as the n-channel TFT 205 of the CMOS circuit forming the drive circuit. It should be noted that the drive circuit cited herein includes circuits such as shift registers, buffers, level shifters, and sampling circuits (also referred to as transfer gates). When digital driving is performed, a signal switching circuit such as a D / A converter circuit may be included.

In the case of Embodiment 1, the active layer of the n-channel TFT 205 has a source region 355, a drain region 356, an LDD region 357, and a channel formation region 358 as shown in Fig. 5C. The LDD region 357 overlaps the gate electrode 313 with the gate insulating layer 311 interposed therebetween.

The formation of the LDD region on the drain side should be considered to not slow down the operation speed. Further, there is no need to relate to the off current value of the n-channel TFT 205, and the operation speed is more important. Therefore, the LDD region 357 preferably completely covers the gate electrode 313 to reduce as many resistive components as possible. That is, it is preferable to remove all offsets.

The deterioration of the p-channel TFT 206 of the CMOS circuit due to the high temperature carrier injection is almost irrelevant, in particular, no LDD region is formed. Of course, it is also possible to take an operation on the high temperature carrier by forming an LDD region similar to the n-channel TFT 205.

The sampling circuit between the driving circuits is better than the other circuits, and a large current flows in both directions of the channel forming region. In other words, the roles of the source region and the drain region are reversed. In addition, it is necessary to suppress the value of the off current as much as possible, and it is preferable to arrange the TFT having a function of an intermediate level between the switching TFT and the current control TFT.

Therefore, it is preferable to arrange the TFTs in the structure shown in Fig. 9 as the n-type TFTs forming the sampling circuit. As shown in FIG. 9, portions of the LDD regions 901a and 901b overlap the gate electrode 903 with the gate insulating film 902 interposed therebetween. This effect is as described in the description of the current control TFT 202, and the sampling circuit differs from the point of forming the LDD regions 901a and 901b in the shape of sandwiching the channel forming region 904 therebetween.

Further, a pixel having the structure shown in FIG. 1 is formed to form the pixel portion. Since the structures of the switching TFT and the current control TFT formed in the pixel have already been described in FIG. 1, the description is omitted here.

Substantially, it is desirable to perform further packaging (sealing) after completion through FIG. 5C by using a housing material such as an airtight protective film (such as a thin film or an ultraviolet cured resin film) or a ceramic sealing can to prevent exposure to the atmosphere. Do. By making the inside of the housing material an active environment and placing the absorbent material (for example barium oxide) inside the housing material, the reliability (life) of the EL layer is increased.

In addition, after the airtightness is increased by the packaging process, a connector (flexible printed circuit, FPC) connecting between an output terminal and an output terminal from an element or circuit formed on the substrate is attached to complete the manufacture of the product. An EL display device in a state that can be shipped is referred to herein as an EL module.

The configuration of the active matrix type EL display device of Embodiment 1 is explained with reference to the drawings of FIG. The active matrix type EL display device of Embodiment 1 is formed on a glass substrate 601 and includes a pixel portion 602, a gate side driver circuit 603, and a source side driver circuit 604. The switching TFT 605 of the pixel portion is an n-channel TFT and is located at the intersection of the gate wiring 606 connected to the gate side driving circuit 603 and the source wiring 607 of the source side driving circuit 604. In addition, the drain of the switching TFT 605 is electrically connected to the gate of the current control TFT 608.

Further, the source of the current control TFT 608 is connected to the current supply line 609, and the EL element 610 is electrically connected to the drain of the current control TFT 608. If the current control TFT is an n-channel TFT, it is preferable to connect the cathode of the EL element 610 to the drain of the current control TFT 608 at this point in time. If the current control TFT 608 is a p-channel, it is preferable to connect the anode of the EL element 610 to the drain of the current control TFT 608.

Input wirings (connection wirings) 612 and 613 and input wirings 614 connected to the current supply line 609 are formed in the terminal input terminal FPC 611 for transmitting signals to the driving circuit.

7 is an example of a circuit configuration of the EL display device shown in FIG. The EL display device of Embodiment 1 has a source side driver circuit 701, a gate side driver circuit (A) 707, a gate side driver circuit (B) 711, and a pixel portion 706. It should be noted that the driving circuit herein is a general term that includes a source side driving circuit and a gate side driving circuit.

The source side driver circuit 701 is provided with a shift register 702, a level shifter 703, a buffer 704, and a sampling circuit (transfer gate) 705. The gate side driving circuit (A) 707 is also provided with a shift register 708, a level shifter 709, and a buffer 710. The gate side drive circuit (B) 711 has the same configuration.

The driving voltages for the shift registers 702 and 708 are 5 to 16V (typically 10V), and the structure shown by reference numeral 205 in Fig. 5C is suitable for n-channel TFTs used in CMOS circuits forming circuits.

In addition, the driving voltage is increased to 14 to 16V for the level shifters 703 and 709 and the buffers 704 and 710, and similarly to the shifter, a CMOS circuit containing the n-channel TFT 205 in Fig. 5C is suitable. It is effective to use a multi-gate structure such as a double gate structure or a triple gate structure for the gate wiring to increase the reliability of each circuit.

Although the driving voltage for the sampling circuit 705 is 14 to 16V, it is necessary to reduce the value of the off current because the source region and the drain region are switched, and therefore, a CMOS circuit containing an n-channel TFT of Fig. 9 is suitable.

In addition, the driving voltage of the pixel portion 706 is between 14 and 16V, and pixels having the structure shown in FIG. 1 are arranged.

It should be noted that the above-described structure can be easily realized by manufacturing TFTs according to the manufacturing process shown in Figs. 3A to 5C. Incidentally, although only the configuration of the pixel portion and the driving circuit is shown in Embodiment 1, in addition to the driving circuit on the same substrate according to the manufacturing process of Embodiment 1, a signal driving circuit, a D / A converter circuit, an op-amp circuit, and It is also possible to form other logic circuits, such as a? compensation circuit. It is also contemplated that circuits such as memory sections or microprocessors may be formed.

The EL module of Embodiment 1 containing the housing material is described using Figs. 17A and 17B. It should be noted that reference numerals used in FIGS. 6 and 7 are cited as necessary.

The pixel portion 1701, the source side driver circuit 1702, and the gate side driver circuit 1703 are formed on a substrate (including a base film under the TFT; 1700). Various wires from each drive circuit are connected to the external device by the FPC 611 through the input wires 612 and 614.

The housing material 1704 is formed at this point to surround at least the pixel portion, preferably the driving circuit and the pixel portion. The housing material 1704 has an irregular shape whose internal size is larger than the external size of the EL element, or has a sheet shape, and is formed by the substrate 1700 by the adhesive 1705 to form an airtight space in close contact with the substrate 1700. It is fixed to). At this point, the EL element is completely sealed in the hermetic space and completely blocked from the external atmosphere. It should be noted that multiple housing materials 1704 may be formed.

It is desirable to use an insulating material such as glass or polymer as the housing material 1704. Amorphous glass (such as borosilicate glass or quartz), crystallized glass, ceramic glass, organic resins (acrylic resins, styrene resins, polycarbonate resins, and epoxy resins), and silicone resins may be given as examples. Ceramics may also be used. In addition, when the adhesive 1705 is provided as an insulating material, it is also possible to use a metal material such as a stainless alloy.

As a material of the adhesive 1705, an adhesive such as an epoxy resin or an acrylic resin can be used. Additionally, thermally cured resins or photocured resins may be used as the adhesive. As far as possible, it is necessary to use materials that are incapable of transferring oxygen and moisture.

It is also desirable to fill an opening 1706 between the housing material and the substrate 1700 with an inert gas (argon, helium or nitrogen). An inert liquid (liquid fluorinated carbon, typically perfluoroalkane, etc.) may be used without being limited to gas. Materials such as those used in Japanese Patent Laid-Open No. 8-78519 are cited for inert liquids. The space can also be filled with resin.

It is effective to form a desiccant in the opening 1706. The materials described in Japanese Patent Laid-Open No. 9-148066 can be used as a desiccant. In general, barium oxide may be used. In addition, forming an antioxidant that is not a desiccant is also effective.

A plurality of insulated pixels having an EL element are formed in the pixel portion as shown in Fig. 17B, and all the pixels have a protective electrode 1707 as a common electrode. In Embodiment 1, it is preferable to form the EL layer, the cathode (MgAg electrode), and the protective electrode continuously without exposing to the atmosphere. The EL layer and the cathode are formed using the same mask material, and the structure of Fig. 17B can be realized when the protective electrode is formed by the individual mask material.

The EL layer and the cathode can be formed only inside the pixel portion at this point, and it is unnecessary to form them on the driving circuit. Of course, the EL layer and the cathode may be formed on the driving circuit, but it is preferable not to form it in the driving circuit in consideration of the inclusion of the alkane metal in the EL layer.

The input wiring 1709 is connected to the protective electrode 1707 in the area indicated by reference numeral 1708. The input wiring 1709 is wiring for providing a predetermined voltage to the protective electrode 1707 and is connected to the FPC 611 through a conductive paste material (usually anisotropic conductive film) 1710.

A fabrication process for forming a contact structure in the region 1708 is described with reference to FIGS. 18A-18C.

First, the state of FIG. 5A is obtained according to the process of Example 1. FIG. At this point, the first interlayer insulating film 336 and the gate insulating film 311 are removed from the edge of the substrate (area indicated by reference numeral 1708 in Fig. 17B), and the input wiring 1709 is formed on that area. The source wiring and the drain wiring of Fig. 5A are formed simultaneously (see Fig. 18A).

Next, when etching the second passivation film 348, the second interlayer insulating film 347 and the first passivation film 344 in FIG. 5B, the region indicated by reference numeral 1801 is removed, and the opening 1802 is removed. Is formed (see FIG. 18B).

The process of forming the EL element (pixel element, EL element, and cathode formation process) in the pixel portion is performed in the above state. The mask material is used simultaneously in the areas shown in Figs. 18A to 18C so that EL elements are not formed in the above areas. After the cathode 351 is formed, the protective electrode 352 is formed using individual mask materials. The protective electrode 352 and the input wiring 1709 are electrically connected to each other. In addition, a third passivation film 353 is formed, and the state of FIG. 18C is obtained.

The contact structure of the area indicated by reference numeral 1708 in Fig. 17B is realized by the above-described steps. The input wiring 1709 is then connected to the FPC 611 through an opening between the housing material 1704 and the substrate 1700 (filled by the adhesive 1705, that is, the thickness of the adhesive 1705). It must be sufficiently flat with the step of the input wiring). Although the formation of input wiring 1709 has been described so far, other input wirings 612, 614 can also be similarly connected to FPC 611 by passing under housing material 1704.

Example 2

In Embodiment 2, a pixel configuration different from that shown in FIG. 2B is shown in FIG.

The two pixels shown in Fig. 2B are symmetrically arranged around the current supply line in the second embodiment. That is, as shown in FIG. 10, the number of necessary wirings can be reduced by forming the current supply line 213 jointly between two pixels adjacent to the current supply line. It should be noted that the structure of the TFT located inside the pixel can be maintained.

When this type of configuration is used, it becomes possible to manufacture a pixel portion of very high precision which increases the image quality.

The configuration of the second embodiment can be easily realized according to the manufacturing process of the first embodiment, and the first embodiment and the description of Fig. 1 can be referred to with respect to the same point as the substrate of the TFT.

Example 3

A case of forming a pixel portion having a structure different from that of FIG. 1 will be described with reference to FIG. 11 in the third embodiment. It should be noted that the process of forming the second interlayer insulating film 44 can be performed according to the first embodiment. In addition, since the structure of the switching TFT 201 and the structure of the current control TFT 202 covered by the second interlayer insulating film 44 are the same as those in FIG. 1, the description thereof is omitted.

In the case of Embodiment 3, the pixel electrode 51, the cathode 52, and the EL layer 53 have contact holes in the second passivation film 45, the second interlayer insulating film 44, and the first passivation film 41. It is formed after forming. The cathode 52 and the EL layer 53 are formed successively by the vacuum evaporation of Example 3 without being exposed to the atmosphere, and at the same time, the red emitting EL layer, the green emitting EL layer, and the blue emitting layer are made using a mask material. It is selectively formed on individual pixels. Although only one pixel is shown in Fig. 11, pixels having the same structure are formed corresponding to red, green, and blue, respectively, and the color tone display can be executed by these pixels. Known materials can be used for each EL layer color tone.

An 150 nm thick aluminum alloy film (an aluminum film containing 1% by weight of titanium) is formed as the pixel electrode 51 in the third embodiment. If a metallic material is provided, any material can be used as the pixel dielectric material, but it is preferable to use a material having a high reflectance. In addition, a 230 nm-thick MgAg electrode is used as the cathode 52, and the film thickness of the EL layer 53 is 120 nm.

The anode 54 forming the transparent conductive film (ITO film in Example 3) is formed to a thickness of 110 nm. Thus, when the EL element 209 is formed and the third passivation film 55 is formed of the same material as that shown in Embodiment 1, the pixel having the structure shown in Fig. 11 is completed.

When using the structure of the third embodiment, the red, green, and blue light generated by each pixel are irradiated in the opposite direction of the substrate direction in which the TFTs are formed. The reason is that almost the entire area inside the pixel, that is, the area where the TFT is formed, can be used as an effective emission area. As a result, there is a sharp increase in the effective radiated surface area of the pixel, and the luminance roughness ratio (ratio between contrast) of the image is increased.

It should be noted that it is possible to freely combine the configuration of one of the first and second embodiments and the third embodiment.

Example 4

The case where a pixel having a structure different from that of FIG. 2 of Embodiment 1 is formed is described in Embodiment 4 with reference to FIGS. 12A and 12B.

In Fig. 12A, reference numeral 1201 denotes a switching TFT including an active layer 56, a gate electrode 57a, a gate wiring 57b, a source wiring 58, and a drain wiring 59. Incidentally, reference numeral 1202 indicative of the current control TFT including the active layer 60, the gate electrode 61, the source wiring (current supply line) 62, and the drain wiring 63 is included in the configuration. The source wiring 62 of the current control TFT 1202 is connected to the current supply line 64, and the drain wiring 63 is connected to the EL element 65. 12B shows a circuit diagram of such a pixel.

The difference between FIG. 12A and FIG. 2A is the switching TFT structure. In Embodiment 4, the gate electrode 57a is formed with a fine line width of 0.1 to 5 탆, and the active layer 56 is formed to cross the portion. The gate wiring 57b is formed so as to electrically connect the gate electrode 57a of each pixel. Thus, a triple gate electrode that does not occupy a large surface area is realized.

The other part is similar to that of Fig. 2A, and when the structure of Example 4 is used, the effective radiation surface area becomes larger because the surface area exclusively used by the switching TFTs becomes smaller. That is, the image brightness is increased. Further, since the gate structure in which the margin is increased to reduce the value of the off current can be realized, the image quality is further increased.

In the configuration of Embodiment 4, the current supply line 64 may be formed jointly between neighboring pixels as in Embodiment 2, and a structure similar to Embodiment 3 may be used. In addition, the manufacturing process can be carried out according to the first embodiment.

Example 5

The case where the upper gate type TFT is used is described in Embodiments 1 to 4, and the present invention may be implemented using the lower gate type TFT. The case of implementing the present invention by using the inverted batch TFT is described in Example 5 with reference to FIG. Except for the structure of the TFT, the same reference numerals as those used in FIG.

In FIG. 13, a material similar to that of FIG. 1 can be used for the substrate 11 and the base film 12. The switching TFT 1301 and the current control TFT 1302 are formed on the base film 12.

The switching TFT 1301 includes the gate electrodes 70a and 70b, the gate wiring 71, the gate insulating film 72, the source region 73, the drain region 74, the LDD regions 75a to 75d, and the high concentration impurity region ( 76, channel formation regions 77a and 77b, channel protective films 78a and 78b, first interlayer insulating film 79, source wiring 80, and drain wiring 81.

The current control TFT 1302 further includes a gate electrode 82, a gate insulating film 72, a source region 83, a drain region 84, an LDD region 85, a channel forming region 86, and a channel protective film 87. ), A first interlayer insulating film 79, a source wiring 88, and a drain wiring 89. The gate electrode 82 is electrically connected to the drain wiring 81 of the switching TFT 1301 at this point.

The switching TFT 1301 and the current control TFT 1302 can be formed according to a known method of manufacturing an inverted batch TFT. In addition, a similar material used for the corresponding portion of the upper gate type TFT of Embodiment 1 can be used for the material of each portion (wiring, insulating film, active layer, etc.) formed in the TFT. The channel protective films 78a, 78b, and 87, which are not included in the configuration of the upper gate type TFT, can be formed by an insulating film containing silicon. In addition, the formation of impurity regions such as source regions, drain regions, and LDD regions can be formed by using photolithography techniques and visually changing the impurity concentration.

After the TFT is completed, the first passivation film 41, the color filter 42, the fluorescent material 43, the second interlayer insulating film (flattening film) 44, the second passivation film 45, the pixel electrode (anode) 46, a pixel having an EL element 1303 in which an EL layer 47, an MgAg electrode (cathode) 48, an aluminum electrode (protective film) 49, and a third passivation film 50 are formed in sequence are converted. Example 1 is cited for the above-described materials and methods for their preparation.

It is possible to freely combine the configurations of the fifth embodiment according to any of the configurations of the second to fourth embodiments.

Example 6

It is effective to use a material having a high heat dissipation effect similar to the second passivation film 45 as the base film formed between the active layer and the substrate in the structure of Fig. 5C or Fig. 1 of the first embodiment. In particular, since a large amount of current flows to the current control TFT, heat is easily generated, and deterioration due to heat generation itself may be a problem. Thermal deterioration of the TFT can be prevented by using the base film of Example 6 having a heat dissipation effect for this type of case.

Of course, since the protection effect by diffusion of active ions from the substrate is also very important, the laminated structure of the compound including Si, Al, N, O and M, and the insulating film containing the first passivation film 41 and the falling silicon Preference is given to using.

According to any configuration of Embodiments 1 to 5, it is possible to combine the configuration of Embodiment 6 with Europe.

Example 7

When the pixel structure shown in Embodiment 3 is used, light emitted from the EL layer is emitted in a direction opposite to the substrate, so that it is not necessary to pay attention to the transmittance of a material such as an insulating film located between the substrate and the pixel electrode. . That is, a material having a somewhat small transmittance may be used.

Therefore, it is advantageous to use a carbon film such as the diamond film, the diamond-like carbon film, or the amorphous carbon film as the base film 12, the first passivation film 41 or the second passivation film 45. That is, since there is no need to worry about lower transmittance, the film thickness can be set to a thickness of 100 to 500 nm, and it is possible to have a very high heat dissipation effect.

It should be noted that in the case of using the carbon film for the third passivation film 50, it is preferable to set the film thickness to 5 to 100 nm because a decrease in transmittance should be avoided.

In Example 7, the carbon film is effective for laminating with another insulating film when used in any of the base film 12, the first passivation film 41, the second passivation film 45, or the third passivation film 50. to be.

In addition, the seventh embodiment is effective when the pixel structure shown in the third embodiment is used for another configuration, and it is possible to freely combine the configuration of the seventh embodiment according to any configuration of the first to sixth embodiments.

Example 8

The amount of off current value in the switching TFT in the pixel of the EL display device is reduced by using the multi-gate structure of the switching TFT, and the present invention is characterized in that no storage capacitor is required. This is a device which makes it possible to utilize the surface area in which the storage capacitor is retained as the emission area.

However, even if the storage capacitor is not completely removed, the effect of increasing the effective emission surface area can be obtained by making the exclusive surface area smaller. That is, the object of the present invention can be sufficiently achieved by reducing the off current value by using the multi-gate structure of the switching TFT and reducing the exclusive surface area of the storage capacitor.

Therefore, the pixel structure as shown in Fig. 14 can be used. If necessary, the same reference numerals are used in FIG. 14 as in FIG.

The difference between FIG. 14 and FIG. 1 is the presence of the storage capacitor 1401 connected to the switching TFT. The storage capacitor 1401 is formed by the switching TFT 201, the gate insulating film 18, and the semiconductor region (lower electrode) extending from the capacitor electrode (upper electrode) 1403. The capacitor electrode 1403 is formed simultaneously with the gate electrodes 19a, 19b and 35 of the TFT.

15A shows a plan view. The cross-sectional diagram taken along line A-A 'in the top view of FIG. 15A corresponds to FIG. As shown in FIG. 15A, the capacitor electrode 1403 is electrically connected to the source region 31 of the current control TFT through a connection wiring 1404 electrically connected to the capacitor electrode 1403. As shown in FIG. Note that the connection wiring 1404 is formed at the same time as the source wirings 21 and 36 and the drain wirings 22 and 37. FIG. 15B also shows a circuit configuration of the top view shown in FIG. 15A.

The configuration of the eighth embodiment can be freely combined according to any configuration of the first to seventh embodiments. That is, only a storage capacitor is formed inside the pixel, and there is no further limitation on the TFT structure or the EL layer material.

Example 9

Laser crystallization is used as a means for forming the crystalline silicon film 302 in Example 1, and the case of using other crystallization means is described in Example 9.

After forming the amorphous silicon film in Example 9, crystallization is performed using the technique recorded in Japanese Patent Laid-Open No. 7-130652. The technique disclosed in this patent application is to obtain a crystalline silicon film having good crystallinity by using an element such as nickel as a catalyst for promoting crystallization.

In addition, after the crystallization process is completed, a step of removing the catalyst used for crystallization is performed. In this case, the catalyst can be removed using the technique disclosed in Japanese Patent Laid-Open No. 10-270363 or Japanese Patent Laid-Open No. 8-330602.

Further, the TFT can be formed using the technique described in the specification of Japanese Patent Laid-Open No. 11-076967 by the present applicant.

The manufacturing method shown in Example 1 is one embodiment of the present invention, and when the structure of Fig. 1 or 5C of Example 1 is provided, other manufacturing methods may be used without the problem as described above.

It is possible to freely combine the configurations of the ninth embodiment according to any of the configurations of the first to eighth embodiments.

Example 10

In driving the EL display device of the present invention, analog driving can be performed using an analog signal as an image signal, and digital driving can be executed using a digital signal.

When analog driving is executed, the analog signal is transmitted to the source wiring of the switching TFT, and the analog signal including the brightness information becomes the gate voltage of the current control TFT. The current flowing in the EL element is controlled by the current control TFT, the EL element emission intensity is controlled, and the brightness display is performed. In this case, it is preferable to operate the current control TFT in the saturation region. In other words, it is preferable to operate the TFT within the conditions of V _ds V> g _gs- V _{th m} . V _ds is the voltage difference between the source region and the drain region, V _gs is the voltage difference between the source region and the gate electrode, and V _th is the threshold voltage of the TFT.

On the other hand, when digital driving is executed, it is different from the analog type brightness display, and the brightness display is performed by time division driving (time / brightness driving) or surface area / brightness driving. That is, by adjusting the length of the emission time or the ratio of the emission surface area, the hue lightness can be seen to be visible in the change. In this case, it is preferable to operate the current control TFT in the linear region. That is, it is preferable to operate the TFT within the condition of ┃V _ds ┃ <┃V _gs -V _th ┃.

The EL element has a very fast response speed compared with the liquid crystal element, and therefore high speed driving is possible. Therefore, the EL element is suitable for time / brightness driving in which one frame is divided into a plurality of small frames so that the brightness display is executed. In addition, since it is advantageous that the period of one frame is short, the length of time that the gate voltage of the current control TFT is maintained is also shortened, and the storage capacitor can be made small or eliminated.

Since the present invention is a technique related to the device structure, any driving method can be used.

Example 11

In Embodiment 11, examples of the pixel structure of the EL display device of the present invention are shown in Figs. 21A and 21B. In Embodiment 11, reference numeral 4701 designates a source wiring of the switching TFT 4702, reference numeral 4703 designates a gate wiring of the switching TFT 4702, reference numeral 4704 designates a current control TFT, and 4705 designates a current supply line, reference numeral 4706 designates a power supply control TFT, reference numeral 4707 designates a power supply control gate wiring, and reference numeral 4708 designates an EL element. Japanese Patent Laid-Open No. 11-341272 is cited for the operation of the power source control TFT 4706.

Further, in the eleventh embodiment, the power supply control TFT 4706 is formed between the current control TFT 4704 and the EL element 4708, but the current control TFT 4704 is between the power supply control TFT 4706 and the EL element 4708. The structure formed in the may be used. Further, it is preferable that the power source control TFT 4706 has the same structure as the current control TFT 4704, and is preferably formed in a line by the same active layer.

21A is an example of the case where the current supply line 4705 is shared between two pixels. That is, two pixels are formed in a linear symmetry around the current supply line 4705. In this case, the number of current supply lines can be reduced, so that the pixel portion can be made with higher precision.

21B is an example in which the current supply line 4710 is formed in parallel with the gate wiring 4703 and the power supply control gate wiring 4711 is formed in parallel with the source wiring 4701. The structure in FIG. 23B is formed so that the current supply line 4710 and the gate wiring 4703 do not overlap, but in the case where the wiring is formed on two different layers, it may be formed so as to overlap with an insulating film interposed therebetween. In this case, the exclusive surface area of the current supply line 4710 and the gate wiring 4703 can be shared, and the pixel portion can be made with higher precision.

Example 12

In Embodiment 12, examples of the pixel structure of the EL display device of the present invention are shown in Figs. 22A and 22B. In the twelfth embodiment, reference numeral 4801 designates a source wiring of the switching TFT 4802, reference numeral 4803 designates a gate wiring of the switching TFT 4802, reference numeral 4804 designates a current control TFT, and reference numeral 4805. Indicates a current supply line, reference numeral 4806 indicates an erasing TFT, reference numeral 4807 indicates an erase gate wiring, and reference numeral 4808 indicates an EL element. Japanese Patent Laid-Open No. 11-338786 is cited regarding the operation of the erasing TFT 4806.

The drain of the erasing TFT 4806 is connected to the gate of the current control TFT 4804, and can forcibly change the gate voltage of the current control TFT 4804. An n-channel TFT or a p-channel TFT can be used for the erasing TFT 4806, but is preferably made of the same structure as the switching TFT 4802 so that the off current value is smaller.

22A is an example of the case where the current supply line 4805 is shared between two pixels. That is, it is characterized by two pixels formed in linear symmetry around the current supply line 4805. In this case, the number of current supply lines can be reduced, so that the pixel portion can be made with higher precision.

22B is an example in which the current supply line 4810 is formed in parallel with the gate wiring 4803 and the erase gate wiring 4811 is formed in parallel with the source wiring 4801. The structure in Fig. 22B is formed so that the current supply line 4810 and the gate wiring 4803 do not overlap, but in the case where the wiring is formed on two different layers, it can be formed so as to overlap with an insulating film interposed therebetween. In this case, the exclusive surface area of the current supply line 4810 and the gate wiring 4803 can be shared, and the pixel portion can be made with higher precision.

Example 13

The EL display device of the present invention may have a structure in which some TFTs are formed in a pixel. In Example 11 and Example 12, an example of forming three TFTs is shown, but four to six TFTs may be formed. It is possible to implement the present invention without any limitation on the structure of the pixel of the EL display device.

Example 14

An example of using the p-channel TFT as the current control TFT 202 of FIG. 1 is described in Embodiment 14. FIG. Since the remaining parts are the same as those in FIG. 1, detailed descriptions are omitted.

The cross-sectional structure of the pixel of Example 14 is shown in FIG. Example 1 may be cited in the method for manufacturing the p-channel TFT used in Example 14. The active layer of the p-channel TFT includes a source region 2801, a drain region 2802, and a channel formation region 2803, which are connected to the source wiring 36, and the drain region 2802. ) Is connected to the drain wiring 37.

In the case where the anode of the EL element is connected to the current control TFT, it is preferable to use the p-channel TFT as the current control TFT.

The structure of Example 14 can be implemented by combining freely according to the arbitrary structures of Example 1-13.

Example 15

By using an EL material in which phosphorescence from an exciton in the three-state state can be used for light emission in Example 15, the external emission quantum efficiency can be increased to a considerable amount. By doing so, the EL element can be made small in power consumption, long in life, and light in weight.

A report that increases the external emission quantum efficiency using the excitons in the three-state state is described below.

Photochemical process in the organic molecular system on page 437 of Honda's education book by Tsutsui T., Adachi City, and Saito S. (Elsevier Science, Tokyo, 1991, 1991).

The molecular formula of the EL material (commarin pigment) reported in the report is shown below.

Of Nature 395 (1998) by Valdo M. A. O'Brien D. F., Yu Yu., Shostikov A., Sibli S., Thompson M. E., and Forest S. R. P. 151.

The molecular formula of the EL material (Pt composite) reported in the report is shown below.

Journal of Applied Physics by Valldo M., Ramansky S., Burrow P. E., Thompson M. E., and Forest S. R. 75 (1999), p. 4.

Tsutsui T., Yang M. J., Yahiro M., Nakamura K., Watanabe T., Tsuji T., Fukuda Y., Wakimoto T., Mayaguchi S., Japan Applied Physics Report 38 (12B) ( 1999) L1502.

The molecular formula of the EL material (Ir complex) reported in the report is shown below.

In the case where phosphorescence emission from an exciton in the three-state state can be used, in principle, an external emission quantum efficiency of three to four times larger than when using fluorescence emission from the exciton in the one-state state can be realized. . The structure of Example 15 can be implemented by combining freely according to any structure of Example 1-14.

Example 16

In Example 1, it is preferable to use an organic EL material as the EL layer, but the present invention may also be practiced using an inorganic EL material. However, since the current inorganic EL material has a very high driving voltage, a TFT having a voltage resistance characteristic that can withstand the driving voltage must be used when performing analog driving.

Optionally, when an inorganic EL material having a lower driving voltage than the conventional inorganic EL material is developed, it is possible to apply it to the present invention.

In addition, the structure of Example 16 can be implemented by combining freely according to arbitrary structures of Example 1-14.

Example 17

The active matrix EL display device (EL module) formed by practicing the present invention has excellent visibility in terms of sharpness in comparison with the liquid crystal display device because it is a self-emission device. Therefore, it has a wide range of use as a direct observation type EL display (indicating a display incorporating an EL module).

A wide viewing angle can be given as one advantage that the EL display has over the liquid crystal display. Therefore, the EL display of the present invention can be used as a display (display monitor) having a diagonal size of 30 inches or more (typically 40 inches or more) for watching TV broadcast by a large screen.

It can also be used not only as an EL display (personal computer monitor, TV broadcast reception monitor, or advertisement display monitor) but also as a display of various electronic devices.

Image playback devices (especially recording) using video cameras, digital cameras, goggle displays (head mounted displays), vehicle navigation systems, personal computers, portable information terminals (mobile computers, mobile phones, or electronic books), and recording media An electronic device such as a compact disk (CD), a laser disk (LD), or a device provided with a display capable of displaying an image such as a digital video disk (DVD)) for executing reproduction of a medium may be given as an example. Examples of these electronic devices are shown in FIGS. 16A-16F.

FIG. 16A is a personal computer including a body 2001, a casing 2002, a display portion 2003, and a keyboard 2004. The present invention can be used in the display unit 2003.

16B is a video camera including a body 2101, a display portion 2102, an audio input portion 2103, an operation switch 2104, a battery 2105, and an image receiving portion 2106. The present invention can be used in the display portion 2102.

FIG. 16C is a goggle display including a body 2201, a display portion 2202, and an arm portion 2203. The present invention can be used for the display portion 2202.

FIG. 16D is a mobile computer that includes a body 2301, a camera portion 2302, an image receiving portion 2303, an operation switch 2304, and a display portion 2305. The present invention can be used in the display unit 2305.

16E illustrates a recording medium including a body 2401, a recording medium (CD, LD, or DVD) 2402, an operation switch 2403, a display portion (a) 2404, and a display portion (b) 2405. It is a provided image reproducing apparatus (in particular, a DVD reproducing apparatus). The display portion (a) is mainly used for displaying image information, the image portion (b) is mainly used for displaying character information, and the present invention can be used for the image portion (a) and the image portion (b). The present invention can be used as an image reproducing apparatus provided with a recording medium in apparatuses such as a CD reproducing apparatus and a game machine.

16F is an EL display including a casing 2501, a support stand 2502, and a display portion 2503. The present invention can be used for the display portion 2503. The EL display of the present invention is particularly advantageous when the screen is large, and is advantageous for displays having a diagonal size of 10 inches or more (particularly 30 inches or more).

In addition, when the emission luminance of the EL material becomes larger later, it will be possible to use the present invention for the front type or the rear type light emitter.

The electronic device is used more frequently when the opportunity for displaying display information, particularly animation information, provided through an electronic transmission circuit such as the Internet or CATV (cable television) increases. Since the response speed of the EL material is very high, the EL display is suitable for implementing the above type of display.

Since the emitting portion of the EL display device consumes power, it is preferable to display the information so that the emitting portion is as small as possible. Therefore, when using an EL display device in a display portion that mainly displays character information, such as a portable information terminal, in particular, a portable telephone of a vehicle audio system, it is desirable to drive by setting the non-emission portion as a background and forming character information on the emission portion. Do.

20A is a portable telephone including a body 2601, an audio output 2602, an audio input 2603, a display 2604, an operation switch 2605, and an antenna 2606. The EL display device of the present invention can be used for the display portion 2604. By displaying a white character on a black background of the display portion 2604, the power consumption of the portable telephone can be reduced.

20B is an onboard audio system (vehicle audio system) that includes a body 2701, a display portion 2702, and actuation switches 2703 and 2704. The EL display device of the present invention can be used for the display portion 2702. In addition, although an onboard audio system is shown in Embodiment 17, a desktop audio system may be used. By displaying a white character on a black background on the display portion 2702, power consumption can be reduced.

Therefore, the scope of application of the present invention is very wide, and it is possible to apply the present invention to electronic devices in all fields. Further, the electronic device of the seventeenth embodiment can be realized by using any configuration of any combination of the first to sixteenth embodiments.

By using the present invention, the EL element is prevented from being deteriorated by moisture and heat. In addition, adverse effects on the TFT characteristics are prevented by diffusion of the alkali metal from the EL layer. As a result, the operating performance and reliability of the EL display device can be significantly improved.

Also, by including the EL display device as a display, it becomes possible to produce an application (electronic device) having good image quality and durability (high reliability).

The present invention provides an electro-optical device, particularly an EL display device, with good operating performance and high reliability, and increases the quality of electronic equipment (electronic device) having an electro-optical device as a display device by increasing the image quality of the electro-optical device. .

Claims (36)

In the method for manufacturing a display device, Forming a semiconductor film over the substrate; Forming a first insulating film on the semiconductor film; Forming a gate electrode on the first insulating film; Forming a second insulating film over the gate electrode, wherein the second insulating film has a contact hole; Forming one of a source wiring and a drain wiring over the second insulating film, wherein one of the source wiring and the drain wiring is electrically connected to the semiconductor film through the contact hole of the second insulating film Steps; Forming a third insulating film on one of the source wiring and the drain wiring; Forming a fourth insulating film including a resin on the third insulating film; Forming a fifth insulating film on the fourth insulating film; Forming an electroluminescence (EL) element on the fourth insulating film, wherein the EL element is a first electrode formed on the fifth insulating film, an EL layer formed on the first electrode by an inkjet method, and the EL layer The EL element forming step comprising a second electrode formed thereon; And the EL layer is in contact with the upper surface of the fifth insulating film. The semiconductor device of claim 1, wherein each of the third and fifth insulating layers comprises at least one element selected from the group consisting of B (boron), C (carbon), and N (nitrogen), Al (aluminum), and Si. An insulating film containing at least one element selected from the group consisting of (silicon) and P (phosphorus), or an insulating film containing Si, Al, N, O and M, wherein M is Ce (cerium), Yb Rare earth, preferably one selected from the group consisting of (ytterbium), Sm (samarium), Er (erbium), Y (yttrium), La (lanthanum), Gd (gadolinium), Dy (dysprosium) and Nd (neodymium) A display device manufacturing method which is an element. The method of claim 1, wherein each of the third and fifth insulating films comprises a material selected from the group consisting of silicon oxide and silicon oxygen-containing nitride. In the method for manufacturing a display device, Forming a semiconductor film over the substrate; Forming a first insulating film on the semiconductor film; Forming a gate electrode on the first insulating film; Forming a second insulating film over the gate electrode, wherein the second insulating film has a contact hole; Forming one of a source wiring and a drain wiring over the second insulating film, wherein one of the source wiring and the drain wiring is electrically connected to the semiconductor film through the contact hole of the second insulating film Steps; Forming a third insulating film on one of the source wiring and the drain wiring; Forming a fourth insulating film including a resin on the third insulating film; Forming a fifth insulating film on the fourth insulating film; Forming an EL element over the fourth insulating film, wherein the EL element includes a first electrode, a second electrode formed over the fifth insulating film, and an EL layer interposed therebetween; and, The EL layer is in contact with the upper surface of the fifth insulating film, And the second electrode and the second electrode are formed continuously without exposure to the atmosphere. The semiconductor device of claim 4, wherein each of the third and fifth insulating layers comprises one element selected from the group consisting of B (boron), C (carbon), and N (nitrogen), Al (aluminum), and Si ( And at least one element selected from the group consisting of silicon) and P (phosphorus).  The method of claim 4, wherein each of the third and fifth insulating layers includes Si, Al, N, O, and M, wherein M is Ce (cerium), Yb (ytterbium), Sm (samarium), or Er. A method of manufacturing a display device, wherein the rare earth element is one selected from the group consisting of (erbium), Y (yttrium), La (lanthanum), Gd (gadolinium), Dy (dysprosium), and Nd (neodymium). 5. An element selected from the group consisting of B (boron), C (carbon), and N (nitrogen), Al (aluminum), Si (silicon), and P (between the substrate and the semiconductor film; And forming an insulating film containing at least an element selected from the group consisting of phosphorus).  5. The method of claim 4, further comprising forming an insulating film comprising Si, Al, N, O, and M between the substrate and the semiconductor film, wherein M is Ce (cerium), Yb (ytterbium). , A display of a rare earth element, preferably one selected from the group consisting of Sm (samarium), Er (erbium), Y (yttrium), La (lanthanum), Gd (gadolinium), Dy (dysprosium) and Nd (neodymium) Device manufacturing method. In the method for manufacturing a display device, Forming a semiconductor film over the substrate; Forming a first insulating film on the semiconductor film; Forming a gate electrode on the first insulating film; Forming a second insulating film over the gate electrode, wherein the second insulating film has a contact hole; Forming one of a source wiring and a drain wiring over the second insulating film, wherein one of the source wiring and the drain wiring is electrically connected to the semiconductor film through the contact hole of the second insulating film Steps; Forming a third insulating film on one of the source wiring and the drain wiring; Forming a planarization film including a resin on the third insulating film; Forming a fourth insulating film on the planarization film; Forming an EL element on the planarization film, the EL element comprising the EL element forming step including a first electrode, a second electrode formed over the fourth insulating film, and an EL layer interposed therebetween; , And the EL layer is formed by an inkjet method so as to be in contact with the upper surface of the fourth insulating film. 10. The method of claim 9, wherein each of the third and fourth insulating films comprises a material selected from the group consisting of silicon oxide and silicon oxygen-containing nitride. The display device manufacturing method according to claim 1 or 9, wherein the EL layer includes an organic light emitting layer. In the method for manufacturing a display device, Forming a semiconductor film over the substrate; Forming a first insulating film on the semiconductor film; Forming a gate electrode on the first insulating film; Forming a second insulating film over the gate electrode, wherein the second insulating film has a contact hole; Forming one of a source wiring and a drain wiring over the second insulating film, wherein one of the source wiring and the drain wiring is electrically connected to the semiconductor film through the contact hole of the second insulating film Steps; Forming a third insulating film including silicon and nitrogen on one of the source wiring and the drain wiring; Forming a planarization film including a resin on the third insulating film; Forming a fourth insulating film on the planarization film; Forming an EL element on the planarization film, the EL element comprising the EL element forming step including a first electrode, a second electrode formed over the fourth insulating film, and an EL layer interposed therebetween; , The EL layer is in contact with the upper surface of the fourth insulating film, And the second electrode and the second electrode are formed continuously without exposure to the atmosphere. In the display device, Substrate, A semiconductor film formed on the substrate; A first insulating film formed over the semiconductor film; A gate electrode formed on the first insulating film; A second insulating film formed over the gate electrode, the second insulating film having a contact hole; One of a source wiring and a drain wiring formed on the second insulating film, the one of the source wiring and the drain wiring electrically connected to the semiconductor film through the contact hole of the second insulating film: A third insulating film formed over one of the source wiring and the drain wiring; A planarization film comprising a resin formed on the third insulating film: A fourth insulating film formed on the planarization film; An EL element formed over said planarization film, said EL element comprising a first electrode formed over said fourth insulating film, an EL layer formed over said first electrode, and a second electrode formed over said EL layer, And the EL layer is in contact with the upper surface of the fourth insulating film. The display device according to claim 13, wherein a storage capacitor is formed by the semiconductor film, the first insulating film, and the capacitor electrode. The display apparatus of claim 13, wherein each of the third and fourth insulating layers comprises silicon, nitrogen, and oxygen. The display device of claim 13, wherein the second insulating film comprises silicon nitride. The display device according to claim 13, wherein the second insulating film comprises C (carbon). The method of claim 1, wherein the fifth insulating film comprises C (carbon). The method according to claim 9 or 12, wherein the fourth insulating film comprises C (carbon). The method of claim 1, wherein the fourth insulating film comprises a material selected from the group consisting of polyimide, polyamide, acrylic, and benzocyclobutane (BCB). The method of claim 12, wherein the planarization film comprises a material selected from the group consisting of polyimide, polyamide, acrylic, and benzocyclobutane (BCB). The display device of claim 13, wherein the planarization film comprises a material selected from the group consisting of polyimide, polyamide, acrylic, and benzocyclobutane (BCB). In the display device, Substrate, A semiconductor film formed on the substrate; A first insulating film formed over the semiconductor film; A gate electrode formed on the first insulating film; A second insulating film formed over the gate electrode, the second insulating film having a contact hole; One of a source wiring and a drain wiring formed on the second insulating film, the one of the source wiring and the drain wiring electrically connected to the semiconductor film through the contact hole of the second insulating film: A third insulating film formed over one of the source wiring and the drain wiring; A planarization film comprising a resin formed on the third insulating film: A fourth insulating film formed on the planarization film; And an EL element formed over the planarization film, the EL element including a first electrode provided over the fourth insulating film, an EL layer formed over the first electrode, and a second electrode formed over the EL layer. In the display device, Substrate, A semiconductor film formed on the substrate; A first insulating film formed over the semiconductor film; A gate electrode formed on the first insulating film; A second insulating film formed over the gate electrode, the second insulating film having a contact hole; One of a source wiring and a drain wiring formed on the second insulating film, the one of the source wiring and the drain wiring electrically connected to the semiconductor film through the contact hole of the second insulating film: A third insulating film formed over one of the source wiring and the drain wiring; A fourth insulating film comprising a resin formed on the third insulating film; A fifth insulating film formed on the fourth insulating film: A display device comprising the EL element formed over the fourth insulating film, the EL element including a first electrode provided over the fifth insulating film, an EL layer formed over the first electrode, and a second electrode formed over the EL layer . Substrate, A semiconductor film formed on the substrate; A first insulating film formed over the semiconductor film; A gate electrode formed on the first insulating film; A second insulating film formed over the gate electrode, the second insulating film having a contact hole; One of a source wiring and a drain wiring formed on the second insulating film, the one of the source wiring and the drain wiring electrically connected to the semiconductor film through the contact hole of the second insulating film: A third insulating film formed over one of the source wiring and the drain wiring; A fourth insulating film formed on the third insulating film; A fifth insulating film formed with the fourth insulating film: An EL element formed over said fourth insulating film, said EL element comprising a first electrode provided over said fifth insulating film, an EL layer formed over said first electrode, and a second electrode formed over said EL layer, And the EL layer is in contact with the upper surface of the fifth insulating film. 26. The display device according to any one of claims 23 to 25, wherein the third insulating film comprises silicon nitride. The display device of claim 23, wherein the planarization film comprises a material selected from the group consisting of polyimide, polyamide, acryl, and benzocyclobutane (BCB). 26. A display device according to claim 24 or 25, wherein the fourth insulating film comprises a material selected from the group consisting of polyimide, polyamide, acrylic, and benzocyclobutane (BCB). The display device according to claim 23, wherein the fourth insulating film comprises C (carbon). The display device according to claim 25, wherein the fifth insulating film comprises C (carbon). 26. The display according to any one of claims 23 to 25, wherein the substrate is a substrate selected from the group consisting of glass substrates, glass ceramic substrates, quartz substrates, silicon substrates, ceramic substrates, metal substrates and plastic substrates. Device. The display device according to any one of claims 23 to 25, wherein the semiconductor film is a semiconductor film selected from the group consisting of a single crystal semiconductor film, a polycrystalline semiconductor film and a microcrystalline semiconductor film. The display device according to any one of claims 23 to 25, wherein the first insulating film comprises silicon. 26. The display device according to any one of claims 23 to 25, wherein the gate electrode comprises molybdenum (Mo). The display device according to any one of claims 23 to 25, wherein one of the source wiring and the drain wiring comprises a first layer, a second layer, and a third layer. The display device according to any one of claims 23 to 25, wherein the third insulating film is a protective film.

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