KR100776516B1 - Circuit for controlling Wake up of system having battery pack - Google Patents

Circuit for controlling Wake up of system having battery pack Download PDF

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KR100776516B1
KR100776516B1 KR1020050030337A KR20050030337A KR100776516B1 KR 100776516 B1 KR100776516 B1 KR 100776516B1 KR 1020050030337 A KR1020050030337 A KR 1020050030337A KR 20050030337 A KR20050030337 A KR 20050030337A KR 100776516 B1 KR100776516 B1 KR 100776516B1
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South Korea
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transistor
turned
wake
battery pack
control circuit
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KR1020050030337A
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Korean (ko)
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KR20060108149A (en
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이달훈
이한호
김지호
에구치 야스히토
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주식회사 엘지화학
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    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01M—PROCESSES OR MEANS, e.g. BATTERIES, FOR THE DIRECT CONVERSION OF CHEMICAL ENERGY INTO ELECTRICAL ENERGY
    • H01M10/00—Secondary cells; Manufacture thereof
    • H01M10/42—Methods or arrangements for servicing or maintenance of secondary cells or secondary half-cells
    • H01M10/425—Structural combination with electronic components, e.g. electronic circuits integrated to the outside of the casing
    • H01M10/4257—Smart batteries, e.g. electronic circuits inside the housing of the cells or batteries
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01M—PROCESSES OR MEANS, e.g. BATTERIES, FOR THE DIRECT CONVERSION OF CHEMICAL ENERGY INTO ELECTRICAL ENERGY
    • H01M10/00—Secondary cells; Manufacture thereof
    • H01M10/42—Methods or arrangements for servicing or maintenance of secondary cells or secondary half-cells
    • H01M10/48—Accumulators combined with arrangements for measuring, testing or indicating the condition of cells, e.g. the level or density of the electrolyte
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01M—PROCESSES OR MEANS, e.g. BATTERIES, FOR THE DIRECT CONVERSION OF CHEMICAL ENERGY INTO ELECTRICAL ENERGY
    • H01M50/00—Constructional details or processes of manufacture of the non-active parts of electrochemical cells other than fuel cells, e.g. hybrid cells
    • H01M50/20—Mountings; Secondary casings or frames; Racks, modules or packs; Suspension devices; Shock absorbers; Transport or carrying devices; Holders
    • H01M50/204—Racks, modules or packs for multiple batteries or multiple cells
    • H—ELECTRICITY
    • H02—GENERATION; CONVERSION OR DISTRIBUTION OF ELECTRIC POWER
    • H02J—CIRCUIT ARRANGEMENTS OR SYSTEMS FOR SUPPLYING OR DISTRIBUTING ELECTRIC POWER; SYSTEMS FOR STORING ELECTRIC ENERGY
    • H02J7/00—Circuit arrangements for charging or depolarising batteries or for supplying loads from batteries
    • H02J7/0047—Circuit arrangements for charging or depolarising batteries or for supplying loads from batteries with monitoring or indicating devices or circuits
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01M—PROCESSES OR MEANS, e.g. BATTERIES, FOR THE DIRECT CONVERSION OF CHEMICAL ENERGY INTO ELECTRICAL ENERGY
    • H01M2220/00—Batteries for particular applications
    • H01M2220/30—Batteries in portable systems, e.g. mobile phone, laptop
    • Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y02—TECHNOLOGIES OR APPLICATIONS FOR MITIGATION OR ADAPTATION AGAINST CLIMATE CHANGE
    • Y02E—REDUCTION OF GREENHOUSE GAS [GHG] EMISSIONS, RELATED TO ENERGY GENERATION, TRANSMISSION OR DISTRIBUTION
    • Y02E60/00—Enabling technologies; Technologies with a potential or indirect contribution to GHG emissions mitigation
    • Y02E60/10—Energy storage using batteries

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  • Engineering & Computer Science (AREA)
  • Chemical & Material Sciences (AREA)
  • Chemical Kinetics & Catalysis (AREA)
  • Electrochemistry (AREA)
  • General Chemical & Material Sciences (AREA)
  • Manufacturing & Machinery (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Charge And Discharge Circuits For Batteries Or The Like (AREA)

Abstract

본 발명은 배터리 팩을 구비한 시스템의 웨이크 업 제어회로에 있어서, 시스템의 부하전류를 검출하는 제1 트랜지스터(TR1)와, 제1 트랜지스터(TR1)가 온 동작됨에 따라 웨이크 업 신호를 제공받는 CPU부와, 상기 제1 트랜지스터(TR1)가 온 동작됨에 따라 순차적으로 온 동작되는 제2 트랜지스터(TR2)와, 상기 제2 트랜지스터가 온 동작됨에 따라 순차적으로 온 동작되는 FET를 포함한다.According to an embodiment of the present invention, a wake-up control circuit of a system having a battery pack includes a first transistor TR1 for detecting a load current of a system and a CPU receiving a wake-up signal as the first transistor TR1 is turned on. And a second transistor TR2 sequentially turned on as the first transistor TR1 is turned on, and a FET sequentially turned on as the second transistor is turned on.

본 발명에 의하면 미소한 전류를 검출할 수 있어 배터리 팩이 시스템에 장착되어 시스템 전원이 온 되는 것을 감지할 수 있다.According to the present invention, a minute current can be detected and a battery pack can be mounted in the system to detect that the system power is turned on.

배터리 팩, 웨이크 업, FET Battery Packs, Wake-Ups, FETs

Description

배터리 팩을 구비하는 시스템의 웨이크 업 제어회로{Circuit for controlling Wake up of system having battery pack}Circuit for controlling wake up of system having battery pack

도 1은 본 발명에 의한 웨이크 업 제어회로의 일실시예를 나타낸 회로도이다.1 is a circuit diagram showing an embodiment of a wake-up control circuit according to the present invention.

도 2는 본 발명에 의한 웨이크 업 제어회로의 다른 실시예를 나타낸 회로도이다.2 is a circuit diagram showing another embodiment of the wake-up control circuit according to the present invention.

도 3은 본 발명의 타이밍도이다. 3 is a timing diagram of the present invention.

* 도면의 주요부분에 대한 부호의 설명 *Explanation of symbols on the main parts of the drawings

100 : 시스템 200 : CPU부100: system 200: CPU

본 발명은 배터리 팩을 구비하는 시스템의 웨이크 업 제어회로에 관한 것으로서, 특히 배터리 팩을 슬립모드에서 웨이크 업시키는 웨이크 업 제어회로에 관한 것이다.The present invention relates to a wake up control circuit of a system having a battery pack, and more particularly, to a wake up control circuit for waking up a battery pack in a sleep mode.

일반적으로, 소형 시스템이 동작하고 있지 않을 때 비디오 카메라, 휴대 전 화기 등의 시스템 전원용 배터리 팩은 슬립 모드(Sleep Mode) 상태에 있게 된다.In general, when a small system is not operating, a battery pack for a system power supply such as a video camera and a mobile phone is in a sleep mode.

이를 웨이크 업(Wake Up)시키는 방법은 종래의 경우에 제어선을 사용하여 시스템의 전원이 온 되는 것 등을 감지하여 배터리 팩을 웨이크 업시키는 방법과, 상기 제어선을 사용하지 않고 전류 검출에 의하여 장착 전원이 온 된 것을 감지하는 방법이 있었다. Wake up method is a conventional method using a control line to sense the power of the system is turned on by waking up the battery pack, and by using a current detection without using the control line There was a way to detect that the mounting power was on.

그러나, 후자의 경우에는 전류 검출 저항에 흐르는 전류를 검출하는데 고감도, 고정밀도의 OP앰프 등이 필요하였고 소비전류가 많아지게 되는 문제점이 있었다.However, in the latter case, a high sensitivity, high precision OP amplifier, etc. are required to detect the current flowing through the current detection resistor, and there is a problem in that the current consumption increases.

따라서 본 발명의 목적은 FET를 이용한 능동검출회로를 구성하여 간단하게 미소 전류를 검출하고 이 신호를 이용하여 배터리 팩을 웨이크 업시킬 수 있도록 한 배터리 팩을 구비하는 시스템의 웨이크 업 제어회로를 제공함에 있다.Accordingly, an object of the present invention is to provide a wake-up control circuit of a system having a battery pack configured to easily detect a small current by configuring an active detection circuit using a FET and to wake up the battery pack using this signal. have.

상기한 목적을 달성하기 위한 본 발명의 배터리 팩을 구비한 시스템의 웨이크 업 제어회로에 있어서, 시스템의 부하전류를 검출하는 제1 트랜지스터(TR1)와, 제1 트랜지스터(TR1)가 온 동작됨에 따라 웨이크 업 신호를 제공받는 CPU부와, 상기 제1 트랜지스터(TR1)가 온 동작됨에 따라 순차적으로 온 동작되는 제2 트랜지스터(TR2)와, 상기 제2 트랜지스터가 온 동작됨에 따라 순차적으로 온 동작되는 FET 를 포함하는 것을 특징으로 한다.In the wake-up control circuit of a system having a battery pack of the present invention for achieving the above object, as the first transistor (TR1) and the first transistor (TR1) for detecting the load current of the system is turned on CPU unit receiving a wake-up signal, a second transistor TR2 sequentially turned on as the first transistor TR1 is turned on, and a FET sequentially turned on as the second transistor is turned on Characterized in that it comprises a.

또한, 상기 FET는 P채널 또는 N채널로 구성되며, 상기 제1 트랜지스터는 수 10㎂ 정도의 미소한 전류를 검출하는 것을 특징으로 한다.In addition, the FET is composed of a P-channel or N-channel, the first transistor is characterized in that for detecting a small current of about 10 mA.

이러한 본 발명의 바람직한 실시예를 도 1 내지 도 3을 참조하여 설명하면 다음과 같다. Referring to the preferred embodiment of the present invention with reference to Figures 1 to 3 as follows.

먼저, 도 1에 의하면 본 발명에 의한 배터리 팩을 구비한 시스템의 웨이크 업 제어회로는 시스템의 부하전류를 검출하는 제1 트랜지스터(TR1)와, 제1 트랜지스터(TR1)가 온 동작됨에 따라 웨이크 업 신호를 제공받는 CPU부(200)와, 상기 제1 트랜지스터(TR1)가 온 동작됨에 따라 순차적으로 온 동작되는 제2 트랜지스터(TR2)와, 상기 제2 트랜지스터(TR2)가 온 동작됨에 따라 순차적으로 온 동작되는 FET1를 포함하는 배터리 팩으로 구성된다.First, according to FIG. 1, a wake-up control circuit of a system having a battery pack according to the present invention includes a first transistor TR1 that detects a load current of the system, and wakes up as the first transistor TR1 is turned on. The CPU unit 200 receiving the signal, the second transistor TR2 sequentially turned on as the first transistor TR1 is turned on, and sequentially turned on as the second transistor TR2 is turned on The battery pack includes a FET1 that is turned on.

또한, 상기 FET1은 P채널 또는 N채널로 구성되며, 상기 제1 트랜지스터(TR1)는 수 10㎂ 정도의 미소한 전류를 검출한다.In addition, the FET1 includes a P channel or an N channel, and the first transistor TR1 detects a minute current of about 10 mA.

상기와 같은 구성을 갖는 본 발명의 구체적인 동작과정은 다음과 같다.Specific operation process of the present invention having the configuration as described above is as follows.

비디오 카메라, 휴대용 전화기 등의 소형 시스템에 배터리 팩을 장착하면 시스템이 일종의 부하로 작용하여 시스템 전압(B+,B-)이 본 발명에 의한 웨이크 업 제어회로에 걸리게 된다.When the battery pack is installed in a small system such as a video camera or a mobile phone, the system acts as a kind of load so that the system voltages B + and B - are caught by the wake-up control circuit according to the present invention.

본 발명에 의한 웨이크 업 제어회로는 FET 소자의 구성을 P채널 타입 또는 N채널 타입 두 가지로 구성할 수 있는데 동작과정은 두 가지 타입 모두 전류 방향만 다르고 동일한 동작을 하기 때문에 여기서는 P 채널 타입을 중심으로 살펴본다.Wake-up control circuit according to the present invention can be configured in the configuration of the FET device of two types of P-channel type or N-channel type, the operation process is centered on the P channel type here because both types of operation is different only in the current direction Take a look.

먼저, 도 1에 도시된 바와같이 주로 휴대용 전화기 등의 소형 시스템에 배터리 팩이 장착되면 본 발명에 의한 웨이크 업 제어회로에 부하전류(IL )가 흐르게 된다.First, as shown in FIG. 1, when a battery pack is mainly installed in a small system such as a portable telephone, a load current I L flows through a wake-up control circuit according to the present invention.

초기에는 FET1이 오프 상태이기 때문에 부하전류(IL )는 R1,R2의 경로로 흐르게 된다. 그리고 R2에 걸리는 전압이 제1 트랜지스터(TR1)의 Vbe 전압(약 0.5V) 보다 크다면 제1 트랜지스터(TR1)가 온 되어 I1 이 흐르게 된다.Since FET1 is initially off, the load current I L flows through the paths R1 and R2. When the voltage applied to R2 is greater than the V be voltage (about 0.5 V) of the first transistor TR1, the first transistor TR1 is turned on and I 1 flows.

FET1의 드레인-소스간 전압(Vds)은 거의 일정하게 유지되며 I1이 흐른다면 I1, R4에 의하여 일정 전압이 생기고 이때 웨이크 업 신호가 발생되는 것이다.The drain-source voltage V ds of FET1 remains substantially constant. If I 1 flows, a constant voltage is generated by I1 and R4, and a wake-up signal is generated.

이때 상기 제1트랜지스터(TR1)의 콜렉터 출력단에 연결된 CPU부(200)로 웨이크 업 신호가 제공된다.At this time, a wake-up signal is provided to the CPU unit 200 connected to the collector output terminal of the first transistor TR1.

이때, 웨이크 업 출력신호는 도 3의 타이밍도에 나타난 바와같이 부하전류(IL)가 흐름에 따라 주기적으로 제공된다.At this time, the wake-up output signal is periodically provided as the load current I L flows, as shown in the timing diagram of FIG. 3.

상기 CPU부(200)는 웨이크 업 신호를 제공받아 해당 시스템을 제어하게 된다.The CPU unit 200 receives a wake up signal to control the system.

한편, 상기 I1 는 R5에 흐르게 되는데 이에 따라 R5에 걸린 전압이 제2 트랜지스터(TR2)의 Vbe 전압보다 크다면 순차적으로 제2 트랜지스터(TR2)가 온 된다.On the other hand, I 1 flows to R5. Accordingly, when the voltage applied to R5 is greater than the V be voltage of the second transistor TR2, the second transistor TR2 is sequentially turned on.

상기 제2 트랜지스터(TR2)가 온 되면 FET1의 게이트 전압이 내려가고 이에 따라 FET1이 온 되어 IF 가 흐르게 된다.When the second transistor TR2 is turned on, the gate voltage of the FET1 is decreased, and accordingly, the FET1 is turned on so that the I F flows.

따라서, 상기 부하전류(IL )은 IF와 I2로 나누어져 흐르게 된다.Therefore, the load current I L flows divided into I F and I 2 .

본 발명에 의한 웨이크 업 제어회로는 네가티브 피드백(Negative Feedback)의 구성이므로 FET1의 온 스위칭 동작은 자동적으로 제어된다. Since the wake-up control circuit according to the present invention is composed of negative feedback, the on switching operation of FET1 is automatically controlled.

또한, 스위칭 소자로서 FET를 사용함으로써 발열현상을 어느 정도 줄일 수 있다. In addition, by using the FET as the switching element, the heat generation phenomenon can be reduced to some extent.

한편, 본 발명에 의한 웨이크 업 제어회로에 N채널 타입의 FET를 사용하게 되면 각 전류의 방향만 바뀌게 되고 각 소자들은 상술한 바와 동일하게 동작된다.On the other hand, when the N-channel type FET is used in the wake-up control circuit according to the present invention, only the direction of each current is changed and each device operates as described above.

상술한 바와 같이 본 발명에 의하면 수 10㎂ 정도의 미소한 전류를 검출할 수 있기 때문에 배터리 팩이 시스템에 장착되어 시스템 전원이 온 되는 것을 감지할 수 있다.As described above, according to the present invention, since a minute current of about 10 mA can be detected, the battery pack can be mounted in the system to detect that the system power is turned on.

시스템 전원이 온 되었을 경우에 LED나 수 mA의 소비전류를 가지는 소자가 동작하게 되어 있으면 수 mA의 전류가 흐르기 때문에 웨이크 업이 용이해진다.When the system power is turned on, if the LED or the device having the current consumption of several mA is operated, several mA of current flows to facilitate wakeup.

Claims (4)

배터리 팩을 구비한 시스템의 웨이크 업 제어회로에 있어서,In the wake-up control circuit of a system having a battery pack, 시스템의 부하전류를 검출하는 제1 트랜지스터(TR1)와, 제1 트랜지스터(TR1)가 온 동작됨에 따라 웨이크 업 신호를 제공받는 CPU부와, 상기 제1 트랜지스터(TR1)가 온 동작됨에 따라 순차적으로 온 동작되는 제2 트랜지스터(TR2)와, 상기 제2 트랜지스터가 온 동작됨에 따라 순차적으로 온 동작되는 FET를 포함하고,A first transistor TR1 for detecting a load current of the system, a CPU unit receiving a wake-up signal as the first transistor TR1 is turned on, and sequentially turned on as the first transistor TR1 is turned on A second transistor TR2 that is turned on and a FET that is sequentially turned on as the second transistor is turned on, 배터리 팩이 시스템에 장착되면 상기 제1트랜지스터에 의해 미소 전류를 검출하고 시스템 전원이 온 되는 것을 감지하는 배터리 팩을 구비한 시스템의 웨이크 업 제어회로.And a battery pack for detecting a small current by the first transistor when the battery pack is mounted in the system and detecting that the system power is turned on. 제1항에 있어서, 상기 FET는 P채널로 구성되는 것을 특징으로 하는 배터리 팩을 구비한 시스템의 웨이크 업 제어회로.The wake up control circuit of claim 1, wherein the FET comprises a P channel. 제1항에 있어서, 상기 FET는 N채널로 구성되는 것을 특징으로 하는 배터리 팩을 구비한 시스템의 웨이크 업 제어회로.2. The wake up control circuit of claim 1, wherein the FET comprises N channels. 제1항에 있어서, 상기 FET는 네가티브 피드백(Negative Feedback) 구성으로 온 동작이 자동으로 제어되는 것을 특징으로 하는 배터리 팩을 구비한 시스템의 웨이크업 제어회로.The wake up control circuit of claim 1, wherein the FET is automatically controlled in a negative feedback configuration.
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