KR100774460B1 - Charge pump apparatus - Google Patents

Abstract

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a boosting device having a Dickson charge pump structure that amplifies a DC voltage to configure a power supply having a desired voltage. To this end, a plurality of unit amplifiers including a diode and a capacitor are disposed in parallel while providing a driving clock having a different phase. By configuring the outputs to charge a single output capacitor, the output capacitor is continuously charged according to different operating points of the parallel unit amplifiers connected in parallel, thereby greatly reducing the voltage caused by the load and the occurrence of ripple due to the charge / discharge operation. .

Description

Booster {CHARGE PUMP APPARATUS}

1 is a configuration diagram showing the structure of a typical Dickson booster.

Figure 2 is a circuit diagram showing the operation of the Dickson booster.

3 is a circuit diagram showing a structure of an embodiment of the present invention.

4 is a circuit diagram showing an operation of an embodiment of the present invention.

5 is a circuit diagram showing a structure of another embodiment of the present invention.

*** Explanation of symbols for main parts of drawing ***

C100: first boost capacitor C200: output capacitor

C300: second boost capacitor D100 ~ D400: routing diode

CP1 to CPN: unit boost circuit Cout: output capacitor

The present invention relates to a boosting device having a Dickson charge pump structure that amplifies a DC voltage to form a power supply having a desired voltage.

With the development of various electronic devices, low-voltage technology is being introduced to allow you to carry out more work for a longer time with a lower power supply voltage.With this low-voltage technology, basic control and signal transfer between chips are performed at low voltage. However, design methods for amplifying low-level power supply voltages where general high voltages are needed have become commonplace.

The booster that generates high voltage using low voltage power is widely used in communication equipment, measuring equipment, and control equipment, as well as multimedia related products and flat panel displays, which have recently exploded in demand. As the size increases, the size of the codec portion for demodulating it becomes larger, and the importance of the flat panel display increases.

As described above, various types of DC-DC converters for amplifying low power supply voltages to generate desired high voltage power supplies have been proposed. Among them, Dixon is one of the simple structures and easily generates high voltages at a desired level. There is a charge pump (Dickson Charge Pump) structure.

1 illustrates a conceptual structure of a boosting device using a general Dickson charge pump structure. As shown in FIG. 1, it can be seen that unit structures including a diode and a boost capacitor are connected in multiple stages. That is, when the phases of the clocks provided to the boosting capacitors of adjacent unit structures are opposite to each other (see ck1 and ck2), the voltages of the boosting capacitors C1 to CN are gradually increased while repeating charging and discharging. Amplification is performed by transferring to adjacent boost capacitors connected through ~ DN + 1), and the output capacitor (CN + 1) is charged at the final stage to transfer the outputs added by each adjacent boost capacitor to the load. Is located. In this case, the discharge voltage directions of the boost capacitors C1 to CN are fixed to the diodes D1 to DN + 1 to be connected, respectively, so that the voltage can be boosted. That is, the Dickson charge pump structure provides an increased output by the magnitude of the voltage applied to the capacitor as the unit structures of the diode and the capacitor are added, so that the desired output voltage can be easily set. In this case, the clocks provided to the capacitors C1 to CN are generally generated by switching power.

The output capacitor CN + 1 is charged with a sequentially increased voltage by the step-up capacitors C1 to CN, and the output capacitor CN + 1 is operated as a power source providing a boosted voltage. This provides power to the connected load. Therefore, the output capacitor CN + 1 should be large in capacity to sufficiently provide power consumed by the connected load, and high in withstand voltage to maintain the target high voltage.

However, when the capacity of the output capacitor CN + 1 increases, the capacity of the step-up capacitors C1 to CN charging the output capacitor CN + 1 must also increase, and the time for charging and discharging the capacitor It takes a long time. As such, when the charge / discharge time of the boost capacitors C1 to CN is long, the voltage ripple of the output capacitor CN + 1 is severely generated. In addition, capacitors with high voltage immunity and large capacities also have large amounts of chip space and board space. However, in order to prevent this, when the capacity of the boost capacitors C1 to CN and the output capacitor CN + 1 is reduced, the charge / discharge time may be reduced to reduce the ripple due to the charge / discharge, but the output capacitor CN + 1 ) Is small, so that a voltage drop occurs in which the output voltage of the output capacitor CN + 1 is abruptly reduced depending on the state of the load. The output ripple or abrupt voltage reduction can cause serious reliability problems when the load device or load circuitry requires a precise supply voltage.

As described above, an object of the embodiment of the present invention in consideration of a ripple or a voltage reduction generated when a voltage is increased to a desired output voltage by connecting a unit structure consisting of a diode and a boost capacitor is performed in a different phase. By arranging them in parallel while providing a clock to charge a single output capacitor, the output capacitor is continuously charged according to different operating points of a plurality of unit amplifiers connected in parallel to reduce voltage caused by load and ripple due to charge and discharge. It is to provide a boosting device to reduce the.

Another object of the present invention is to increase the charge and discharge rate by arranging the unit amplification unit consisting of a diode and a capacitor charging the output capacitor in parallel to reduce the size of the step-up capacitor of the unit amplification unit or increase the size of the output capacitor. Alternatively, it is possible to provide a boosting device to increase the load driving capacity of the output capacitor.

Another object of the present invention is to arrange the Dixon charge pump structure with a simple structure in parallel, thereby significantly reducing the ripple of the boosted voltage and significantly reducing the voltage drop caused by the load, thereby improving system stability when using a sensitive load circuit. It is to provide a boosting device to improve.

Another object of the embodiment of the present invention is to increase the stability of the voltage provided to the load by configuring the boost circuit implemented in the chip in parallel, so as to widen the selection range of the chip external element and to ensure the operational stability of the chip internal load It is to provide a boosting device.

Still another object of the present invention is to parallelize the unit amplification unit consisting of a diode and a capacitor charging the output capacitor in parallel to reduce the sensitivity of the final output terminal characteristics according to the step-up capacitor size of the unit amplification unit, according to the cumulative use of the boost capacitor It is to provide a boosting device that can effectively maintain the output stage characteristics even when a capacity change or a temperature change occurs.

In order to achieve the above object, a boosting device according to an embodiment of the present invention includes a plurality of diodes for determining the direction of the voltage; A boost circuit unit having one or more unit boost circuits connected in parallel, wherein two or more unit boost circuits each including a boost capacitor that is applied to the other end and is charged and discharged by the drive clock are connected to the other end; ; An output of the unit boost circuit units includes a charging capacitor that is connected and charged in common.

In addition, the present invention includes two or more boost capacitors charged and discharged by different kinds of driving clocks; A plurality of diodes configured to determine a discharge path of the boost capacitors and a supply path of an applied voltage to configure a boost path, wherein at least two boost paths are configured; And a charging capacitor in common connection with the longitudinal ends of the boost path constituted by the plurality of diodes.

Embodiments of the present invention as described above will be described in detail with reference to the accompanying drawings.

FIG. 2 is a circuit diagram illustrating the operation of a general boosting circuit constructed as part of the present invention. FIG. 2 shows a Dickson charge pump circuit providing a boosted output voltage corresponding to twice the power supply voltage VIN as shown. It shows the operation process.

As shown in the drawing, when the diodes D10 and D20 define a discharge direction of the boost capacitor C10 while providing a clock that alternates the power supply voltage VIN and the ground voltage level to one side of the boost capacitor C10. The voltage discharged by the boosting capacitor C10 is added to the power supply voltage VIN provided to the diode D10 to charge the output capacitor C20 at twice the power supply voltage VIN.

FIG. 2A illustrates a case in which a ground potential is provided to one electrode of the boost capacitor C10, and the power voltage VIN charges the boost capacitor C10 through the first diode D10. A subsequent operation cycle in which the power supply voltage VIN is provided to one electrode of the boost capacitor C10 is shown. When the voltage charged in the boost capacitor C10 is discharged, the power supply voltage provided through the first diode D1 is discharged. (VIN) is boosted to twice the size to charge the output capacitor (C20) through the second diode (D20). Thus, the potential charged to the output capacitor C20 is about 2VIN (actually slightly reduced by the threshold voltage of the diode, but this is ignored here).

That is, the ripple period of the charging waveform of the output capacitor C20 is determined by a driving voltage clock for operating the boosting capacitor C10, and the capacitance of the boosting capacitor C10 and the capacitance of the charging capacitor C20 are determined. The ripple width is determined accordingly. When the load is connected to the output capacitor C20, the charge charged in the output capacitor C20 is discharged according to the power consumption by the load, so that the voltage charged according to the discharge degree is lowered to a certain level. Voltage drop may occur. If the load requires precise power supply voltage, serious reliability problems can be caused.

Accordingly, when the structure of FIG. 2 is changed as shown in FIG. 3 showing the first embodiment of the present invention, voltage reduction and ripple caused by the above-described load can be greatly reduced. 3 shows an example of a boosting device for boosting the output voltage by twice the power supply voltage. Dixon charge pump circuits are arranged in parallel, so they are easy to configure, and the same type of diodes and capacitors can be configured for easy design and application.

Looking at the structure shown in detail, first, the first diode (D100) for providing the power supply voltage (VIN) in one direction, the cathode electrode of the first diode (D100) is connected to one side and the other side is the first power supply clock (CK10) And a voltage obtained by adding the first boosting capacitor C100 and the discharge voltage of the first boosting capacitor C100 and the power supply voltage VIN provided by the first diode D100 in one direction. The second diode D200 configures a first boost path. In addition, one side of the third diode D300 and the cathode of the third diode D300 which provide the power voltage VIN in one direction are connected in the same manner, and the other side thereof is connected by the second power clock CK20. The fourth boosting capacitor C300 and the fourth voltage which causes the voltage obtained by adding the discharge voltage of the second boosting capacitor C300 and the power supply voltage VIN provided by the third diode D300 to flow in one direction. The diode D400 configures a second boost path.

The outputs of the first boosting path and the second boosting path are connected to a charging terminal of a single (or plural) output capacitor C200 and the reference terminal of the output capacitor C200 is grounded. In the charging stage, charge by the plurality of boost paths and discharge by load connection are performed.

If the set of diodes and boost capacitors constituting each of the boost paths is called a unit boost circuit unit, two or more unit boost circuit units may be connected in parallel. The drop can be reduced, but the output quality and the number of unit boost circuits can be traded off as the volume occupied and the number of devices increase.

FIG. 4 is a circuit diagram and an operation diagram illustrating an operation of an embodiment of the present invention illustrated in FIG. 3. The power clock CK10 provided to boost capacitors C100 and C300 formed in the different boost paths as shown in FIG. , CK20) preferably has a 180 ° phase difference, that is, an opposing operation point, and the duty ratio of the clock is preferably 50%. Although the illustrated example uses twice the power supply voltage as the target output voltage, it is possible to equally adjust the magnitude of the voltage provided to the power supply clocks CK10 and CK20, or to add a device capable of adjusting voltage. Note that, since various output voltages can be determined by changing the number of diodes capable of adjusting the voltage by the threshold voltage, all of these modifications should be determined to be included in an embodiment of the present invention.

In addition, since the illustrated embodiment is configured to boost about twice as much, one boosting capacitor is configured in one boosting path, but the unit boosting circuit unit including the diode and the boosting capacitor is connected in multiple stages to supply a power supply voltage n. Multiplying circuits can also be configured in the same parallel fashion. In this case, the power clock provided to the boost capacitor included in the unit boost circuit unit connected in multiple stages in a single boost path should be provided with a different phase (preferably alternate clock connection with a 180 ° phase difference) for each of the boost boost capacitors. The boost capacitors at corresponding positions in the path should also be provided with different phases (preferably alternating connections of clocks with 180 ° phase difference).

Now, the specific operation of the embodiment shown in FIG. 4 made in parallel connection of the unit boost circuit provided with the power clocks of 180 ° phase difference will be described. Since the case has opposite phase differences, the operation may be divided into two sections.

First, FIG. 4A illustrates that a ground potential is connected to a first boosting capacitor C100 on a first boosting path configured at a lower end thereof, and a corresponding boosting capacitor C100 is being charged, and a second boosting capacitor on the second boosting path configured at the upper end of FIG. When the power supply potential VIN is connected to the C300 and the corresponding boosting capacitor C300 is being discharged, the first boosting path does not charge the output capacitor C200, but the second boosting capacitor of the second boosting path is discharged. C300 charges the output capacitor C200.

4B, when the power supply potential VIN is connected to the first boosting capacitor C100 on the first boosting path configured at the lower end thereof, the corresponding boosting capacitor C100 is discharged to discharge the output capacitor C200. The battery is charged with the boosted voltage. At this time, a ground potential is connected to the second boost capacitor C300 on the second boost path configured at the upper end to charge the boost capacitor C300. 4A and 4B alternately, the charging capacitor C200 is always charged in all operation sections, thereby significantly reducing the width of the output ripple and applying a sufficient charging voltage to the load. The width of the voltage drop caused by this is also greatly reduced.

The capacitance of the charging capacitor C200 should be larger than that of the boost capacitors C100 and C300, and the capacitance of the boost capacitors C100 and C300 is the same. However, it should be noted that the capacities may be changed without being limited depending on the type, size, and circumstances of the load.

The capacity of the boost capacitors C100 and C300 used in the above-described configuration becomes wider than the boost capacitors on the single boost path constituting the general Dickson charge pump.

That is, even when the capacity of the boost capacitors C100 and C300 is slightly smaller than those of the boost capacitors forming a general Dickson charge pump, the output capacitor C200 is charged once in one operation cycle. The amount of charge charged in is increased compared to the general Dickson charge pump structure to prevent voltage drop, and the charging and discharging time of the boost capacitors C100 and C300 is reduced by a smaller capacity, thereby greatly reducing ripple. .

Even if the capacity of the boosting capacitors C100 and C300 is somewhat larger than that of the booster capacitors forming a general Dickson charge pump, the charge / discharge time may be longer because the charge / discharge time is slightly increased. Since C200 continues to charge through a different boost path every half cycle, the output ripple remains reduced compared to a general Dickson charge pump structure, and the amount of charge that charges the output capacitor C200 increases further by an increased capacity to the load. It is possible to further reduce the voltage drop width.

Thus, the Dixon charge pump structure having a single boost path structure has a sensitive output (depending on variations in boost capacitors) depending on the capacity of the boost capacitor to be connected, but the parallel boost path structure described above. Since it is insensitive to the capacity of the boost capacitor, it is easy to design and mass-produce, and the reliability is improved even when the capacity change of the capacitor and the capacity change due to the temperature variation occur.

The boost circuit described above is often configured inside a chip in which a load requiring a boosted voltage is implemented. In this case, only a portion corresponding to a diode is integrated in the chip, and the capacitors are peripheral devices outside the chip. It is generally configured as Therefore, since only the diodes of the same standard need to be configured inside the chip, the design difficulty does not increase due to the design change, and the area of the chip occupied by the diodes is also relatively small, so that the present invention can be applied to the chip without difficulty. And, in the case of capacitors mounted outside the chip, it can be freely selected in a relatively wide range by the above-described characteristics, and in particular, the characteristics of the boosted output by arbitrarily determining the capacity of the boosting capacitors according to the type of load It can be adjusted.

FIG. 5 illustrates a structure of another embodiment of the present invention, in which a unit boost circuit unit CPN configured to obtain twice the power supply voltage VIN includes a plurality of diodes DDNa and DDNb and a boost capacitor CCN. After connecting N in parallel and connecting their outputs with output capacitors (Cout) to charge the capacitors to prevent ripples and voltage drops in the output voltage.

In this case, the driving voltage clocks CKa and CKb provided to the respective boosting capacitors CC1 to CCN of the adjacent unit boosting circuit units CP1 to CPN are different from each other and preferably have a 180 ° phase difference. In addition, in the case of configuring a unit boost circuit unit using a plurality of boost capacitors and diodes, it is preferable for design convenience that the driving voltage clocks provided to adjacent boost capacitors also have a phase difference of 180 ° from each other. However, for example, if three unit boost circuit units CP1 to CPN are configured, each driving voltage clock has a difference of 120 °, and the duty ratio of each driving clock is 1/3. The output capacitor can also be charged in stages.

The high potential level of the driving voltage clocks CKa and CKb and the power supply voltage VIN provided to the unit boost circuit parts CP1 to CPN are preferably the same level, but may be different. It is preferable for the ripple free charging that the CKa and CKb have the same frequency and level as each other.

In addition, since the output capacitor Cout is charged in all operating cycles by the driving clocks CKa and CKb having different phases, the unit boosts the unit even when a load is connected and the power charged in the output capacitor Cout is discharged. Since at least one of the circuit parts CP1 to CPN is in a charged state, the width of the ripple or the voltage drop is greatly reduced.

As described above, the boosting device according to the exemplary embodiment of the present invention arranges a plurality of unit amplifiers including a diode and a capacitor in parallel while providing driving clocks of different phases so that the outputs charge a single output capacitor in a different operation period. In this configuration, the output capacitor is charged in all operation sections due to different operation time points of the parallel unit amplifiers, thereby greatly reducing the voltage caused by the load and the occurrence of ripple due to the charge / discharge operation.

In addition, the boosting apparatus according to the embodiment of the present invention may reduce the size of the boosting capacitor or increase the size of the output capacitor by arranging unit amplifiers including a diode and a capacitor charging the output capacitor in parallel. Increasing the discharge rate or arbitrarily adjusting the load driving capacity of the output capacitor has the effect of effectively implementing the load driving.

In addition, the boosting device according to an embodiment of the present invention by placing the Dixon charge pump structure having a simple structure in parallel, significantly reducing the ripple of the boosted voltage and also dramatically reduces the voltage drop caused by the load to reduce the load-sensitive load circuit When used, there is an effect that can greatly improve the system stability and reliability.

In addition, the boosting device according to an embodiment of the present invention by integrating a partial structure of the booster circuit in a parallel configuration inside the chip implemented the load, and by selecting the external device in accordance with the type and operating environment of the load by In addition, it has the effect of widening the selection range of the boost and output capacitors and ensuring the operational stability of the internal load of the chip.

In addition, the boosting device according to the embodiment of the present invention by arranging a unit amplification unit consisting of a diode and a capacitor charging the output capacitor in parallel to reduce the sensitivity of the final output terminal characteristics according to the step-up capacitor size of the unit amplifier, Even if the capacity change due to cumulative use or the capacity change due to temperature occurs, the output stage characteristics can be effectively maintained.

Claims (11)

A plurality of diodes for determining the direction of the voltage; A boost circuit unit having one or more unit boost circuits connected in parallel, wherein two or more unit boost circuits each including a boost capacitor that is applied to the other end and is charged and discharged by the drive clock are connected to the other end; ; And a charging capacitor configured to charge the output of the unit boost circuit units in common. The boosting device of claim 1, wherein the driving clock provided to the boosting capacitor of the unit boosting circuit unit is the same voltage as that provided to the diode. The boosting device according to claim 1, wherein the driving clock provided to the boosting capacitor of the unit boosting circuit unit is two or more of the same voltage clocks having different phases. 4. The boosting device according to claim 3, wherein the driving clock uses only two types of clocks whose phases are different by 180 degrees and whose duty ratio is 50%. The boosting device of claim 1, wherein the unit boosting circuit unit uses a capacitor having the same capacitance and has a capacitance less than or equal to the charging capacitor. The method of claim 1, wherein the diode of the unit boost circuit portion is configured in the chip is located inside the load that operates the output of the charging capacitor as a power source, characterized in that the boost capacitor and the charging capacitor is configured outside the chip. Boosting device. The boosting device of claim 1, wherein the unit booster circuit unit and the charging capacitor have a Dickson charge pump structure. Two or more boost capacitors charged and discharged by different kinds of driving clocks; A plurality of diodes configured to determine a discharge path of the boost capacitors and a supply path of an applied voltage to configure a boost path, wherein at least two boost paths are configured; And a charging capacitor connected in common with the ends of the boosting path constituted by the plurality of diodes. 9. The boosting device according to claim 8, wherein the configuration of the boosting capacitor and the diodes configured on the individual boosting path is a Dickson charge pump structure. The boosting capacitor of claim 8, wherein the driving clock provided to the boosting capacitors formed on the boosting path has a 180 ° phase difference from the driving clock provided to adjacent boosting capacitors, and the boosting capacitor is disposed at the same position on the different boosting path. Booster, characterized in that the driving clock is 180 degrees out of phase with each other. The boosting device of claim 8, wherein the charging capacitor is continuously charged in every operating cycle.

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