KR100746563B1 - Dynamic Linearization Digital-to-Analog Converter - Google Patents

Abstract

The present invention relates to a digital-to-analog converter for converting a digital signal into an analog signal. The digital-to-analog converter of the present invention is located between a decoder for selecting a current source from a digital input, a current switch driver for driving a current switch of the current source, and between the decoder and the current switch driver, and the output and current switch driver of the decoder every clock. It includes a random selection switch for arbitrarily resetting the connection of the input of the. According to the present invention, the linearity of the digital-to-analog converter can be improved by compensating for the nonlinearity of the digital-to-analog converter according to the spatial arrangement of the current sources on average by changing the current sources selected for each clock signal.

Digital-to-Analog Converter, DAC

Description

Dynamic Linearization Digital-to-Analog Converter

1 is a block diagram schematically showing the structure of a general current-driven digital-to-analog converter.

2 is a block diagram illustrating the basic structure of a dynamic linearized digital-to-analog converter of a new structure according to an embodiment of the present invention.

FIG. 3 is a block diagram illustrating a structure of a digital-analog converter in which a unit current source is divided into several groups and dynamic dynamic linearization is applied to each unit current source group according to an embodiment of the present invention.

4 is a block diagram illustrating a structure of a digital-to-analog converter in which a unit current source is divided into several groups and a dynamic linearization method is applied in each group according to an embodiment of the present invention.

5 is a block diagram illustrating a digital-to-analog converter structure of a segmented structure to which a dynamic linearization scheme according to the present invention is applied.

<Explanation of symbols for the main parts of the drawings>

11: Digital signal input buffer

12: decoder

13: Random selection switch

14: current switch driver

15: current source

The present invention relates to a digital-to-analog converter that can averagely compensate for the nonlinearity of the converter according to the spatial arrangement of the current sources.

Recently, with the development of digital signal processing technology, a signal processing method of converting a portion previously processed into an analog signal into a digital signal, processing the same, and converting the same into an analog signal has been widely used. In addition, the amount of processed data in various wired and wireless communication systems to which the signal processing method is applied is also increasing. Therefore, the amount of data required to convert a digital signal to an analog signal is increasing, and therefore, there is a demand for a digital-analog converter having improved performance, high speed, and high resolution. Current-driven digital-to-analog converters are known to be the most suitable for high speed and high resolution signal conversion.

Until now, the current-driven digital-to-analog converter has a digital signal input buffer (1) for receiving an N-bit digital input signal as shown in FIG. 1, a decoder (2) required according to the structure, and a current switch for driving an output current. It consists of a driver 3 and a current source 4 composed of an array of unit current sources that produce an output current. Here, the current-driven digital-analog converters of various structures such as binary-weighted structure, unary-weighted structure, and segmented structure can be configured according to the configuration of the current source 4, and each digital-to-analog converter can be configured according to these structures. The circuit complexity and performance also vary.

Static performance, the most basic and important characteristic of the current-driven digital-to-analog converter, is determined by the arrangement of unit current sources inside the current source. The reason why the static characteristics of the current-driven digital-to-analog converter changes according to the arrangement of the unit current sources inside the current source is as follows. In the actual chip, even if the same device is implemented in the chip due to the fabrication process and various causes, the characteristics of the devices vary slightly according to their spatial location. Therefore, current-driven digital-to-analog converters using the same current sources are limited in their static characteristics due to mismatches in the characteristics of the current sources after fabrication.

Mismatch characteristics of the devices implemented inside the chip have been analyzed through many studies until now, and various methods have been proposed such as sizing current sources and spatially arranging current sources to reduce the mismatch characteristics described above. Using these methods, the static characteristics of the digital-to-analog converter have been greatly improved.

However, there are limits to the improvement of the static characteristics even if many methods are applied to reduce the mismatch of current sources. Recently, due to the development of broadband signal processing systems, the performance improvement of the dynamic characteristics as well as the static characteristics of the digital-to-analog converter has become very important.

SUMMARY OF THE INVENTION The present invention has been derived to overcome the technical limitations of the prior art, and an object of the present invention is to propose a method for dynamically compensating for mismatches between devices simultaneously with the operation of a digital-to-analog converter, and using this method, dynamic linearity It is to provide a new structure of digital-to-analog converter that can be increased.

According to an aspect of the present invention to achieve the above object, a decoder for selecting a current source from the digital input, a current switch driver for driving the current switch of the current source, and located between the decoder and the current switch driver and decoder every clock A current-driven digital-to-analog converter is provided that includes a random switch for arbitrarily resetting the connection between the output of the input and the input of the current switch driver.

According to another aspect of the present invention, it may be configured as a digital-to-analog converter including a random selection switch for arbitrarily resetting the output of the unit element for selecting the output from the digital input in accordance with a reference signal, such as a clock signal. In this case, the digital-analog converter includes all digital-analog converters other than the current drive method.

According to the present invention, the static characteristics determined by the spatial arrangement of the unit current sources and the mismatch between the unit current sources generated by the current-driven digital-analog converter are applied to each clock signal simultaneously with the operation of the digital-analog converter. By arbitrarily changing the selected unit current sources, a novel current-driven digital-analog converter structure that dynamically compensates for mismatches of unit current sources and increases dynamic linearity can be provided.

Hereinafter, exemplary embodiments of the present invention will be described in detail with reference to the accompanying drawings. The following examples are provided to fully understand the present invention for those skilled in the art.

2 is a block diagram illustrating the basic structure of a dynamic linearized digital-to-analog converter of a new structure according to an embodiment of the present invention.

As shown in Fig. 2, the current-driven digital-analog converter according to the present invention is constructed by adding a random selection switch 13 block between the decoder 12 and the current switch driver 14 block.

The decoder 12 receives an N-bit digital input signal and selects a current source from the received digital input signal. In this case, a digital signal input buffer 11 may be installed at the front of the decoder 12 to efficiently receive the N-bit digital input signal.

The current switch driver 14 receives the digital input signal from the decoder 12 and drives the current switch of the current source.

The random selection switch 13 is positioned between the decoder 12 and the current switch driver 14 and randomly resets the output of the decoder 12 and the input of the current switch driver 14 every clock. The above-described random selection switch 13 is preferably implemented in a random selection switch array.

In the current-driven digital-to-analog converter proposed in the present invention, there is a random switch array block between the decoder and the current switch driver blocks so that the connection between the output of the decoder and the input of the current switch driver is changed randomly every clock. do. By arbitrarily selecting a unit current source selected for each clock, the frequency at which each unit current source is selected can be made equal on average, thereby eliminating the influence of mismatches due to the spatial arrangement of each unit current source, and digital-to-analog converter. It can increase the dynamic linearity of.

As such, in the present invention, the unit current source selected for a specific digital input is not fixed and changes every moment, and the change is made in a direction to cancel mismatch between the unit current sources. The digital-to-analog converter with high dynamic linearity can be implemented by canceling mismatches.

On the other hand, in the digital-to-analog converter of the present embodiment, the added random switch array has the same number of outputs as M inputs. Depending on the structure of the digital-to-analog converter, the number of inputs and outputs of this block increases, so The configuration for arbitrarily changing the connection relationship between input and output signals can be very complicated.

Three configuration examples of the present invention in which the connection relationship between the input and output signals are arbitrarily changed for each input and output will be described with reference to FIGS. 3 to 5.

FIG. 3 is a block diagram illustrating a structure of a digital-analog converter in which a unit current source is divided into several groups and dynamic dynamic linearization is applied to each unit current source group according to an embodiment of the present invention.

As shown in Fig. 3, the digital-analog converter according to the present embodiment has a decoder 12, a random selection switch 13, and a current switch driver having a plurality of unit current switch drivers CSD1, CSD2, ..., CSD_k. (14), and a current source 15 having a plurality of unit current sources CS_1, CS_2, ..., CS_k of the same size.

The digital-to-analog converter according to the present embodiment divides the arrangement of unit current sources into several unit current source groups that can compensate each other's characteristics, and arbitrarily selects several unit current source groups to spatially arrange the unit current source groups. Has a structure to dynamically remove the effects of mismatch.

The operation of the digital-to-analog converter according to the present embodiment with respect to the above-described structure is as follows. The input N-bit digital input signal is transmitted to the decoder 12 through the digital signal input buffer 11, the decoder 12 selects a unit current source from the digital signal input, and the output of the decoder 12 is a current switch. It is delivered to the driver 14. At this time, the output of the decoder 12 is a plurality of M / K bit signal grouped by a plurality of unit current source is randomly reset for each group by the random selection switch 13 and then corresponding units in the current switch driver 14 The current switch drivers 14a, 14b, ..., 14k are delivered to each unit, and each unit current switch driver drives the current switches of the corresponding unit current sources 15a, 15b, ..., 15k based on the transmitted signals. By the above operation, the digital-analog converter outputs current data with improved dynamic linearity.

 According to the above configuration, the unit current sources grouped in one group are arbitrarily changed and connected in accordance with every clock signal for the converter operation in the random selection switch 13 to connect the unit current sources in the spatial arrangement of the existing digital-analog converter. Offset mismatch That is, mismatch between each unit current source group can be minimized.

4 is a block diagram illustrating a structure of a digital-to-analog converter in which a unit current source is divided into several groups and a dynamic linearization method is applied in each group according to an embodiment of the present invention.

As shown in Fig. 4, the digital-to-analog converter according to the present embodiment includes a decoder 12, an arbitrary selection switch 13 having a plurality of unit arbitrary selection switches RSSW_1, RSSW_2, ..., RSSW_k, and a plurality of units. And a current switch driver 14 having current switch drivers CSD1, CSD2, ..., CSD_k, and a current source 15 having a plurality of unit current sources CS_1, CS_2, ..., CS_k.

The digital-to-analog converter according to the present embodiment divides the unit current sources into several groups and dynamically removes the influence of mismatches due to the spatial arrangement of the individual unit current sources within each unit group. This structure is made clear by the description of the operation below.

The operation of the digital-to-analog converter according to the present embodiment is as follows. The N-bit digital input signal input to the digital-analog converter is transmitted to the decoder 12 through the digital signal input buffer 11, the decoder 12 selects a unit current source from the digital signal input, and the decoder 12 Is output to the current switch driver 14 side. At this time, the output of the decoder 12 transmits a plurality of M / K bit signals in which a plurality of unit current sources are grouped to the corresponding unit random selection switches 13a, 13b, ..., 13k in the random selection switch 13. . Each unit random selection switch 13a, 13b, ..., 13k randomly resets the unit current sources in each group and then corresponds to the corresponding plurality of unit current switch drivers 14a, 14b, ..., in the current switch driver 14. 14k). Each unit current switch driver 14a, 14b, ..., 14k drives the current switch of each corresponding unit current source 15a, 15b, ..., 15k based on the transmitted signal. By the above operation, the digital-analog converter outputs current data with improved dynamic linearity.

According to the above-described configuration, mismatches due to spatial arrangement between unit current sources in each unit current source group are canceled, whereby mismatch in each unit current source group can be minimized.

The method of increasing the linearity of the digital-to-analog converter by dynamically compensating for the limitation of static characteristics in the digital-to-analog converter proposed up to now can be applied to various digital-to-analog converter structures. As an example, FIG. 5 shows a configuration in which the dynamic linearization method proposed so far is applied to a current-driven digital-analog converter having a segmented structure.

5 is a block diagram illustrating a digital-to-analog converter structure of a segmented structure to which a dynamic linearization scheme according to the present invention is applied.

As shown in FIG. 5, the digital-to-analog converter of the present embodiment receives an N-bit digital input signal and outputs the digital signal input buffer 21 and the MSB to two groups of MSB A-bit and LSB (NA) -bit. A decoder 22 for selecting a current source from an A-bit digital signal, a delay synchronization buffer 23 for selecting a current source from an LSB (NA) -bit digital signal, and an output for arbitrarily resetting the output of the decoder 22. 1 receives the output of the decoder 22 arbitrarily reset by the random selection switch 24, the second random selection switch 25 for arbitrarily resetting the output of the delay synchronization buffer 23, and the first random selection switch 24. The first current switch driver 26 for driving the current switch of the first current source 28 selected in advance, and the output of the delay synchronization buffer 23 arbitrarily reset by the second random selection switch 25 2nd electric pole which drives current switch of current source 29 A switch driver (27).

One of the features of the digital-to-analog converter of the present embodiment is the first and second random select switches 26 and 27 for dynamic linearization of the MSB and LSB of the input N-bit digital input signal, respectively. The switches 26 and 27 can be configured by appropriately selecting among the methods proposed above according to the structure of the MSB portion and the LSB portion.

The present invention is not limited to the above-described embodiments and the accompanying drawings, and various substitutions, modifications, and changes within the scope not departing from the technical spirit of the present invention are common knowledge in the art. It will be clear to those who have it.

As described above, the digital-to-analog converter of the new structure employing the dynamic linearization scheme proposed by the present invention dynamically compensates for the inferior linearity due to mismatch due to the spatial arrangement of unit current sources, compared to the conventional digital-analog converter. Compared to the current-driven digital-to-analog converter, it is possible to easily implement a digital-to-analog converter having a high dynamic linearity, particularly a current-driven digital-to-analog converter.

Claims (5)

A decoder for selecting a current source from a digital input; A current switch driver for driving a current switch of the current source; And And a selection switch located between the decoder and the current switch driver and randomly resetting a connection between the output of the decoder and the input of the current switch driver every clock. The apparatus of claim 1, wherein the random selection switch is output from the decoder and is divided into a plurality of unit current source groups, and each unit current source group of the array of unit current sources constituting the current source is randomized to the current switch driver input every clock. Digital to analog converter, characterized in that the selection. The current switch of claim 1, wherein the random selection switch is output from the decoder and is divided into a plurality of unit current source groups, and each unit current source in each unit current source group of the array of unit current sources constituting the current source is switched at every clock. A digital-to-analog converter characterized by random selection with driver input. A unit element for selecting an output from the digital input; And And a selection switch for resetting the output of the unit element in accordance with a clock signal during operation of the device. The method of claim 4, further comprising a current switch driver for receiving the output of the unit element to drive the current switch of the current source, And the current source has a segment structure.

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