KR100733509B1 - A method of improving anti-static electricity using ito circuit design - Google Patents

Abstract

An antistatic improvement method using a kind of ITO line design will be used to increase the antistatic power of the LCM. There is no need to add any accessories and it is different from the previous antistatic design philosophy. In the past, anti-static designs inside ICs sometimes did not reach the required targets, and static electricity was not effectively mitigated. However, the LCD line design according to the present invention can effectively increase the antistatic power by changing the connection method of the ITO pin. In this way, the LCD is placed on a special line in the ITO line design, and then again conformed to the ITO resistance design to increase the ESD protection.

Static electricity, IC, line, ITO, LCD

Description

Improved antistatic method using ITIO circuit design {A METHOD OF IMPROVING ANTI-STATIC ELECTRICITY USING ITO CIRCUIT DESIGN}

1 is a RC circuit diagram of the principle of the antistatic improvement method using the ITO circuit design according to the present invention.

2 is a graph showing a change in current over time of the antistatic improvement method using the ITO circuit design.

3 is a commercial line design diagram of the antistatic improvement method using the ITO line design.

4 is a circuit design diagram according to the antistatic improvement method using the ITO circuit design.

5 is a comparative table showing the test results of the antistatic improvement method using the ITO circuit design.

The present invention relates to an improved corrector prevention method using an indium tin oxide (ITO) circuit design, and in particular, liquid crystal display (LCD) is arranged as a special circuit when designing an ITO circuit and corresponds to the ITO resistance design again. To increase the antistatic function, and to reduce the cost of the manufacturing process and additional materials.

Conventional antistatic methods employ a method of imparting capacitance on glass or mounting constant-permeable components. This drawback is very difficult to fabricate, and when bonding components to the device, the glass breaks easily and COG (Chip On Glass) requires space for wiring, which leads to a lack of design space. There are disadvantages.

Another antistatic method is the design method to prevent static electricity in the FPC (Flexible Printed Circuit Board). However, static electricity is not transferred to the FPC but is likely to be transferred into the IC through the glass's ITO.

As such, the conventional antistatic method has many drawbacks and needs improvement.

Accordingly, the inventors of the present invention have been aware of the drawbacks derived from the conventional antistatic method, and have studied for many years to develop an improved antistatic method using ITO circuit design.

The object of the present invention is to provide an improved method for preventing static electricity through a simpler design by using ITO circuit design in a space for installing a conventional IC, thereby reducing the static electricity of the liquid crystal display module (LCM). It is to increase. In other words, it is necessary to arrange the LCD as a special line during ITO line design and to mix it with the ITO resistance design so that the LCD line design can be effectively changed to prevent static electricity from flowing into the IC. have.

An improved antistatic method using the ITO circuit design to achieve the above object is to increase the antistatic capability of the IC on the glass, the characteristic of which is in the ITO circuit where the IC and glass contact. This circuit design is a kind of special area distribution function that applies the bottom part of the IC and connects the ITO line to VSS around the glass to effectively alleviate and dissipate static electricity entering the IC through the special ITO coating design.

An improved method for preventing static electricity using the ITO circuit design
1) Place the ITO line width on the backside glass of the IC in contact with the IC without affecting the line of the other pin, and 2) the ITO line VSS), 3) the impedance of 1MΩ to 1.5MΩ to the IC (IC) reset pin, and 4) the VSS pins of the IC (IC) are connected to each other.

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Example

Referring to Figure 1, the RC circuit diagram of the antistatic improvement method using the ITO circuit design is shown, which demonstrates that the antistatic effect can be achieved using the ITO circuit design. Here, assuming that the COG module is an RC series connection circuit, the time t is zero, and the switch S is closed, the DC voltage E passes through current and charge q during electrostatic discharge, and R Is the ITO impedance and C is equal to the COG capacitance value.

Based on the differential equation, we can write The equation of the circuit is as follows.

. . . (1)

. . . (One)

The relationship between current and charge uses i = dq / dt.

. . . (2)

. . . (2)

Equation (2) is equal to E = 0 and if the solution of the differential equation (transient solution) q ₁

Let A ₁ be a non-integral constant.

Since the static solution q _s has passed a long enough time, since the capacitance accumulates charge

. . . (4)

. . . (4)

Therefore, general q is defined as follows.

. . . (5)

. . . (5)

The first condition t = 0 is equivalent to using q = 0 to find the integral constant A ₂ .

. . . (6)

. . . (6)

Therefore, the charge q and the current i are defined as follows.

. . . (7)

. . . (7)

. . . (8)

. . . (8)

The current is defined as the derivative of time.

. . . (9)

. . . (9)

Therefore, when the ITO impedance R increases, the absolute value of the tangential slope with respect to the time of current decreases at the same time, the current dissipation time increases, and the discharge rate becomes slow. In an actual method, the ITO line width of IC (IC) back side glass is arrange | positioned in the range which does not affect another pin line. The ITO line is connected to a VSS and an impedance of 1 MΩ to 1.5 MΩ is connected to the IC control pin. The VSS can then be wrapped in the interface to achieve antistatic efficacy.

Figure 2 is a graph showing the curve of the current and time of the principle of the antistatic improvement method using the ITO circuit design. This graph shows the relationship between current dissipation and time in the theory.

3 is a schematic diagram of a commercial IC internal wiring diagram of an antistatic method using an ITO circuit design. Here, the WD-G0803V uses silicon to make an IC, the ST7565S, which is a negative drive IC. All of the VSS terminal lines are connected together in the ITO line system in the IC internal line.

4 is a circuit diagram of an antistatic improvement method using an ITO circuit design.
In addition to the line design method as shown in FIG. 3, the ITO line may be increased in width to surround the IC, and VSS pins of IC may be connected to each other. In this case, the antistatic effect can be increased during the static test.

5 is a test result of the antistatic improvement method using the ITO circuit design. Based on the results of air discharge (KV) and contact (KV) tests made on mobile phones using commercial IC line design methods and ITO line design methods, the difference in the power failure prevention capability between commercial IC line design methods and ITO line design methods is compared. It can be clearly seen.

The antistatic improvement method using the ITO circuit design provided by the present invention has the following advantages when compared with other commercial technologies.

The antistatic improvement method using the ITO line design according to the present invention can reduce the principal of design and manufacture compared to a general antistatic module only by changing the ITO which is the line system inside the LCD.

Eliminating the need for external components can reduce the impact and capital gains from additional components.

The manufacturing process is simple and the structure can be made simpler.

The above detailed description is not intended to limit the scope of the present invention as a detailed description of the embodiments that can be carried out by the present invention, and the technical spirit of the present invention is not limited to the technical spirit of the present invention unless it departs from the use or modification of equivalent effects indicated by the spirit of the present invention. It is included.

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Claims (14)

In the anti-static improvement method using ITO line design, 1) IIT line width is placed on the IC back glass in contact with IC so as not to affect other pin lines. 3) connect the ITO line to the VSS, 3) connect an impedance of 1MΩ to 1.5MΩ to the IC control pin, and 4) the IC. An improved anti-static method using the ITIO line design, characterized in that the VSS pins are connected to each other. delete delete delete delete delete delete delete delete delete delete delete delete delete

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