KR100729461B1 - An equipment for restraining the inner resistance of the secondary battery - Google Patents

An equipment for restraining the inner resistance of the secondary battery Download PDF

Info

Publication number
KR100729461B1
KR100729461B1 KR1020050094064A KR20050094064A KR100729461B1 KR 100729461 B1 KR100729461 B1 KR 100729461B1 KR 1020050094064 A KR1020050094064 A KR 1020050094064A KR 20050094064 A KR20050094064 A KR 20050094064A KR 100729461 B1 KR100729461 B1 KR 100729461B1
Authority
KR
South Korea
Prior art keywords
secondary battery
pwm
transistor
generator
internal resistance
Prior art date
Application number
KR1020050094064A
Other languages
Korean (ko)
Other versions
KR20070038783A (en
Inventor
신춘식
Original Assignee
주식회사 누리칸
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by 주식회사 누리칸 filed Critical 주식회사 누리칸
Priority to KR1020050094064A priority Critical patent/KR100729461B1/en
Publication of KR20070038783A publication Critical patent/KR20070038783A/en
Application granted granted Critical
Publication of KR100729461B1 publication Critical patent/KR100729461B1/en

Links

Images

Classifications

    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01MPROCESSES OR MEANS, e.g. BATTERIES, FOR THE DIRECT CONVERSION OF CHEMICAL ENERGY INTO ELECTRICAL ENERGY
    • H01M10/00Secondary cells; Manufacture thereof
    • H01M10/42Methods or arrangements for servicing or maintenance of secondary cells or secondary half-cells
    • H01M10/4242Regeneration of electrolyte or reactants
    • HELECTRICITY
    • H02GENERATION; CONVERSION OR DISTRIBUTION OF ELECTRIC POWER
    • H02JCIRCUIT ARRANGEMENTS OR SYSTEMS FOR SUPPLYING OR DISTRIBUTING ELECTRIC POWER; SYSTEMS FOR STORING ELECTRIC ENERGY
    • H02J7/00Circuit arrangements for charging or depolarising batteries or for supplying loads from batteries
    • H02J7/007Regulation of charging or discharging current or voltage
    • H02J7/00711Regulation of charging or discharging current or voltage with introduction of pulses during the charging process
    • YGENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y02TECHNOLOGIES OR APPLICATIONS FOR MITIGATION OR ADAPTATION AGAINST CLIMATE CHANGE
    • Y02EREDUCTION OF GREENHOUSE GAS [GHG] EMISSIONS, RELATED TO ENERGY GENERATION, TRANSMISSION OR DISTRIBUTION
    • Y02E60/00Enabling technologies; Technologies with a potential or indirect contribution to GHG emissions mitigation
    • Y02E60/10Energy storage using batteries

Landscapes

  • Engineering & Computer Science (AREA)
  • Power Engineering (AREA)
  • Manufacturing & Machinery (AREA)
  • Chemical & Material Sciences (AREA)
  • Chemical Kinetics & Catalysis (AREA)
  • Electrochemistry (AREA)
  • General Chemical & Material Sciences (AREA)
  • Charge And Discharge Circuits For Batteries Or The Like (AREA)
  • Secondary Cells (AREA)

Abstract

본 발명은 2차전지의 내부저항을 억제시키고, 사용 도중에 증가된 내부저항을 감소시키는 장치에 관한 것으로서, 2차전지의 전원을 구동전압으로 변환하는 정전압회로부; 주파수에 따른 펄스폭을 가변시키는 PWM발생기; PWM 펄스 신호를 인가받아서 스위치의 온/오프 동작에 따라 2차전지에 에너지를 공급하는 직류펄스 발생부를 구성함으로써, 2차전지의 충전 효율 증대 및 수명 연장과 성능을 개선시키는 효과가 있다.The present invention relates to a device for suppressing the internal resistance of a secondary battery and reducing the increased internal resistance during use, comprising: a constant voltage circuit unit for converting a power source of a secondary battery into a driving voltage; PWM generator for changing the pulse width according to the frequency; By applying a PWM pulse signal to configure a DC pulse generator for supplying energy to the secondary battery in accordance with the on / off operation of the switch, there is an effect to increase the charging efficiency of the secondary battery, extend the life and improve the performance.

2차전지, 내부저항, PWM 펄스 신호, 정펄스 전류 Secondary battery, internal resistance, PWM pulse signal, constant pulse current  

Description

2차전지 내부저항 억제 장치{An equipment for restraining the inner resistance of the secondary battery}Secondary battery internal resistance suppression device {An equipment for restraining the inner resistance of the secondary battery}

도1은 본 발명의 실시 예에 따른 회로 구성도이다.1 is a circuit diagram according to an embodiment of the present invention.

* 도면의 주요부분에 대한 부호의 설명 *Explanation of symbols on the main parts of the drawings

1 : 2차전지2 : PWM 발생기1: secondary battery 2: PWM generator

3 : 직류펄스 발생부4 : 정전압회로부3: DC pulse generating unit 4: constant voltage circuit unit

본 발명은 2차전지의 내부저항 증가를 억제하여 2차전지의 성능 향상 및 수명 연장 장치에 관한 것으로서, 특히 직류 펄스 전류를 2차전지에 인가함으로서 2차전지의 내부저항을 억제하거나 증가된 내부저항을 감소시켜 2차전지의 성능을 향상시키는 장치에 관한 것이다.The present invention relates to a device for improving the performance and life span of a secondary battery by suppressing an increase in the internal resistance of the secondary battery. In particular, the internal resistance of the secondary battery is suppressed or increased by applying a DC pulse current to the secondary battery. A device for improving the performance of a secondary battery by reducing the resistance.

2차전지는 화학에너지를 전기에너지로 변환시켜 직류 전원을 공급한다. 방전시에는 화학반응에 의해서 전극판에 결정화 현상이 발생함으로서 내부저항이 증가하고, 반대로 충전시에는 방전전의 상태로 복구함으로서 내부저항이 감소하게 된다.The secondary battery supplies DC power by converting chemical energy into electrical energy. During discharge, the crystallization phenomenon occurs on the electrode plate due to a chemical reaction, thereby increasing the internal resistance, and conversely, during charging, the internal resistance decreases by restoring to the state before discharge.

그러나, 오랜 기간 동안 충방전을 계속하면 방전시에 전극판에 결정화된 화학물질이 초기의 상태로 복구되지 않음으로서 2차전지의 내부저항은 계속 증가하게 된다. 이 경우 전극판이 부식되거나, 내부저항의 증가로 인하여 결국 2차전지는 폐기된다.However, if the charge and discharge is continued for a long time, the internal resistance of the secondary battery continues to increase because the chemical crystallized in the electrode plate is not restored to the initial state at the time of discharge. In this case, the electrode plate is corroded or the secondary battery is eventually discarded due to an increase in internal resistance.

본 발명이 이루고자 하는 기술적 과제는 2차전지의 내부저항 증가를 억제하여 2차전지의 충전 효율 증대 및 수명 연장과 성능 향상 장치를 제공하는데 있다.The technical problem to be achieved by the present invention is to suppress the increase in the internal resistance of the secondary battery to provide an apparatus for increasing the charging efficiency of the secondary battery and extending the life and performance.

본 발명은 2차전지의 내부저항을 억제시키고, 사용 도중에 증가된 내부저항을 감소시키는 장치에 있어서, 2차전지의 전원을 구동전압으로 변환하는 정전압회로부; 주파수에 따른 펄스폭을 가변시키는 PWM발생기; PWM 펄스 신호를 인가받아서 스위치의 온/오프 동작에 따라 2차전지에 에너지를 공급하는 직류펄스 발생부;로 구성되는 것을 특징으로 하는 2차전지의 충전 효율 증대 및 수명 연장과 성능 향상 장치를 제공한다.The present invention provides a device for suppressing internal resistance of a secondary battery and reducing an increased internal resistance during use, the apparatus comprising: a constant voltage circuit unit for converting a power source of a secondary battery into a driving voltage; PWM generator for changing the pulse width according to the frequency; DC pulse generating unit for supplying energy to the secondary battery according to the on / off operation of the switch by receiving a PWM pulse signal; providing a device for increasing the charging efficiency and life extension and performance improvement of the secondary battery do.

이하 본 발명을 첨부된 도면을 참조하여 더욱 상세히 설명하면 다음과 같다.Hereinafter, the present invention will be described in more detail with reference to the accompanying drawings.

도1은 본 발명의 실시 예에 따른 회로구성도이다. 도1을 참조하면, 도면에서 2차전지(1)에 연결되는 직류펄스 발생부(3)와, 상기 직류펄스 발생부에 연결되는 PWM발생기(2)와, PWM발생기에 전원을 공급하는 정전압회로부(4)로 구성된다.1 is a circuit diagram according to an embodiment of the present invention. Referring to FIG. 1, in the drawing, a DC pulse generator 3 connected to the secondary battery 1, a PWM generator 2 connected to the DC pulse generator, and a constant voltage circuit unit supplying power to the PWM generator It consists of (4).

상기 정전압회로부(4)는 PWM발생기(2)에 일정한 직류전원을 공급하기 위해, 상기 트랜지스터(Q2)의 콜렉터에 일단이 연결된 저항(R2)과, 상기 저항(R2)의 타단과 트랜지스터(Q2)의 베이스와 접지간에 연결된 제너다이오드(D2)와, 상기 트랜지스터(Q2)의 에이터와 접지간에 연결된 캐패시터(C2)로 구성되며, 캐패시터(C2)은 입력 전압에 포함된 잡음신호를 제거하기 위한 필터 회로이고, 제너다이오드(D2)는 전압의 레벨을 일정하게 위지시키기 위한 회로이다. 또한 트랜지스터(Q2)는 트랜지스터의 다음 단에서 전류가 소비되더라도 일정한 전압을 공급하기 위해 사용되는 회로이다.The constant voltage circuit unit 4 includes a resistor R2 having one end connected to a collector of the transistor Q2, the other end of the resistor R2, and the transistor Q2 to supply a constant DC power supply to the PWM generator 2. Zener diode (D2) connected between the base and the ground of the capacitor and the capacitor (C2) connected between the transistor and the ground of the transistor (Q2), the capacitor (C2) is a filter circuit for removing the noise signal included in the input voltage The zener diode D2 is a circuit for keeping the voltage level constant. Transistor Q2 is also a circuit used to supply a constant voltage even if current is consumed in the next stage of the transistor.

상기 PWM발생기(2)는 10KHz대의 주파수를 발생시키는 것으로 2차전지의 용량에 따라서 주파수와 펄스폭을 가변할 수 있도록 프로그램되고, 마이크로프로세서 또는 PWM 전용 발생 I.C로 구성되며, 일단의 PWM 펄스 출력과 직류펄스 발생부(3)의 트랜지스터(Q1)의 베이스가 연결되어 있다.The PWM generator 2 generates a frequency of 10KHz and is programmed to vary the frequency and the pulse width according to the capacity of the secondary battery, and is composed of a microprocessor or a PWM dedicated generation IC. The base of the transistor Q1 of the DC pulse generator 3 is connected.

상기 직류펄스 발생부(3)는 PWM발생기(2)의 PWM 펄스 신호에 응답하여 스위칭 동작을 수행하는 N-MOS FET 소자인 트랜지스터(Q1)와, 2차전지(+)단자와 상기 트랜지스터의 출력단 사이에 연결되며 상기 트랜지스터(Q1)의 스위칭 동작에 의해 생성되는 코일의 역기전력에 의해 직류펄스 전류를 발생한다. 상기 트랜지스터(Q1)는 소스가 접지되고, 게이트가 PWM발생기(2)의 PWM 펄스 신호 출력에 연결되고, 드레인은 인덕터 코일(L1)과 다이오드(D1)에 연결된 N-MOS FET이다. 상기 직류펄스 발생부(3)는 2차전지(+)단자에 저항(R1)과 다이오드(D1)가 연결되고, 상기 트랜지스터(Q1)의 드레인은 다이오드(D1)와 인덕터 코일(L1)에 연결되며, 저항(R1)과 인덕터 코일(L1)과 접지간에 연결된 캐패시터(C1)로 이루어진다. 또한 트랜지스터(Q1)의 게이트에는 PWM발생기(2)의 PWM 펄스 신호 출력에 연결되어 이루어진다.The DC pulse generator 3 is a transistor Q1, an N-MOS FET device that performs a switching operation in response to a PWM pulse signal of the PWM generator 2, a secondary battery (+) terminal, and an output terminal of the transistor. The DC pulse current is generated by the counter electromotive force of the coil generated by the switching operation of the transistor Q1. The transistor Q1 is an N-MOS FET whose source is grounded, its gate is connected to the PWM pulse signal output of the PWM generator 2, and its drain is connected to the inductor coil L1 and the diode D1. The DC pulse generator 3 has a resistor R1 and a diode D1 connected to a secondary battery (+) terminal, and a drain of the transistor Q1 is connected to a diode D1 and an inductor coil L1. And a capacitor C1 connected between the resistor R1 and the inductor coil L1 and ground. In addition, the gate of the transistor Q1 is connected to the PWM pulse signal output of the PWM generator 2.

직류펄스 발생부(3)의 동작은 PWM발생기(2)의 PWM 펄스 신호 출력이 High이면 트랜지스터(Q1)의 드레인-소스는 도통(ON) 상태가 되고, 인덕터 코일(L1)으로 전류가 흐른다. 이 기간동안 인덕터 코일(L1)에 에너지가 축적되고, 인덕터 코일(L1)에 적정 크기의 전류가 확립된 후에 PWM발생기(2)의 PWM 펄스 신호 출력이 LOW가 되어 트랜지스터(Q1)는 차단(OFF) 상태가 된다.In the operation of the DC pulse generator 3, when the PWM pulse signal output of the PWM generator 2 is high, the drain-source of the transistor Q1 is turned on, and current flows through the inductor coil L1. During this period, energy is accumulated in the inductor coil L1, and after the appropriate amount of current is established in the inductor coil L1, the PWM pulse signal output of the PWM generator 2 becomes LOW so that the transistor Q1 is turned off (OFF). ) State.

트랜지스터가 차단 상태에서 인덕터 코일(L1)에 축적된 에너지는 다이오드(D1)을 통하여 2차전지에 직류 펄스 형태의 전류가 흐르게 된다. 이 경우 인덕터 코일(L1)에 축적된 에너지의 일부가 회로로 귀환되는 것을 방지하기 위하여 저항(R1)을 추가하여 정펄스 전류가 흐르도록 구성되어 있다.The energy accumulated in the inductor coil L1 in the state where the transistor is cut off causes a current in the form of a direct current pulse to the secondary battery through the diode D1. In this case, in order to prevent a part of the energy stored in the inductor coil L1 from being returned to the circuit, a resistor R1 is added to the flow so that a constant pulse current flows.

이상과 같이 본 발명의 실시 예에 따라 상세히 설명되고, 예를 들어 한정되었지만 사안에 따라 본 발명의 기술적 사상을 벗어나지 않는 범위 내에서 여러 가지 변화와 변경이 가능함은 물론이다. 사안이 다를 경우에 PWM발생기의 발생주파수와 펄스폭도 변화될 수 있음은 명백하다.Although described in detail according to the embodiment of the present invention as described above, for example, various changes and modifications are possible within the scope without departing from the technical idea of the present invention according to the matter. It is clear that the frequency and pulse width of the PWM generator can be changed in different cases.

이상의 설명에서 알 수 있는 바와 같이, 본 발명에 따르면 직류펄스 전류를 2차전지의 (+)단자로 흐르게 함으로서 2차전지의 내부저항 생성 억제가 가능하고, 또한 오랜 기간 충방전으로 증가된 내부저항을 감소시켜 2차전지의 충전 효율 증대 및 수명 연장과 성능을 향상시키는 효과가 있다.As can be seen from the above description, according to the present invention, it is possible to suppress the generation of internal resistance of the secondary battery by flowing a DC pulse current to the (+) terminal of the secondary battery, and also to increase the internal resistance increased by charge and discharge for a long time. By reducing the effect of increasing the charging efficiency of the secondary battery, extending the life and performance.

Claims (4)

2차전지에 연결 가능한 내부저항 억제 장치에 있어서;An internal resistance inhibiting device connectable to a secondary battery; 상기 2차전지의 전원을 구동전압으로 변환하는 정전압회로부와;A constant voltage circuit unit converting the power of the secondary battery into a driving voltage; 상기 정전압회로부의 전원을 인가받아서 10KHz의 주파수를 발생시키는 것으로 2차전지의 용량에 따라 마이크로프로세서 또는 PWM 전용 발생 I.C를 프로그램화하여 발생 주파수와 펄스폭을 가변시켜 PWM 펄스 신호를 발생시키는 PWM발생기와;It generates a frequency of 10KHz by receiving the power of the constant voltage circuit unit, and a PWM generator that generates a PWM pulse signal by programming the microprocessor or PWM generation IC according to the capacity of the secondary battery and varying the generation frequency and pulse width. ; 상기 PWM발생기의 PWM 펄스 신호를 인가받아서 스위치의 온/오프 동작에 따라 2차전지에 에너지를 공급하는 직류펄스 발생부;로 구성되는 것을 특징으로 하는 2차전지 내부저항 억제 장치.Secondary battery internal resistance suppression device comprising: a DC pulse generator for supplying energy to the secondary battery according to the on / off operation of the switch by receiving the PWM pulse signal of the PWM generator. 삭제delete 삭제delete 제1항에 있어서, 상기 직류펄스 발생부는The method of claim 1, wherein the DC pulse generator 상기 PWM발생기에서 발생되는 PWM 펄스 신호를 인가받아 온/오프 동작을 하는 트랜지스터(Q1)와;A transistor (Q1) for receiving an PWM pulse signal generated by the PWM generator to perform an on / off operation; 상기 트랜지스터가 온(ON) 상태이면 전류가 흘려서 에너지를 축적하고, 상기 트랜지스터가 오프(OFF) 상태이면 축적된 에너지를 방출하는 인덕터 코일(L1)과;An inductor coil (L1) for accumulating energy when a current flows when the transistor is in an ON state and emitting accumulated energy when the transistor is in an OFF state; 상기 2차전지(+)단자에 직렬 연결된 저항(R1)과 다이오드(D1), 상기 트랜지스터(Q1)의 드레인은 다이오드(D1)와 인덕터 코일(L1)에 연결되고, 저항(R1)과 인덕터 코일(L1)과 접지간에 연결된 캐패시터(C1)과;A resistor R1 and a diode D1 connected in series with the secondary battery (+) terminal and a drain of the transistor Q1 are connected to the diode D1 and the inductor coil L1 and the resistor R1 and the inductor coil. A capacitor C1 connected between L1 and ground; 상기 인덕터 코일(L1)에 축적된 에너지의 일부가 회로로 귀환되는 것을 방지하기 위한 저항(R1);으로 구성되는 것을 특징으로 하는 2차전지 내부저항 억제 장치.And a resistor (R1) for preventing a part of the energy stored in the inductor coil (L1) from being returned to the circuit.
KR1020050094064A 2005-10-06 2005-10-06 An equipment for restraining the inner resistance of the secondary battery KR100729461B1 (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
KR1020050094064A KR100729461B1 (en) 2005-10-06 2005-10-06 An equipment for restraining the inner resistance of the secondary battery

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
KR1020050094064A KR100729461B1 (en) 2005-10-06 2005-10-06 An equipment for restraining the inner resistance of the secondary battery

Related Child Applications (1)

Application Number Title Priority Date Filing Date
KR20-2005-0028592U Division KR200404687Y1 (en) 2005-10-06 2005-10-06 An equipment for restraining the inner resistance of the secondary battery

Publications (2)

Publication Number Publication Date
KR20070038783A KR20070038783A (en) 2007-04-11
KR100729461B1 true KR100729461B1 (en) 2007-06-15

Family

ID=38159966

Family Applications (1)

Application Number Title Priority Date Filing Date
KR1020050094064A KR100729461B1 (en) 2005-10-06 2005-10-06 An equipment for restraining the inner resistance of the secondary battery

Country Status (1)

Country Link
KR (1) KR100729461B1 (en)

Families Citing this family (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN105277791B (en) * 2015-11-23 2018-01-26 上海电力学院 DC low current secondary discharge accumulator internal resistance online test method

Citations (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
KR100352403B1 (en) * 1992-11-24 2002-09-11 세이코 인스트루먼트 가부시키가이샤 Charge/discharge control circuit and chargeable electric power source apparatus

Patent Citations (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
KR100352403B1 (en) * 1992-11-24 2002-09-11 세이코 인스트루먼트 가부시키가이샤 Charge/discharge control circuit and chargeable electric power source apparatus

Also Published As

Publication number Publication date
KR20070038783A (en) 2007-04-11

Similar Documents

Publication Publication Date Title
JP4573197B2 (en) Solenoid valve drive control device
US7459945B2 (en) Gate driving circuit and gate driving method of power MOSFET
KR101373892B1 (en) Buck dc to dc converter and method
EP0532263A1 (en) DC/DC voltage converting device
JP2008546183A (en) Protection circuit device for solar cell module
JP6203020B2 (en) Battery pack having charge / discharge switch circuit
KR19980037910A (en) Peak Reverse Voltage Rejection Circuit
JP2010252540A (en) Booster device
JP2015186363A (en) DC-DC converter
US9571091B2 (en) Methods for overdriving a base current of an emitter switched bipolar junction transistor and corresponding circuits
JP6767328B2 (en) Solenoid drive circuit
US7054168B1 (en) Undershoot eliminator circuit and method for synchronous rectified DC-DC converters
KR100729461B1 (en) An equipment for restraining the inner resistance of the secondary battery
KR20030011293A (en) Self-driven synchronous rectifier circuit for non-optimal reset secondary voltage
CN108711918B (en) Switch charging circuit
KR200404687Y1 (en) An equipment for restraining the inner resistance of the secondary battery
GB2535115A (en) Flyback switching power supply circuit and backlight driving device applying same
JP2005006477A (en) Self-excitation type switching power supply circuit
EP2355326A1 (en) Synchronous rectifier circuit
US7218538B2 (en) Power source device
KR200422013Y1 (en) An equipment for restraining the inner resistance of the low voltage secondary battery
US8421436B2 (en) Step-down converter maintaining stable operation at start up
CN214205489U (en) Electromagnetic valve driving device, electric control equipment and engine
KR102515338B1 (en) A high voltage pulse generation circuit using power switch and electrostatic precipitator including the same
CN219145241U (en) Soft switch control circuit, switch power supply and plasma generator

Legal Events

Date Code Title Description
A201 Request for examination
E902 Notification of reason for refusal
E701 Decision to grant or registration of patent right
GRNT Written decision to grant
FPAY Annual fee payment

Payment date: 20120608

Year of fee payment: 6

FPAY Annual fee payment

Payment date: 20130611

Year of fee payment: 7

FPAY Annual fee payment

Payment date: 20140813

Year of fee payment: 8

FPAY Annual fee payment

Payment date: 20160422

Year of fee payment: 10

FPAY Annual fee payment

Payment date: 20170602

Year of fee payment: 11

FPAY Annual fee payment

Payment date: 20180423

Year of fee payment: 12