KR100723541B1 - Feed forward linearization apparatus with limiter - Google Patents

Abstract

The present invention relates to a device for improving the efficiency and high output of a feed forward type high frequency linear power amplifier for mobile communication and broadcasting. In particular, the high frequency band limiter circuit is added to the feed forward circuit of the high frequency power amplifier, that is, the front end of the main amplifier. The limiter circuit inserted in the main amplifier reduces the peak-to-average power ratio of the high frequency signal applied to the main amplifier to increase the high frequency average power value of the main amplifier and the intermodulation distortion generated by the main amplifier. In addition, the present invention provides a feedforward linearization device having a limiter that can be easily removed from an error amplifier to reduce the linearization cost of the high frequency power amplifier and improve the power efficiency.

Power Amplifiers, Feed Forwards, Limiters

Description

Feedforward linearizer with limiter {FEED FORWARD LINEARIZATION APPARATUS WITH LIMITER}             

1 illustrates a general feedforward linearization apparatus according to the prior art;

2 illustrates a linearization apparatus through reduction and expansion of a peak-to-average power ratio for a power amplifier with a limiter according to the prior art;

3A to 3D are graphs showing the Complementary Cumulative Probability Distribution Function (CCDF) curve and spectrum of the signal seen at each stage of the linearization device of FIG.

4 shows a feedforward linearization apparatus with a limiter according to a preferred embodiment of the present invention;

5 illustrates a Doherty circuit applied to the main amplifier of FIG. 4 according to an embodiment of the present invention;

6 illustrates a drain modulation circuit applied to the main amplifier of FIG. 4 according to another embodiment of the present invention;

FIG. 7 illustrates a feedforward linearization device having a predistortion device between the limiter and main amplifier of FIG. 4 in accordance with another embodiment of the present invention. FIG.

Explanation of symbols on the main parts of the drawings

100: main amplifier 110: the first delay element

101, 102, 103, 104: 1-4 coupler 200: error amplifier

210: second delay element 300: limiter

s1: input signal s2: main amplifier output signal

s3: delay signal e1: error signal

e2: Error amplifier output signal P1: First loop delay path

P2: Main signal transmission path P3: Second loop delay path

The present invention provides a peak to average power ratio of several dB to several tens of dB, such as a modulation signal such as CDMA (Code Division Multiple Access) or OFDM / OFDMA (Orthogonal Frequency Division Multiplexing / Orthogonal Frequency Division Multiple Access) or a multicarrier signal. The present invention relates to a feedforward linearization power amplifier for power amplifying a high frequency signal having a peak to average power ratio (hereinafter referred to as a "PAR"). In particular, efficiency improvement and high output of a feedforward high frequency linear power amplifier for mobile communication and broadcasting are provided. In order to achieve this, a high-frequency limiter circuit is added to the feed-forward circuit of the high-frequency power amplifier to reduce the peak-to-average power ratio of the high frequency signal applied to the main amplifier. In addition to increasing the high-frequency average power of the amplifier, the main amplification of the intermodulation distortion generated by the limiter The present invention relates to a feedforward linearization device having a limiter which reduces the linearization cost of a high frequency power amplifier and improves power efficiency by easily removing the error amplifier along with the intermodulation distortion generated in the device.

Conventional high power, broadband power amplifiers operate in a feed forward configuration for linearization of input / output transfer functions, or perform linearization processing by predistortion, thereby reducing or reducing distortion while maintaining or improving efficiency. Linearization methods that perform various forms of error or distortion correction have been applied.

As an example of a conventional method for correcting nonlinear components of a power amplifier, a method using a pre-distortion circuit is a circuit for compensating AM-TO-AM and AM-TO-PM characteristics of a main amplifier. Use in front of the amplifier can correct the nonlinear components of the main amplifier. In general, the predistortion circuit is inferior to the feedforward method in terms of bandwidth and correction capability.

As another example, a feedforward method is used. The feedforward method detects a nonlinear component of the main amplifier in the first loop and removes the nonlinear component of the main amplifier in the second loop.

In another example, the Republic of Korea Patent Publication No. 10-2004-0009768 (published: 2004.01.31, hereinafter referred to as "public patent") rate of high frequency band, such as 'linearization device by reducing and expanding the peak-to-average power ratio' A method of attenuating a PAR of an input signal using a limiter and then improving linearity using the predistortion circuit described above is introduced.

In addition, methods such as Doherty amplifier and drain modulation method for improving the efficiency of the high frequency power amplifier are described in Masaya Iwamoto et al., 'An Extended Doherty Amplifier With High Efficiency Over a Wide Power Range,' in IEEE TRANSACTIONS ON MICROWAVE THEORY TECHNIQUES, VOL. 49, NO. 12, DECEMBER 2001, pp. 2472-2479 and Gary Hanington et al., "High-Efficiency Power Amplifier Using Dynamic Power-Supply Voltage for CDMA Applications," in IEEE TRANSACTIONS ON MICROWAVE THEORY AND TECHNIQUES, VOL. 47, NO. 8, AUGUST 1999, pp. Introduced in 1471-1476.

Conventional CDMA-based mobile communication systems generally use FDD (Frequency Division Duplex) for transmission / reception, but linear amplifiers used in TDD (Time Division Duplex) systems, such as mobile Internet systems, The main amplifier (transistor) of the linearization amplifier must be turned on and off repeatedly to fit the required frame.

To this end, the bias control apparatus of the power amplifier applied to the repeater and the base station of the 'time division duplex portable Internet system of Korea Patent Application No. 10-2004-0035368 filed on May 18, 2004 by the applicant of the present invention and The control method 'discloses a linearization amplifier or the like for interrupting the gate bias circuit.

1 is a view illustrating a feedforward linearization apparatus for a general power amplifier according to the prior art, and as shown in the conventional feedforward scheme, since a signal is applied to the input of the main amplifier without a device for reducing the PAR, the main amplifier In order to maintain the PAR of the signal, there is a difficulty that the ratio of the P _1dB point of the main amplifier and the P _avg should be designed to be almost the same as the PAR of the signal.

In general, the PAR attenuation method for modulated signals requiring the same or similar linearity as CDMA has not been devised except for the baseband digital processing.

In the high frequency band, the limiter's nonlinearity has always been a problem because it is not a proper solution.

However, the patent discloses that a method of attenuating PAR of an input signal using a rate limiter of a high frequency band and then improving linearity using a correction loop can reduce a PAR attenuation even at a high frequency band.

In other words, after the PAR attenuation using the rate limiter, the modulation signal is applied to the main amplifier to increase the power efficiency and the average power operating point of the main amplifier, and the spurious components generated by the nonlinearity of the rate limiter are separated from the loop. By using the proposed method, the PAR attenuation effect is obtained without frequency conversion in the high frequency region.

However, since the non-linearity of the main amplifier eliminates only the pre-distorter and only the non-linearity of the rate limiter in the error loop, the overall characteristics of the linearization device are less linearized than the feedforward linearization method. The linearization effect is limited by an improved intermediate linearization method rather than predistortion linearization.

 Accordingly, an object of the present invention to solve the above problems is to provide a feedforward linearization device having a limiter that can improve the efficiency and high output of the high frequency linear power amplifier by utilizing the PAR attenuation effect in the high frequency region of the limiter. It is.

In addition, another object of the present invention is to provide a feedforward linearization device having a limiter which can obtain a reduction or expansion effect of the PAR while maintaining the excellent intermodulation distortion elimination effect of the feedforward method.

In addition, another object of the present invention is to linearize by improving the power efficiency of the main amplifier itself by applying the power efficiency doherty structure and drain modulation structure for a signal having a large peak-to-average power difference, such as CDMA or OFDM / OFDMA It is to provide a feedforward linearization device having a limiter that can double the effect.

It is also an object of the present invention to provide a feedforward linearization device having a limiter which can obtain a better linearization effect by maintaining a relatively low intermodulation distortion of the main amplifier by applying a predistortion device.

In order to achieve the above object, the present invention provides a feedforward linearization apparatus for linearizing a power amplifier having an input / output signal,

A first combiner (101) for distributing an input signal (s1) to a main signal transmission path (P2) and a first loop delay path (P1), and a main comprising a means for amplifying a signal on said main signal transmission path (P2); An amplifier 100, a first delay element 110 on the first loop delay path P1 delaying an input signal distributed by the first combiner 101, and an output signal s2 of the main amplifier 100. And a third combiner 103 for dividing the second combiner 102 and an output of the second combiner 102 and an output of the first delay element 110 to generate an error signal e1. A first loop circuit;

A limiter (300) for lowering the peak-to-average power ratio of the main signal transmission path (P2) signal distributed from the first combiner (101) and applying it to the main amplifier (100);

An error including a second delay element 210 for delaying a signal on the second loop delay path P3 distributed from the output signal s2 of the main amplifier 100, and means for amplifying the error signal e1. A second loop circuit comprising a fourth combiner 104 for adding the output signal e2 of the error amplifier 200 to the output signal s3 of the amplifier 200 and the second delay element 210; Provided is a feedforward linearization apparatus having a limiter, characterized in that the configuration.

In addition, in the feedforward linearization device having a limiter according to the present invention, the limiter 300 outputs a rate limiter whose attenuation increases as the input signal s1 increases and an input signal equal to or greater than a predetermined threshold. This is one of the clipping limiters that no longer increases.

In addition, the feed forward linearization device having a limiter according to the present invention further includes a predistortion device 400 for linearizing the primary amplifier 100 between the limiter 300 and the main amplifier 100. It features.

In addition, in the feed forward linearization device having a limiter according to the present invention, the main amplifier 100 is characterized in that it has at least one structure of the Doherty structure or the drain modulation structure.

In addition, in the feedforward linearization device having a limiter according to the present invention, the main amplifier 100 amplifies any one of an LDMOS transistor or a GaAs transistor having a gate bias switch device for a time division duplex (TDD) operation. It characterized by having.

In addition, the feedforward linearization device having a limiter according to the present invention has a magnitude of a signal anywhere between the first coupler 101 and the limiter 300 and between the limiter 300 and the main amplifier 100. And means for adjusting the phase and means for adjusting the magnitude and phase of the signal between the third combiner 103 and the error amplifier 200.

Hereinafter, exemplary embodiments of the present invention will be described in detail with reference to the accompanying drawings. First of all, in adding reference numerals to the components of each drawing, it should be noted that the same components have the same reference numerals as much as possible even if they are displayed on different drawings. Detailed descriptions of well-known functions and configurations that are determined to unnecessarily obscure the subject matter of the present invention will be omitted.

4 is a diagram illustrating a feedforward linearization device having a limiter according to a preferred embodiment of the present invention. As shown, the feedforward linearization device for a power amplifier according to the present invention includes a limiter 300 and a main amplifier 100. ) And the first delay element 110 to form a first loop circuit.

The limiter 300 according to the present invention is composed of any one of a rate limiter whose attenuation increases as the input signal s1 increases and a clipping limiter whose output no longer increases for an input signal equal to or greater than a predetermined threshold. .

The input signal s1 input to the power amplifier linear feeder for power amplifier according to the present invention is divided by the first combiner 101 so that a part of the signal is applied to the first delay element 110, and thus the first loop. It is input to the third combiner 103 via the delay path P1.

The input signal s1 from the first combiner 101 passing through the main signal transmission path P2 is received by the rate limiter 300, and the limiter 300 is a PAR of the input signal s1. The operation of lowering and thereby the intermodulation wave is generated and the output is input to the main amplifier (100).

Due to the operation of the limiter 300, the main amplifier 100 performs an amplification operation in a PAR of a lower state than the PAR of the initial input signal s1, which is an effect of improving power efficiency and having a smaller capacity or a smaller number. The use of amplifying transistors results in lower cost and higher efficiency.

 The signal amplified by the main amplifier 100 is output as an output signal s2 and divided by the second combiner 102, and the divided output signal s2 is a third combiner to be an input to the second loop circuit. An error signal e1 is generated by being different from the output signal of the first delay element 110 by the reference numeral 103.

The error signal e1 is a main component of a signal in which the intermodulation wave of the limiter 300 and the intermodulation wave of the main amplifier 100 are mixed.

As shown, the second loop circuit outputs the output of the error amplifier 200 to the delay output s3 of the main amplifier 100 by the second delay element 210 through the fourth coupler 104. Combine again.

Accordingly, the feedforward linearization apparatus for power amplifier according to the present invention removes not only the intermodulation waves generated by the main amplifier 100 but also the intermodulation waves generated by the limiter 300 from the error amplifier 200. It has the advantage of being.

In other words, this operation is replaced with the conventional feedforward compensation method in which the main amplifier 56 of the second loop is moved to the first loop, unlike the compensation method of the linearization apparatus disclosed in the public patent as shown in FIG. As a result, an excellent intermodulation distortion removal characteristic inherent to feedforward can be obtained.

Therefore, the present invention obtains the effect of reducing or expanding the PAR while maintaining the excellent intermodulation distortion removal effect of the feedforward method by inserting the limiter 300 in front of the main amplifier 100 of the conventional feedforward linearization device. This results in higher efficiency and lower cost than conventional feedforward power amplifiers without limiters.

2 is a diagram illustrating a linearization apparatus through reduction and expansion of a peak-to-average power ratio for a power amplifier having a limiter according to the prior art, and FIGS. 3A to 3D illustrate a CCDF of a signal viewed at each stage of the linearization apparatus of FIG. Complementary Cumulative Probability Distribution Function)

The limiter 300 lowers the peak-to-average power ratio of the power-distributed signal provided from the first combiner 101 to distort the input signal to provide the main amplifier 100. The limiter 300 according to the present invention is provided. Complementary Cumulative Probability Distribution Function (CCDF) curves and spectra before and after passing may be expressed in the same manner as in FIGS. 3A and 3B, respectively.

The CCDF curve (located at the top) shown in FIG. 3A is positioned relatively high with respect to the signal range of the x-axis as indicated by the dark solid line. That is, it means a pure linear input signal in which spectral regrowth due to nonlinearity does not appear on the spectrum located at the bottom of FIG. 3A.

The signal after passing through the limiter 300, which can be implemented in RF, has the CCDF curve and spectrum shown in Figure 3b. The peak signal is clipped to a significant extent so that the ratio of the peak to average power of the entire signal is considerably lowered (high solid line at the top) and the spectrum shows significant distortion.

On the other hand, the feedforward linearization device having a limiter according to the present invention as described above shows another embodiment that can double the linearization effect by modifying or adding some of the functional blocks described below.

5 is a diagram illustrating a Doherty circuit applied to the main amplifier of FIG. 4 according to an embodiment of the present invention, and FIG. 6 is a view illustrating a drain modulation circuit applied to the main amplifier of FIG. 4 according to another embodiment of the present invention. 7 is a diagram illustrating a feedforward linearization device having a predistortion device between the limiter and the main amplifier of FIG. 4 according to another embodiment of the present invention.

First, as shown in FIG. 7, a predistortion device 400 for first linearization of the main amplifier 100 is added between the limiter 300 and the main amplifier 100 so that the mutual connection of the main amplifier 100 is performed. By keeping the modulation distortion relatively low, better linearization characteristics can be obtained.

In addition, the main amplifier 100 is used as a general Class-AB structure, but as shown in FIG. 5, the main amplifier 100 is a Doherty structure or a drain modulation structure as shown in FIG. It can also be configured to have them all.

Accordingly, the feedforward linearization device having the limiter according to the present invention is a class-A, AB, B B for the signal that the peak-to-average difference of the main amplifier 100, such as CDMA or OFDM / OFDMA It is possible to improve the power efficiency of the main amplifier 100 itself and to double the efficiency of the feedforward linearization device with the limiter 300 by replacing it with a doherty structure and / or a drain modulation structure, which are very power efficient compared to an amplifier such as an amplifier. have.

In addition, the feedforward linearization device having a limiter according to the present invention is a power amplifier of a communication or broadcasting system in which a transmission / reception channel is separated by a TDD scheme such as TD-CDMA, TDS-CDMA, portable Internet system, In order to repeat the amplification operation only temporarily for the time frame allocated to the transmission and stop the amplification in the receiving frame, the method can be applied to the method of solving the transistor of the main amplifier by biasing the gate bias switch device.

Accordingly, it is preferable that the main amplifier 100 includes an LDMOS transistor or a GaAs transistor having a gate bias switch device as an amplifying device for a time division duplex (TDD) operation.

On the other hand, the feed forward linearization device having a limiter according to the present invention is the magnitude of the signal at any one of the first coupler 101 and the limiter 300 and between the limiter 300 and the main amplifier 100 And a means for adjusting the phase and a means for adjusting the magnitude and phase of the signal between the third combiner 103 and the error amplifier 200, thereby providing a feedforward power amplifier for adapting to environmental changes. Can be implemented.

In addition, the devices and structures as presented in the various embodiments may be added to the basic invention individually, or may be implemented in a complex form of one or more.

On the other hand, in the detailed description of the present invention has been described with reference to specific embodiments, various modifications are possible without departing from the scope of the invention. Therefore, the scope of the present invention should not be limited to the described embodiments, but should be determined not only by the scope of the following claims, but also by the equivalents of the claims.

As described above, the present invention has the effect of improving efficiency and high output of the high frequency linear power amplifier by utilizing the PAR attenuation effect in the high frequency region of the limiter by inserting the limiter in front of the main amplifier of the existing feedforward power amplifier. have.

In addition, the present invention obtains the effect of reducing and expanding the PAR while maintaining the excellent intermodulation distortion canceling effect of the feedforward method, thereby simultaneously achieving higher efficiency and lower cost than the conventional feedforward power amplifier without limiter. Can be.

In addition, the present invention improves the power efficiency of the main amplifier itself by applying a Doherty structure and a drain modulation structure having excellent power efficiency to a signal having a large difference in peak-to-average power such as CDMA or OFDM / OFDMA. It can be effected.

In addition, the present invention can obtain a more excellent linearization effect by applying the predistortion device to keep the intermodulation distortion of the main amplifier relatively low.

Claims (8)

A feedforward linearization device for linearizing a power amplifier having an input / output signal, A first combiner (101) for distributing an input signal (s1) to a main signal transmission path (P2) and a first loop delay path (P1), and a main comprising a means for amplifying a signal on said main signal transmission path (P2); An amplifier 100, a first delay element 110 on the first loop delay path P1 delaying an input signal distributed by the first combiner 101, and an output signal s2 of the main amplifier 100. And a third combiner 103 for dividing the second combiner 102 and an output of the second combiner 102 and an output of the first delay element 110 to generate an error signal e1. A first loop circuit; A limiter 300 installed at the front end of the main amplifier 100 to lower the peak-to-average power ratio of the main signal transmission path (P2) signal distributed from the first combiner 101 and apply it to the main amplifier 100; ; A predistortion device (400) for maintaining linear intermodulation distortion of the main amplifier (100) between the limiter (300) and the main amplifier (100) to achieve a linear linearization; A phase / amplitude control circuit for controlling the magnitude and phase of the signal between the limiter 300 and the main amplifier 100 and between the third combiner 103 and the error amplifier 200; An error including a second delay element 210 for delaying a signal on the second loop delay path P3 distributed from the output signal s2 of the main amplifier 100, and means for amplifying the error signal e1. A second loop circuit comprising a fourth combiner 104 for adding the output signal e2 of the error amplifier 200 to the output signal s3 of the amplifier 200 and the second delay element 210; Feedforward linearization device having a limiter, characterized in that configured. The method of claim 1, wherein the limiter 300, Feed forward linearization device with a limiter, characterized in that either the rate limiter increases as the input signal (s1) increases or the clipping limiter output is no longer increased for an input signal equal to or greater than a certain threshold. . delete The method of claim 1 or 2, wherein the main amplifier 100, A feedforward linearization device having a limiter, characterized in that it has either an LDMOS transistor having a gate bias switch device or a GaAs transistor as an amplifying element for a time division duplex (TDD) operation. The method according to claim 1 or 2, And a means for adjusting the magnitude and phase of the signal between the first combiner (101) and the limiter (300). The method of claim 1 or 2, wherein the main amplifier 100, A feedforward linearization device having a limiter, characterized in that it has at least one of a doherty structure or a drain modulation structure. The method of claim 6, wherein the main amplifier 100, A feedforward linearization device having a limiter, characterized in that it has either an LDMOS transistor having a gate bias switch device or a GaAs transistor as an amplifying element for a time division duplex (TDD) operation. The method of claim 6, Means for adjusting the magnitude and phase of a signal between the first coupler 101 and the limiter 300 or between the limiter 300 and the main amplifier 100, and the third combiner 103 And a means for adjusting the magnitude and phase of the signal between the error amplifier (200) and the error amplifier (200).

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