KR100722833B1 - Frequency synthesizer - Google Patents

Abstract

The present invention provides a binary repeat synthesizer for adjusting an output frequency interval of a frequency synthesizer; A band extension and up-conversion unit for adjusting an output frequency band; A master oscillator for adjusting the center frequency and phase noise of the output signal; And a reference signal generator for generating a fixed frequency signal necessary for a frequency synthesis process.

According to the present invention, a frequency bandwidth, a band, a center frequency, and a phase noise characteristic can be easily changed according to an application field of a frequency synthesizer, and a wide bandwidth can be quickly switched to move frequency.

Binary Iterative Synthesis, Band Expansion and Upconversion

Description

Frequency Synthesizer

1 is a block diagram schematically showing a frequency synthesizer according to an embodiment of the present invention.

2 is a block diagram schematically illustrating a binary iterative synthesis unit 100 of a frequency synthesizer according to an embodiment of the present invention.

3 is a block diagram illustrating frequency control of a frequency synthesizer according to an embodiment of the present invention.

4 is a block diagram schematically illustrating a master oscillator 300 according to an embodiment of the present invention.

<Description of Signs of Major Parts of Drawing>

100: binary repeat synthesis unit 110: binary repeat unit

111: 1/2 frequency divider 112: Low pass filter

113: frequency mixer 114: switch

115: band pass filter 210: band pass filter

The present invention relates to a frequency synthesizer, and more particularly, to a direct frequency synthesizer of binary repetition structure used as a transmission signal and a receiving local oscillation signal source.

Advances in radar and communication systems require frequency synthesizers that can switch quickly over a wide frequency band with low phase noise and spurious output characteristics.

Indirect frequency synthesis using a phase-locked loop or the like has a conflicting relationship between switching time, noise characteristics, and bandwidth, and thus, it is difficult to quickly switch a wide frequency band at the same time with low phase noise and spurious output characteristics.

On the other hand, the direct analog frequency synthesis method can switch a wide frequency band at the same time with low phase noise and spurious output characteristics by using arithmetic operations such as addition, subtraction, multiplication, and division from a stable signal source.

Prior patents registered in connection with the direct analog frequency synthesis method include the following.

U.S. Patent: 6,005,446 (Dec. 21, 1999, Zvi Galani, et al.)

U.S. Patent: 5,596,290 (January 21, 1997, Grant H. Watkins, et al.)

U.S. Patent: 4,425,552 (January 10, 1984, Roland C. Stirling)

U.S. Patent: 3,906,388 (September 16, 1975, John P. Jones, et al.)

Zvi Galani's invention includes a new way to maintain the stability of high-Q microwave oscillators by using a phase-locked loop that uses a surface acoustic wave (SAW) oscillator with low noise characteristics.

The present invention proposes a direct frequency synthesis method having a low phase noise characteristic, but the number of frequencies is limited to 16, and the frequency interval and bandwidth are also limited to the first value determined at the frequency of the SAW oscillator. .

Grant H. Watkins's invention proposes a direct frequency synthesizer with very good spurious characteristics using a repetitive structure using 1/4 or 1/8 frequency dividers.

However, the present invention has a problem that the bandwidth is limited to 320 MHz or less, and if the difference in the LO (Local Oscillator) value of the frequency mixer is increased in order to increase the bandwidth, the frequency interval also increases at the same rate.

Roland C. Stirling's invention uses a repetitive structure using a quarter frequency divider to achieve the same function and performance as John P. Jones's simpler configuration.

However, the present invention also has a problem in that it is disadvantageous to obtain an excellent phase noise performance because a signal of a higher frequency than the output signal should be used as the frequency mixer input signal.

John P. Jones's invention proposes a direct frequency synthesizer with excellent spurious characteristics using a repetitive structure using a 1/2 frequency divider. In this invention, the signals of the X-band are used as the input signal of the frequency mixer to obtain the output signal of the L-band.

However, the present invention has a problem in that, in the case of phase noise, when the frequency of the oscillator is increased, it is difficult to obtain better performance than at low frequencies.

The present invention has been made to solve the above problems,

Disclosure of Invention An object of the present invention is to provide an ultra-high frequency low noise synthesizer capable of quickly shifting a wide bandwidth while having a structure in which frequency spacing, band, center frequency, and phase noise characteristics can be easily changed according to an application of a frequency synthesizer. will be.

The present invention, in order to achieve the above object, in the frequency synthesizer,

A reference signal generator for generating a fixed frequency signal required for a frequency synthesis process; A binary repetitive synthesizer for adjusting an output frequency interval of the frequency synthesizer by using a frequency signal applied from the reference signal generator as an input signal; A band extension and up-converter configured to adjust an output frequency band of the frequency synthesizer by using a frequency signal applied from the reference signal generator and the binary iterative synthesizer as an input signal; It provides a frequency synthesizer comprising a master oscillator for adjusting the center frequency and phase noise of the output signal of the frequency synthesizer.

The binary iterative synthesis unit connects one or more binary iterative units in series to generate a UHF-band signal, wherein the binary iterative unit is 1/2 for dividing the frequency input to the binary iterative synthesis unit by half. Frequency divider; A low pass filter for filtering the divided frequency; A frequency mixer for mixing the frequencies passing through the low pass filter; A switch for selecting a signal for use as a local oscillator (LO) signal of the frequency mixer; And a bandpass filter for filtering the frequencies mixed by the frequency mixer.

A band mixer (M1-) for up-converting the output signal of the UHF-band applied from the binary iterative synthesis unit to the L-band signal; A frequency mixer (M2 +) for upconverting the output signal passing through the frequency mixer (M1-) to a frequency higher than the L-band; A switch and frequency mixer (M3 +) for extending the bandwidth of the output signal of the binary iterative combiner; And a switch for extending the bandwidth of the output signal passing through the frequency mixer M1- and a frequency mixer M4 +, wherein the switch for extending the bandwidth of the output signal from the binary iterative synthesis unit. A single pole double through (SPDT) switch, the switch for extending the bandwidth of the output signal passing through the frequency mixer (M1-) may be made of a single pole 3 through (SP3T) switch.

Hereinafter, exemplary embodiments of the present invention will be described in detail with reference to the accompanying drawings.

1 is a block diagram schematically showing a frequency synthesizer according to an embodiment of the present invention.

As can be seen in Figure 1, the frequency synthesizer according to an embodiment of the present invention, the binary iterative synthesis section 100 to determine the output frequency interval, the band extension and up-converter 200 to determine the output frequency band of the output signal It includes a master oscillator 300 for determining the center frequency and phase noise and a reference signal generator 400 for generating a fixed frequency signal required for the frequency synthesis process.

2 is a block diagram schematically illustrating a binary iterative synthesis unit 100 of a frequency synthesizer according to an embodiment of the present invention.

As can be seen in Figure 2, the binary iterative synthesis unit 100 of the frequency synthesizer according to an embodiment of the present invention is one or more binary repeating unit 110 is connected in series. The binary repeating unit 110 includes a 1/2 frequency divider 111, a low pass filter 112, a frequency mixer 113, an SPDT switch 114, and a band pass filter 115.

The 1/2 frequency divider 111 is disposed in front of the frequency mixer 113 unlike the positions of the conventional 1 / N frequency dividers. Through this configuration, the operating center frequencies of the frequency mixer 113 and the frequency divider 111 are reduced to 1/2, and the bandwidth is also narrowed to 1/2. Devices operating at lower operating frequencies and narrower bandwidths generally have better characteristics than devices operating at higher operating frequencies and wider bandwidths. In this way, the output spurious and in-band flatness characteristics of the binary repetition unit 110 are improved.

The number of input signals (F _S , F _O + Δ, F _O + 2Δ) of the binary repetition unit 110 is three, which is the smallest number of input signals compared to the conventional repetitive structure, and has the simplest structure. It is done.

The relationship between the input signal F _S and the output signal F _{O1 of the} binary repeat synthesis unit 110 and F ₀ , Δ used as the LO signal of the frequency mixer is expressed by Equation 1 below.

[Equation 1]

F _S = (minimum value of F _O1 )

F ₀ = (3/2) × F _S

Δ = (1/2) × (Band of F _O1 )

The input signal F _S of the binary repetition unit 110 is input to the frequency mixer 113 through the 1/2 frequency divider 111 and the low pass filter 112. The signal selected by the switch 114 among F ₀ + Δ and F ₀ + 2Δ is input as a local oscillator (LO) signal of the frequency mixer 113. A band pass filter 115 of the output of the frequency mixer 113 is used to select the difference frequency of the two input signals. The relationship between the number of binary repeating units 110 and the frequency of F _O1 is shown in Table 1 below.

TABLE 1

As can be seen in Table 1, as the number of binary repetition units 110 used increases, the number of frequencies increases by two times, and the frequency interval decreases by twice. The bandwidth is 2Δ, unchanged. As described above, the binary iterative synthesis unit 100 may adjust the number and intervals of frequencies without affecting the frequency bandwidth of the frequency synthesizer 113 by adjusting the number of binary repeating units 110.

3 is a block diagram illustrating frequency control of a frequency synthesizer according to an embodiment of the present invention.

The output frequency F _m of the binary iterative synthesis unit 100 in which m binary repeat units 110 are connected in series is represented by Equation 2 below.

[Equation 2]

F _m = F _S + (S _m +1) Δ- (S _{m -1} +1) Δ / 2 + (S _{m -2} +1) Δ / 2 ^ 2 + .... + d _m (S ₁ +1) Δ / 2 ^ (m-1)

At this time, S ₁ , S ₂ , S ₃ , ..., S _m has a value of 0 or 1 as the control value of the switch 114 of the binary repeating unit 110. d _m is +1 if m is odd and -1 if m is even.

Accordingly, as shown in FIG. 3, the output frequency F _O1 of the binary iterative synthesis unit 100 in which four binary repeating units 100 are connected in series is represented by Equation 3 below.

[Equation 3]

F _O1 = F ₄ = F _s + (S ₄ +1) Δ- (S ₃ +1) Δ / 2 + (S ₂ +1) Δ / 2 ^ 2- (S ₁ +1) Δ / 2 ^ 3

If F _s = 400 MHz, F ₀ = 600 MHz, Δ = 80 MHz, and the switch control bits are C = S ₄ , D = S ₃ , E = S ₂ , F = S ₁ , F _O1 is Table 2 is as follows.

TABLE 2

When the binary repeating unit 110, four more connected in series, the frequency interval F _O1 is 10 MHz and the bandwidth is inde 160 MHz, when the binary repeating unit in the five, six, seven, etc. are added in series connected in the F _O1 The frequency interval is reduced to 5 MHz, 2.5 MHz, 1.25 MHz, and so on. At this time, the bandwidth is kept constant at 160 MHz.

When the band extension and up-conversion are performed on the output signal F _O1 of the binary iterative synthesis unit 100 using the frequency mixers M5- and M6 +, the minimum value and the maximum value of the final output frequency F _OUT are as shown in Equation 4.

[Equation 4]

F _OUTmin = F _MO + F ₂ + F _L + F ₁ -F _O1max

F _OUTmax = F _MO + F ₂ + 8Δ + F _L + F ₁ + 2Δ-F _O1min

At this time, if F _L = 1500 MHz, F ₁ = 500 MHz, F _MO = 5760 MHz, F ₂ = 880 MHz, the control bit of switch 5 is B and the control bit of switch 6 is A, the final output frequency F _OUT. The minimum value, the maximum value and the total frequency of are as shown in Equation 5 below.

F _OUTmin = 5760 + 880 + 1500 + 500-550 = 8090 MHz

F _OUTmax = 5760 + 880 + 8 × 80 + 1500 + 500 + 2 × 80-400 = 9040 MHz

TABLE 3

As can be seen in Table 3 above, while maintaining the frequency interval of 10 MHz determined by the binary iterative synthesis unit 100, the bandwidth was extended to 960 MHz and the output frequency was up-converted to the X-band.

Changing Switch 6 to SP4T instead of SP3T and adding a 880 +12 × 80 = 1840 MHz signal will increase the bandwidth to 1280 MHz. It can also be seen that changing the frequency of the master oscillator can shift the band of the output signal.

The band extension and up-converter 200 converts the frequency mixers M1- and F _O2 up-converting F _O1 of the UHF-band, which is the output signal of the binary iterative synthesis unit 100, to F _O2 , which is an L-band. And a frequency mixer M2 + and a band pass filter 210 which upconvert to F _OUT , which is a frequency signal higher than the band.

The frequency mixer M3 + and the single pole double through (SPDT) switch are used to extend the bandwidth of the F _O1 signal with a bandwidth of 2Δ to 4Δ.

By selecting one of F _L + F ₁ or F _L + F ₁ + 2Δ for the LO signal of the frequency mixer M1-, the bandwidth of the F _O2 signal is 2 × 2Δ = 4Δ.

The frequency mixer M4 + and SP3T (Single Pole 3 Through) switches are used to extend the bandwidth of the F _O2 signal with a bandwidth of 4Δ to 12Δ.

By selecting the LO signal of the frequency mixer M2 + from among F _MO + F ₂ , F _MO + F ₂ + 4Δ, and F _MO + F ₂ + 8Δ, the bandwidth of the F _OUT signal is 3 × 4Δ = 12Δ.

The band extension and up-converter has a feature of adjusting the bandwidth of F _OUT by adjusting the number of LO signals of the frequency mixers M1- and M2 +. For example, if the LO signal of M2 + is selected from F _MO + F ₂ and F _MO + F ₂ + 4Δ, the bandwidth of F _OUT becomes 2 × 4Δ = 8Δ, add F _MO + F ₂ + 12Δ, and add SP4T switch. If you select from among F _MO + F ₂ , F _MO + F ₂ + 4Δ, F _MO + F ₂ + 8Δ, and F _MO + F ₂ + 12Δ, the bandwidth of F _OUT is 4 × 4Δ = 16Δ.

In this process of bandwidth expansion, the frequency interval determined by the binary iterative synthesis unit 100 remains constant without change, and thus, the bandwidth extension and up-conversion unit 200 may independently determine the bandwidth.

Since the switches used in the band expansion operate in the UHF-band or L-band, they have better signal isolation performance than those operating at frequencies higher than the L-band and L-band, respectively, thereby improving the spurious performance of the frequency synthesizer. There is a characteristic.

By using F _L and F _MO signals separated from band extension for frequency upconversion, the frequency band can be easily changed according to the application field of the frequency synthesizer.

Rather than the conventional method of obtaining a wideband output signal by using a switch, a filter, and a filter bank including a switch at the output of the frequency mixer, a simple structure using only a filter at the output of the frequency mixer is obtained. . In addition, since the direct synthesis method using only a frequency mixer and a switch is used instead of an indirect synthesis method such as a phase locked loop, the switching time required for any frequency change in a band is less than 1 us. There are features that can be implemented.

In the present invention, a band pass filter is used to select the sum frequency of two input signals at the output of the frequency mixer M2 +. If the difference frequency of the two input signals is selected at the output using a signal having a frequency higher than F _{OUT at} the input of the frequency mixer M2 +, the phase noise characteristic of the output signal follows the characteristics of the high frequency signal of the frequency mixer input. In general, the higher the frequency, the worse the phase noise characteristic is, and it is transmitted to the output of the frequency mixer as it is, which degrades the output signal phase noise performance of the frequency synthesizer. Unlike the conventional method, the present invention is characterized in that the phase noise performance is improved by adding two low frequencies to obtain the final frequency F _OUT of the frequency synthesizer.

The master oscillator 300 determines the output signal center frequency of the frequency synthesizer and determines the phase noise characteristic of the output signal. Since the master oscillator 300 does not affect the frequency interval, frequency bandwidth, spurious characteristics, etc., the master oscillator 300 may be selected in consideration of only the phase noise characteristics and the center frequency of the frequency synthesizer.

4 is a block diagram schematically illustrating a master oscillator 300 according to an embodiment of the present invention.

After phase-locking the OSC2 to the frequency multiplied by the OCS1, which is the reference signal source of the frequency synthesizer, using a phase-locked loop, a low noise filter (LNF), a low noise amplifier (LNA), and a × N multiplier Output the required master oscillator frequency F _MO .

When the frequency multiplier is used, the phase noise increase is 20logN, and the influence of the noise figure of the low noise filter (LNF) and the low noise amplifier (LNA) on the path is shown. When the signal level of OSC2 is high enough, the elements on the path are high. The noise figure effect by M is negligible.

OSC1 uses a device capable of satisfying the signal stability performance specification as a reference signal source of a frequency synthesizer, and a crystal oscillator is often used. OSC2 is a signal source that determines the phase noise of the frequency synthesizer.

In FIG. 1, the final output frequency F _OUT is configured such that the signal F _O2 in the L-band, the frequency of the master oscillator 300, and F ₂ for extending the band are added through the frequency mixer. The output phase noise of the frequency mixer follows the worse of the phase noise of the two input signals, and generally follows the phase noise of the high frequency input signal.

Among the input signals of the final mixer, the highest frequency is the master oscillator 300 signal and the final output signal F _OUT follows the phase noise characteristic of the master oscillator 300. Oscillators that can be used in OSC2 include VHF-band crystal oscillators, UHF- or L-band SAW oscillators, etc., and they can be selected by considering only phase noise characteristics required for a frequency synthesizer.

The multiplication value N in the structure of the master oscillator 300 determines the frequency of the master oscillator 300. If the N value can satisfy the required phase noise performance, any frequency may be selected as the frequency of the master oscillator 300.

The master oscillator 300 is not limited to the structure described with reference to FIG. 4. In the structure of FIG. 1, the master oscillator 300 determines the output center frequency of the frequency synthesizer and determines the phase noise performance, and does not affect other performances and functions. Therefore, one feature of the present invention is that it can be used as the master oscillator 300 as long as the oscillator satisfies the operating frequency and phase noise characteristics.

According to the present invention by the above configuration,

It has a structure that can easily change the frequency interval, band, center frequency and phase noise characteristics, which are the main performance items of the frequency synthesizer, according to the application of the frequency synthesizer.

This high performance and flexibility frequency synthesizer can be applied to a variety of individual applications in radar and communication systems.

Claims (4)

In frequency synthesizer, A reference signal generator for generating a fixed frequency signal required for a frequency synthesis process; A binary repetitive synthesizer for adjusting an output frequency interval of the frequency synthesizer by using a frequency signal applied from the reference signal generator as an input signal; A band extension and up-converter configured to adjust an output frequency band of the frequency synthesizer by using a frequency signal applied from the reference signal generator and the binary iterative synthesizer as an input signal; And a master oscillator for adjusting the center frequency and the phase noise of the output signal of the frequency synthesizer. The method of claim 1, The binary repeat synthesis unit, A frequency synthesizer, characterized in that to generate a UHF-band signal by connecting one or more binary repeating units in series. The method of claim 2, The binary repeating unit, A half frequency divider for dividing a frequency input to the binary iterative synthesis unit by half; A low pass filter for filtering the divided frequency; A frequency mixer for mixing the frequencies passing through the low pass filter; A switch for selecting a signal for use as a local oscillator (LO) signal of the frequency mixer; And And a band pass filter for filtering the frequencies mixed by the frequency mixer. The method of claim 1, The band extension and upconversion unit A frequency mixer (M1-) for upconverting the output signal of the UHF-band applied from the binary iterative synthesis unit to the signal of the L-band; A frequency mixer (M2 +) for upconverting the output signal passing through the frequency mixer (M1-) to a frequency higher than the L-band; A switch and frequency mixer (M3 +) for extending the bandwidth of the output signal of the binary iterative combiner; And And a frequency mixer (M4 +) and a switch for extending the bandwidth of the output signal passing through the frequency mixer (M1-).

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