KR100722776B1 - Method of forming a silicon rich nano-crystalline structure using atomic layer deposition process and method of manufacturing a non-volatile semiconductor device using the same - Google Patents

Abstract

A method of forming a silicon rich nano-crystal structure using an atomic layer deposition process and a method of manufacturing a nonvolatile semiconductor device using the same are disclosed. A first gas comprising a first silicon compound is provided onto the object to form a silicon rich chemisorption layer on the object. Providing a second gas containing oxygen on the silicon rich chemisorption layer to form a silicon rich insulating layer on the object, and then providing a third gas comprising a second silicon compound onto the silicon rich insulating layer A silicon nano-crystal layer is formed on the insulating layer. These processes are repeatedly performed to form a silicon rich nano-crystal structure having a plurality of silicon rich insulating layers and silicon nano-crystal layers on the object. Silicon-rich nano-crystal structures with high silicon content and excellent step coverage, including silicon-rich insulating layers and silicon-rich nano-crystal layers through an atomic layer deposition process using a gas that can extend the variation of silicon content Can be formed. The write and erase operations of the nonvolatile semiconductor device including the silicon rich nano-crystal structure as the charge trapping structure can be improved, and data retention can be improved.

Description

METHOD OF FORMING A SILICON RICH NANO-CRYSTALLINE STRUCTURE USING ATOMIC LAYER DEPOSITION PROCESS AND METHOD OF MANUFACTURING A NON-VOLATILE SEMICONDUCTOR DEVICE USING THE SAME}

1 is a cross-sectional view showing a silicon rich nano-crystal structure according to the present invention.

It is a schematic diagram for demonstrating the chemical structure of a silane.

3 is a schematic diagram for explaining the chemical structure of hexachlorodisilane (HCD).

4 is a process flowchart illustrating a method of forming a silicon rich nano-crystal structure using an atomic layer deposition process according to an embodiment of the present invention.

5 is a process flowchart illustrating a method of forming a silicon rich nano-crystal structure using an atomic layer deposition process according to another embodiment of the present invention.

6 to 8 are cross-sectional views illustrating a method of manufacturing a nonvolatile semiconductor device in accordance with embodiments of the present invention.

<Description of the symbols for the main parts of the drawings>

10: object 15, 25, 35, 215, 216, 217: silicon rich insulation layer

20, 30, 220, 221: Silicon nano-crystal layer

50: silicon rich nano-crystal structure

200: substrate 205: device isolation membrane

210: tunnel dielectric layer 230: charge trapping structure

235: blocking dielectric layer 240: control gate

The present invention relates to a method of forming a silicon rich nano-crystal structure and a method of manufacturing a nonvolatile semiconductor device using the same, and more particularly, to a silicon rich nano-crystal structure through an atomic layer deposition (ALD) process. A method of forming and a method of manufacturing a nonvolatile semiconductor device using the same.

Semiconductor memory devices generally lose their data over time, such as dynamic random access memory (DRAM) and static random access memory (SRAM), but volatile semiconductor memory devices with fast data input and output The data can be largely classified into a nonvolatile semiconductor memory device in which data is retained but data input and output are slow. Recently, the demand for electrically erasable and programmable ROM (EEPROM) devices or flash memory devices capable of electrically inputting and outputting data among these nonvolatile semiconductor memory devices is increasing.

Typically, a memory cell of a nonvolatile semiconductor memory device has a stacked gate structure including a floating gate formed on a semiconductor substrate. Such stacked gate structures typically include one or more tunnel dielectric or interlayer dielectric layers and control gates formed on or around the floating gate.

In the memory cell of the nonvolatile semiconductor device having the stacked gate structure described above, information is programmed in such a manner that hot electrons generated in a channel region are injected into a floating gate over an energy barrier of a tunnel dielectric layer, and FN (Fowler- Nordheim) recorded information is erased by removing the electrons in the floating gate by a tunneling method.

However, memory cells of a conventional nonvolatile semiconductor device having a stacked gate structure have problems with electron retention for retaining written data. For example, electrons injected into the floating gate must be retained in order to maintain information in which the memory cell of the flash memory device is written. However, if defects such as pinholes exist in the tunnel dielectric layer, they are injected into the floating gate. The electrons flow out through these defects, thereby lowering the data retention of the flash memory device. In addition, in a memory cell of a flash memory device having a stacked gate structure, a tunnel oxide layer constituting a tunnel junction through which electrons are to be formed using an insulating material such as an oxide having a high energy barrier in a band diagram. do. In this case, since the energy barrier for the electrons is high, the tunneling probability of the electrons decreases exponentially unless the thickness of the energy barrier is reduced. Therefore, the tunnel dielectric layer must be formed with a very accurate and thin thickness, which makes the uniform formation of the tunnel dielectric layer very difficult and degrades the reliability of the flash memory device.

Recently, a new nonvolatile semiconductor device using a silicon rich oxide layer as a charge trapping layer has been developed to solve the problems occurring in the stacked gate structure. Silicon nano-crystals are formed in the silicon rich oxide layer used as the charge trapping layer of the nonvolatile semiconductor device, and these silicon nano-crystals serve as floating gates. The silicon nano-crystals trap or de-trap electrons by the tunneling effect and are electrically spaced from each other.

During the programming operation of the nonvolatile semiconductor device, electrons are injected into the silicon nano-crystals, but the movement of electrons between the silicon nano-crystals is limited because the silicon nano-crystals are spaced from each other. Thus, even if a defect occurs in the tunnel dielectric layer, the leakage current caused by the defect does not affect the electrons trapped in the adjacent silicon nano-crystals.

In a nonvolatile semiconductor memory device including a conventional silicon nano-crystal, one or more data bits are extracted by using a shift of a threshold voltage that is involved when one electron is stored per silicon nano-crystal. A multi-state cell that can be stored can be implemented.

In the above-described conventional nonvolatile semiconductor device, the silicon rich oxide layer is disclosed in US Pat. No. 6,274,429, US Pat. No. 5,726,070, US Pat. No. 5,763,937, US Pat. No. 6,774,061, US Pat. Through various processes, such as low pressure chemical vapor deposition (LPCVD), plasma-enhanced chemical vapor deposition (PECVD), or silicon implantation, using silane (SiH ₄ ) and nitrous oxide (N ₂ O) gases. Can be formed.

When the silicon rich oxide layer is formed by a low pressure chemical vapor deposition process using silane gas and nitrous oxide gas, silicon-oxygen (Si-Si) bonds are more important than silicon-silicon (Si-Si) bonds depending on the reaction of silane gas and nitrous oxide gas. Since the bonds of -O) are more likely to be formed, there is a limit to increasing the silicon content of the silicon rich oxide layer.

In addition, when the silicon rich oxide layer is formed on a patterned substrate by a high density plasma chemical vapor deposition (HDP-CVD) process, the step coverage of the silicon rich oxide layer is very poor due to the straightness of the plasma. A problem arises in that the silicon content in the silicon rich oxide layer deposited on the sidewalls and bottom of the pattern is different.

Meanwhile, in the method of forming a silicon rich oxide layer by implanting silicon ions into the oxide layer, leakage current is generated due to damage of the silicon rich oxide layer by ion implantation, and the density and size of the silicon nano-crystals in the silicon rich oxide layer are increased. There is a problem that it is difficult to control.

Accordingly, one object of the present invention is to provide a method for forming a silicon rich nano-crystal structure having high silicon content and excellent step coverage by using an atomic layer deposition process.

It is another object of the present invention to provide a method for manufacturing a nonvolatile semiconductor device including a silicon rich nano-crystal structure having a high silicon content and excellent step coverage through an atomic layer deposition process as a charge trapping layer.

In order to achieve the above object of the present invention, a method for forming a silicon rich nano-crystal structure using an atomic layer deposition process according to the preferred embodiments of the present invention, comprising a first silicon compound on the object 1 gas is provided to form a silicon rich chemisorption layer on the object. After providing a second gas containing oxygen on the silicon rich chemisorption layer to form a silicon rich insulating layer on the object, to provide a third gas containing a second silicon compound on the silicon rich insulating layer. To form a silicon nano-crystal layer on the silicon rich insulating layer.

The first silicon compound may include two silicon atoms. For example, the first silicon compound may include hexadichlorosilane (HCD). The second gas may include nitrous oxide gas or oxygen gas. The second silicon compound may include silicon and hydrogen. For example, the second silicon compound may include silane.

In embodiments of the present disclosure, the step of forming the silicon rich chemisorption layer and the step of forming the silicon rich insulating layer may be repeatedly performed to control the silicon content of the silicon rich insulating layer. In addition, the flow rate of the third gas may be adjusted to control the size and density of the silicon nano-crystals in the silicon nano-crystal layer.

According to embodiments of the present invention, by repeatedly forming the silicon rich chemisorption layer, forming the silicon rich insulating layer and forming the silicon nano-crystal layer, on the object A plurality of silicon rich insulating layers and a plurality of silicon nano-crystal layers interposed between the silicon rich insulating layers are formed.

In embodiments of the present invention, the unwanted material may be removed from the silicon rich insulating layer before forming the silicon nano-crystal layer. In this case, an undesired material may be removed from the silicon rich insulating layer by providing a gas containing hydrogen on the silicon rich insulating layer. For example, the gas containing hydrogen may include ammonia gas, hydrogen gas, or deuterium gas.

In one embodiment of the present invention, the silicon rich nano-crystal structure may be heat-treated. For example, the silicon rich nano-crystal structure may be heat treated for about 10 to 90 minutes at a temperature of about 800 to 1,100 ° C. under an atmosphere containing nitrogen.

In another embodiment of the present invention, the silicon rich nano-crystal structure may be pre-oxidized. For example, the silicon rich nano-crystal structure may be pre-oxidized in an atmosphere containing nitrogen and oxygen.

In another embodiment of the present invention, the silicon rich nano-crystal structure may be flash annealed. For example, the silicon rich nano-crystal structure may be flash annealed for about 5 to 20 msec while maintaining the object at a temperature of about 20 to 500 ° C.

In order to achieve the above object of the present invention, in the method of manufacturing a nonvolatile semiconductor device using the atomic layer deposition process according to the preferred embodiments of the present invention, after forming a tunnel dielectric layer on a substrate, the tunnel dielectric layer A charge trapping structure is formed on the substrate through an atomic layer deposition process. A control gate is formed on the charge trap structure. Forming the charge trapping structure, providing a first gas comprising a first silicon compound on the tunnel dielectric layer to form a silicon rich chemisorption layer on the tunnel dielectric layer, and then the silicon rich chemisorption A second gas containing oxygen is provided on the layer to form a silicon rich insulating layer on the tunnel dielectric layer. Subsequently, a third gas including a second silicon compound is provided on the silicon rich insulating layer to form a silicon nano-crystal layer on the silicon rich insulating layer.

In embodiments of the present invention, the forming of the silicon rich chemisorption layer, the forming of the silicon rich insulating layer, and the forming of the silicon nano-crystal layer may be repeatedly performed to form a layer on the tunnel dielectric layer. The charge trapping structure may be formed to include a plurality of silicon rich insulating layers and a plurality of silicon nano-crystal layers interposed between the silicon rich insulating layers.

In one embodiment of the present invention, the charge trapping structure may be heat treated in an atmosphere containing nitrogen. According to another embodiment of the present invention, the charge trapping structure may be pre-oxidized in an atmosphere containing nitrogen and oxygen. In another embodiment of the present invention, the charge trapping structure may be flash annealed.

According to an embodiment of the present invention, a blocking dielectric layer may be formed between the charge trapping structure and the control gate. For example, the blocking dielectric layer may be formed using a silicon compound or a metal oxide.

According to the present invention, silicon having high silicon content and excellent step coverage, including silicon rich insulating layers and silicon rich nano-crystal layers, through an atomic layer deposition process using gases that can extend the variation of silicon content Rich nano-crystal structures can be formed. In addition, it is possible to improve the speed of writing and erasing operations of the nonvolatile semiconductor device including the silicon rich nano-crystal structure as the charge trapping structure, and at the same time improve the data retention of the nonvolatile semiconductor device.

Hereinafter, a method of forming a silicon rich nano-crystal structure and a method of manufacturing a nonvolatile semiconductor device using the same according to preferred embodiments of the present invention will be described in detail with reference to the accompanying drawings. The present invention is not limited to the following embodiments, and those skilled in the art may implement the present invention in various other forms without departing from the technical spirit of the present invention. In the accompanying drawings, the dimensions of objects, substrates, layers (films), regions, pads, patterns, or structures are shown to be larger than actual for clarity of the invention. In the present invention, each layer (film), region, electrode, pad, pattern or structures may be "on", "on" or "on" an object, substrate, each layer (film), region, electrode, pad or pattern. When referred to as being formed "under", it means that each layer (film), region, electrode, pad, pattern or structure is formed directly over or below the substrate, each layer (film), region, pad or patterns. Alternatively, other layers (films), different regions, different pads, different electrodes, different patterns or other structures may be additionally formed on the object or substrate. In addition, when a material, gas, compound, layer (film), region, pad, electrode, pattern, or structure is referred to as "first", "second", "spare", "bottom" and / or "top" It is not intended to limit these members, but merely to distinguish each material, gas, compound, layer (film), region, electrode, pad, pattern or structure. Thus, "first", "second", "preparation", "lower" and / or "top" may be different for each material, gas, compound, layer (film), region, electrode, pad, pattern or structure. It can be used alternatively or interchangeably.

Silicon Rich Nano-Crystal Structures

1 is a cross-sectional view illustrating a silicon rich nano-crystal structure according to embodiments of the present invention.

Referring to FIG. 1, the silicon rich nano-crystal structure 50 according to the present invention may include a plurality of silicon rich insulating layers 15, 25, and 35 and a plurality of silicon nano-crystals. ) Layers 20 and 30 are repeatedly stacked alternately on each other on the object 10.

The object 10 may include a semiconductor substrate such as a silicon wafer or a silicon-on-insulator (SOI) substrate, a metal oxide single crystal substrate, or the like. According to an embodiment of the present invention, a conductive layer and / or an additional insulating layer may be interposed between the object 10 and the insulating structure 50.

In one embodiment of the invention, the silicon rich insulating layers 15, 25, 35 correspond to silicon rich silicon oxide layers, and the silicon nano-crystal layers 20, 30 are nano Corresponds to the nano-crystalline silicon oxide layer. According to another embodiment of the present invention, the silicon rich insulating layers 15, 25, 35 correspond to silicon rich silicon oxynitride layers, respectively, and the silicon nano-crystal layers 20, 30. Each corresponds to a nano-crystal silicon oxynitride layer.

According to one embodiment of the invention, the silicon rich insulating layers 15, 25, 35 each comprise a first gas comprising a first silicon compound containing two silicon atoms and a second comprising oxygen (O). It is formed through an atomic layer deposition process using gas. For example, the first gas may include hexachlorodisilane (Si ₂ Cl ₆ ); HCD] gas, and the second gas includes nitrous oxide (N ₂ O) gas or oxygen (O ₂ ) gas. In this case, the silicon rich insulating layers 15, 25, and 35 correspond to the silicon rich silicon oxide layers, respectively. In addition, the silicon nano-crystal layers 20 and 30 are formed through an atomic layer deposition process using a third gas, each containing a second silicon compound. For example, the third gas includes a silane (SiH ₄ ) gas. At this time, the silicon nano-crystal layers 20 and 30 correspond to nano-crystal silicon oxide layers, respectively.

According to another embodiment of the present invention, the silicon rich insulating layers 15, 25, and 35 each include a first gas containing oxygen, a first silicon compound containing two silicon atoms, and a second containing oxygen (O). It is formed through an atomic layer deposition process using a gas and a third gas containing hydrogen (H). For example, the first gas includes hexachlorodisilane (HCD) gas, the second gas includes nitrous oxide gas or oxygen gas, and the third gas includes ammonia (NH ₃ ) gas, hydrogen ( H ₂ ) gas or deuterium (D2) gas. In this case, the silicon rich insulating layers 15, 25, and 35 correspond to the silicon rich silicon oxynitride layers, respectively. In addition, the silicon nano-crystal layers 20 and 30 are each formed through an atomic layer deposition process using a fourth gas including a second silicon compound. In this case, the silicon nano-crystal layers 20 and 30 correspond to nano-crystal silicon oxynitride layers, respectively.

In an atomic layer deposition (ALD) process, chemically adsorbing reactive precursors on an object, such as a substrate, to form a mono-layer of reactive precursors. That is, the reactive precursors are alternately supplied onto an object located in the chamber while the supply of each reactive precursor is separated by an inert gas purge to form a monolayer of reactive precursors on the object. By additionally forming a new monolayer on the previously deposited monolayer on the object upon supply of respective reactive precursors, a uniform layer having the required thickness is formed. The cycle of the atomic layer deposition process may be repeatedly performed to form an insulating layer having a desired thickness on the object.

In a conventional silicon oxide layer formed through an atomic layer deposition process using a silane (SiH ₄ ) gas, which is a silicon compound containing one silicon atom, the atomic ratio between silicon and oxygen is about 1.0: 1.95. In contrast, when the silicon rich insulating layers 15, 25, and 35 are formed through an atomic layer deposition process using hexachlorodisilane (HCD) gas, a silicon compound containing two silicon atoms, silicon rich insulation The atomic ratio between silicon and oxygen in the layers 15, 25, 35 is about 1.0: 1.8. Therefore, the silicon rich insulating layers 15, 25, 35 according to the present invention have a higher silicon content than the conventional silicon oxide layer.

FIG. 2 is a schematic diagram showing a chemical structure of a silane which is a silicon compound for forming a conventional silicon oxide layer, and FIG. 3 is a hexa, which is a silicon compound for forming the silicon rich insulating layers 15, 25, and 35 according to the present invention. It is a schematic diagram for demonstrating the chemical structure of chlorodisilane (HCD).

2 and 3, when performing an atomic layer deposition process using silane gas, -SiH ₃ is adsorbed onto a surface of an object such as a substrate. However, when performing an atomic layer deposition process using hexachlorodisilane (HCD) gas, -Si ₂ Cl ₄ or -Si ₂ Cl ₅ is adsorbed on the surface of the object. Specifically, when the atomic layer deposition process using the silane gas is performed, a silicon compound including one silicon atom is adsorbed on the surface of the object to form a chemical adsorption layer. In contrast, when the atomic layer deposition process using hexachlorodisilane (HCD) gas is performed, a silicon compound including two silicon atoms is adsorbed on an object surface to form a silicon rich chemisorption layer. do. Accordingly, the silicon content in the silicon rich chemisorption layer formed using hexachlorodisilane (HCD) gas is higher than that of the chemisorption layer formed using silane gas.

In one embodiment of the present invention, when supplying a second gas containing oxygen on the silicon rich chemisorption layer having a high silicon content formed on the object, the silicon rich chemisorption layer and the second gas reacts A single silicon rich insulating layer, such as a single silicon rich silicon oxide layer, is formed on the object.

According to another embodiment of the present invention, when the second gas containing oxygen and the third gas containing hydrogen are sequentially supplied onto the silicon rich chemisorption layer formed on the object, the silicon rich chemisorption layer and the The two gases react to form a single silicon rich insulating layer, such as a single silicon rich silicon oxynitride layer, on the object while removing unwanted components such as chlorine (Cl) from the single silicon rich insulating layer.

In a conventional single silicon oxide layer formed using silane gas, adjacent silicon atoms are bonded to each other around an oxygen atom. In contrast, in a single silicon rich insulating layer formed by using a hexachlorodisilane (HCD) gas and a second gas containing oxygen, or by additionally using a third gas including hydrogen, adjacent silicon atoms are separated from each other. Because of the direct bonding, silicon-silicon (Si-Si) bonds are created in a single silicon rich insulating layer. That is, the silicon rich insulating layer formed using hexachlorodisilane (HCD) gas has a higher silicon content than the silicon oxide layer formed using silane gas. As a result, an atomic layer deposition process using hexachlorodisilane (HCD) gas and a second gas or additionally using a third gas is performed to form silicon rich insulating layers 15, 25, and 35 having a high silicon content. can do.

According to one embodiment of the present invention, in order to form the silicon rich insulating layers 15, 25, 35 having the required thickness and silicon content on the object 10, the respective silicon rich insulating layers 15, 25. , Cycles of atomic layer deposition processes to form 35) may be repeated.

Referring back to FIG. 1, the silicon nano-crystal layers 20 and 30 each use an atomic layer deposition process using a third gas containing a second silicon compound between the silicon rich insulating layers 15, 25 and 35. It is formed through.

According to the present invention, after performing one cycle of the atomic layer deposition process for forming a single silicon rich insulating layer 15, atomic layer deposition using a gas containing a second silicon compound containing silicon and hydrogen By performing another cycle of the process, a portion of the single silicon rich insulating layer 15 is changed to a single silicon nano-crystal layer 20. That is, when the gas containing the silicon is supplied onto the silicon rich insulating layer 15, the silicon reacts with the single silicon rich insulating layer 15 to form a single silicon nano-crystal layer on the single silicon rich insulating layer 15. 20 is formed. At the same time, hydrogen contained in the gas containing silicon and hydrogen removes unwanted components such as chlorine (Cl) from the single silicon rich insulating layer 15.

As with the processes described above, a single silicon rich insulating layer 25 is again formed on the single silicon nano-crystal layer 20, and then a portion of the single silicon rich insulating layer 25 is again formed by the single silicon nano-crystal layer. Change to (30). By repeatedly performing these processes, a silicon rich nano-crystal structure including a plurality of silicon rich insulating layers 15, 25, 35 and a plurality of silicon nano-crystal layers 20, 30 on the object 10. To form (50).

In the present invention, the silicon rich nano-crystal structure 50 has a structure in which the silicon nano-crystal layers 20 and 30 are interposed between the silicon rich insulating layers 15, 25 and 35 having a high silicon content. Therefore, the silicon content in the silicon rich nano-crystal structure 50 can be greatly increased.

In addition, the number of cycles of the atomic layer deposition process can be controlled to control the thickness of the silicon rich insulating layers 15, 25, 35 or the size and density of the silicon nano-crystals in the silicon nano-crystal layers 20, 30. The silicon rich nano-crystal structure 50 can further increase the width of the change in the silicon content in the silicon rich nano-crystal structure 50 while at the same time having excellent step coatability and improved thickness uniformity. Can be formed.

Method of Forming Silicon Rich Nano-Crystal Structures

4 is a process flow diagram illustrating a method of forming a silicon rich nano-crystal structure using an atomic layer deposition process in accordance with embodiments of the present invention.

Referring to FIG. 4, an object such as a semiconductor substrate or a metal oxide single crystal substrate is loaded into a reaction chamber of an atomic layer deposition apparatus (step S100). The temperature in the reaction chamber is maintained at about 600 ~ 650 ℃. For example, the internal temperature of the reaction chamber is about 630 ℃. Accordingly, the object located in the reaction chamber also has a temperature of about 600 to 650 ° C substantially.

A first gas is supplied as a first reactive precursor onto the object positioned in the reaction chamber to form a silicon rich chemisorption layer on the object (step S110). The first gas comprises a first silicon compound having at least two silicon atoms. For example, the first gas as the first reactive precursor includes a hexadichlorosilane (HCD) gas.

When the first gas including hexadichlorosilane (HCD) gas is provided on the object, the first portion of the first gas is chemically adsorbed to the object to form the silicon rich chemisorption layer on the object. do. Meanwhile, the second portion of the first gas is physically adsorbed to the object or the silicon rich chemisorption layer or remains in the reaction chamber. As such, the second portion of the first gas that is physically adsorbed or remains serves as an impurity or contaminant to reduce the purity of the silicon rich chemisorption layer formed on the object.

The second portion of the first gas remaining from the silicon rich chemisorption layer, the object, and the reaction chamber is removed (step S120). According to an embodiment of the present invention, the second portion of the first gas may be removed from the reaction chamber through a first pumping process. For example, by pumping the reaction chamber such that the pressure in the reaction chamber is about 1.0 Torr or less, the second portion of the first gas containing hexadichlorosilane (HCD) gas can be removed. In another embodiment of the present invention, the second portion of the first gas may be removed through a first purge process of purging the reaction chamber with the first purge gas. For example, the first purge gas includes an inert gas such as argon (Ar) gas, helium (He) gas, or nitrogen (N ₂ ) gas. In another embodiment of the present invention, the first pumping process and the first purge process may be performed simultaneously to remove a second portion of the first gas containing hexadichlorosilane (HCD) gas from the reaction chamber. have.

A second gas is supplied as a second reactive precursor onto the silicon rich chemisorption layer to form a silicon rich insulating layer on the object (step S130). As the second reactive precursor, the second gas contains oxygen. For example, the second gas includes nitrous oxide gas or oxygen gas. In this case, the silicon rich insulating layer corresponds to a silicon rich silicon oxide layer.

When the second gas is supplied onto the silicon rich chemisorption layer formed on the object, the silicon rich chemisorption layer and oxygen contained in the second gas are chemically reacted, thereby having a high silicon content on the object. A single silicon rich insulating layer having excellent step coatability is formed.

After the silicon rich insulating layer is formed on the object, the second unreacted gas remaining in the reaction chamber is removed from the reaction chamber (S140). In one embodiment of the present invention, the second gas remaining in the reaction chamber can be removed using the second pumping process. For example, the second chamber may be removed by pumping the reaction chamber so that the pressure in the reaction chamber is about 1.0 Torr or less. According to another embodiment of the present invention, the second gas remaining in the reaction chamber may be removed using a second purge process using the second purge gas. For example, the second purge gas includes an inert gas such as argon gas, helium gas, or nitrogen gas. According to another embodiment of the present invention, the second pumping process and the second purge process may be performed simultaneously to remove the unreacted second gas from the reaction chamber.

Referring back to FIG. 4, supplying the first gas (S110), removing the remaining first gas (S120), supplying the second gas (S130), and the remaining second gas. The silicon content in the silicon rich insulating layer is controlled by repeatedly performing at least one or more first cycles (I) of the atomic layer deposition process including removing the gas (S140). That is, the silicon richness of the silicon rich insulating layer is controlled by controlling the number of repetitions of the first cycle I.

When the number of repetitions of the first cycle I is small, the silicon rich insulating layer may lose its function as an electrical insulating layer because the silicon content in the silicon rich insulating layer becomes too high. Accordingly, the number of repetitions of the first cycle I is controlled to properly maintain the silicon content in the silicon rich insulating layer. For example, the first cycle I may be repeatedly performed about 5 to 10 times to form a silicon rich insulating layer having an appropriate silicon content on the object.

After the first cycle (I) of the atomic layer deposition process is repeatedly performed, a third gas containing a second silicon compound containing silicon and hydrogen as a third reactive precursor is supplied into the reaction chamber to supply the third gas. A silicon nano-crystal layer is formed on the rich insulating layer (step S150). For example, the third gas contains a silane gas. When the third gas is supplied onto the silicon rich insulating layer, a portion of the silicon rich insulating layer is changed into the silicon nano-crystal layer by reacting the silicon rich insulating layer and the third gas. At the same time, the third gas desorbs unwanted components such as chlorine (Cl) adsorbed on the silicon rich insulating layer. When the silicon rich insulating layer is a silicon rich silicon oxide layer, the silicon nano-crystal layer becomes a nano-crystal silicon oxide layer.

When using a first gas containing hexadichlorosilane (HCD) gas as the first reactive precursor and using a second gas containing oxygen as the second reactive precursor, the first cycle (I) is repeated several times. When the silicon rich insulating layer is deposited on the object, the silicon rich insulating layer no longer grows from a certain point in time. This is because the chlorine contained in the hexadichlorosilane (HCD) gas forms a covalent bond with silicon, thereby preventing further bonding of silicon atoms with silicon or oxygen atoms in a subsequent step.

If the silicon rich insulating layer fails to grow to have an appropriate thickness, the gap between the silicon nano-crystal layer and other silicon nano-crystal layers formed thereon becomes narrow. When applying a silicon rich nano-crystal structure comprising such silicon nano-crystal layers as a charge trapping structure of a nonvolatile semiconductor memory device, the desired trapped electrons trapped in adjacent silicon nano-crystal layers can be pushed or pulled together. The non-volatile memory device deteriorates the electrical characteristics of the nonvolatile memory device. In order to solve this problem, hexadichlorosilane (HCD) gas is used as the first reactive precursor and nitrous oxide gas or oxygen gas is used as the second reactive precursor to form a single silicon rich insulating layer in atomic layer units. Thereafter, the gas containing hydrogen (H) may be additionally provided to the single silicon rich insulating layer to desorb the chlorine component adsorbed on the silicon rich insulating layer.

For example, the process includes supplying hexadichlorosilane (HCD) gas, removing residual hexadichlorosilane (HCD) gas, supplying nitrous oxide gas, and removing unreacted nitrous oxide gas. When the cycle of the atomic layer deposition process is repeatedly performed about 80 times, a silicon rich silicon oxide layer having a thickness of about 106 kPa may be formed on the object. However, when the refractive index (R.I) of the silicon rich silicon oxide layer is measured, the silicon rich oxide layer is shown to have a low refractive index of about 1.77, it can be seen that the silicon content of the silicon rich silicon oxide layer is also low.

According to the present invention, the first cycle (I) of the atomic layer deposition process is repeatedly performed, followed by supplying a gas containing silicon atoms and hydrogen atoms to form a silicon nano-crystal layer on the silicon rich insulating layer. At the same time, by desorbing the chlorine component adsorbed on the silicon rich insulating layer, it is possible to effectively form a silicon rich insulating layer having a silicon rich degree required on the object.

When the silane gas is supplied to the third gas for about 8 seconds at a flow rate of about 0.5 L onto the object while maintaining the pressure in the reaction chamber at about 1.0 Torr, the silane gas reaches the surface of the silicon rich insulating layer. When decomposed into silicon (Si) and hydrogen (H) by the temperature of the object to form silicon nano-crystals on the silicon rich insulating layer. At the same time, the decomposed hydrogen reacts with chlorine adsorbed on the silicon rich insulating layer to form hydrogen chloride (HCl), thereby desorbing chlorine from the silicon rich insulating layer. At this time, by adjusting the flow rate of the silane gas, the size and density of the silicon nano-crystals in the silicon nano-crystal layer can be adjusted.

A silicon nano-crystal layer is formed on the silicon rich insulating layer, and an unwanted component is desorbed from the silicon rich insulating layer, and then an unreacted third gas remaining from the reaction chamber is removed (step S160). According to an embodiment of the present invention, the third unreacted gas may be removed from the reaction chamber through a third pumping process of pumping the pressure in the reaction chamber to be about 1 Torr or less. In another embodiment of the present invention, the third gas remaining in the reaction chamber is removed using a third purge process in which the reaction chamber is purged with a third purge gas containing an inert gas such as argon, helium, nitrogen, or the like. can do. According to another embodiment of the present invention, the third pumping process and the third purge process may be simultaneously performed to remove the unreacted third gas from the reaction chamber. Accordingly, a silicon rich nano-crystal structure including a single silicon rich insulating layer and a single silicon nano-crystal layer is formed on the object.

Referring to FIG. 4 again, supplying a first gas until the silicon rich nano-crystal structure has a desired thickness (S110), removing a remaining first gas (S120), and supplying a second gas. The step S130, removing the remaining second gas (S140), supplying the third gas (S150), and removing the remaining third gas (S160). Repeat cycle 2 (II). Accordingly, a silicon rich nano-crystal structure having a structure in which a plurality of silicon rich insulating layers and a plurality of silicon nano-crystal layers are repeatedly stacked alternately with each other is formed on the object.

Thereafter, the object on which the silicon rich nano-crystal structure having the desired thickness is formed is unloaded from the reaction chamber (step S170).

According to an embodiment of the present invention, the silicon rich nano-crystal structure is heat-treated to increase the amount of silicon nano-crystals in the silicon rich nano-crystal structure. For example, the heat treatment process is performed for about 10 to 90 minutes in a gas atmosphere containing nitrogen at a temperature of about 800 to 1,100 ℃. In addition, the heat treatment process may prevent the formation of unwanted charge trap sites in the silicon rich nano-crystal structure. Meanwhile, when the silicon rich nano-crystal structure having undergone the heat treatment process is used as a charge trapping structure of the nonvolatile semiconductor device, the writing and erasing operation speed of the nonvolatile semiconductor device can be improved. . For example, the speed of the write operation and the erase operation of the nonvolatile semiconductor device including the heat-treated silicon rich nano-crystal structure as the charge trapping structure as described above is increased by about 1.5 to 2.0 times as compared with the case without heat treatment. Done.

According to another embodiment of the present invention, by performing a preliminary oxidation process for the silicon rich nano-crystal structure in an atmosphere containing nitrogen and oxygen, it is possible to prevent the silicon rich nano-crystal structure from being excessively oxidized in a subsequent process. The data retention capability of the nonvolatile semiconductor device including the silicon rich nano-crystal structure as a charge trapping structure can be improved.

According to another embodiment of the present invention, a flash annealing process may be performed on the silicon rich nano-crystal structure to increase the amount of silicon nano-crystals of the silicon rich nano-crystal structure. For example, the flash annealing process is performed for about 5 to 20 msec while maintaining the object at a temperature of about 20 to 500 ° C. In addition, when the silicon rich nano-crystal structure subjected to the flash annealing process is applied to the charge trapping structure of the nonvolatile semiconductor device, the write and erase operation speed and the data retention of the nonvolatile semiconductor device can be improved. For example, a nonvolatile semiconductor device including the silicon rich nano-crystal structure, which has undergone the flash annealing process, as a charge trapping structure, has a write and erase operation speed about 10 to 20% higher than that without the flash process. Has

According to the present invention, the step of supplying the first gas (S110), the step of removing the remaining first gas (S120), the step of supplying the second gas (S130) and removing the remaining second gas ( The first cycle I consisting of S140 is repeatedly performed several times to form a silicon rich insulating layer. Subsequently, after performing the step of supplying the third gas (S150) and the step of removing the remaining third gas (S160), the step of supplying the third gas to the first cycle (S150) and remaining The second cycle II to which the third gas removing step S160 is added is repeatedly performed to form the silicon rich nano-crystal structure. After forming the silicon nano-crystal layer on the silicon rich insulating layer having the appropriate silicon content and desorbing the chlorine adsorbed in the silicon rich insulating layer, the silicon rich insulation having the appropriate thickness again on the silicon nano-crystal layer. By forming the layer, not only can the silicon content in the silicon rich nano-crystal structure be greatly increased, but the thickness of the silicon rich nano-crystal structure can be uniformly controlled.

Table 1 shows the results of measuring the thickness and refractive index of the silicon rich nano-crystal structures according to the number of repetitions of the first cycle (I) and the second cycle (II) of the atomic layer deposition process.

Number of repetitions of the first cycle (I) Number of repetitions of the second cycle (II) Thickness Refractive Index (R.I) 3 10 74 2.14 5 10 80 2.13 10 10 83 2.09 15 10 91 2.11

As shown in Table 1, it can be seen that each of the silicon rich nano-crystal structures formed according to the present invention has a high silicon content because they all have high refractive indices of 2.0 or more. However, since the silicon rich insulating layer is repeatedly formed by repeatedly performing the first cycle (I), the silane gas is supplied for the formation of the silicon nano-crystal layer and the chlorine desorption, thereby increasing the thickness of the silicon rich insulating layer. There may be a limit to this. That is, even if the first cycle I is repeatedly performed ten or more times, the thickness of the silicon rich insulating layer may not increase substantially. This is considered to be because silane gas alone does not sufficiently desorb chlorine from the silicon rich insulating layer. Therefore, in order to increase the thickness of the silicon rich insulating layer, a gas for chlorine desorption may be required in addition to the gas containing silicon.

5 is a process flowchart illustrating a method of forming a silicon rich nano-crystal structure using an atomic layer deposition process according to another embodiment of the present invention.

Referring to FIG. 5, an object such as a semiconductor substrate or a metal oxide single crystal substrate is loaded into a reaction chamber of an atomic layer deposition facility (step S200). At this time, the temperature in the reaction chamber is maintained at about 600 ~ 650 ℃.

Into the reaction chamber, a first reaction gas including a first silicon compound having at least two silicon atoms as a first reactive precursor is provided to form a silicon rich chemisorption layer on the object (step S210). For example, the first gas includes hexachlorodisilane gas. The first portion of the first gas is chemically adsorbed to the object to form the silicon rich chemisorption layer, but the second portion of the first gas is physically adsorbed to the object or the silicon rich chemisorption layer or It remains in the reaction chamber.

The second portion of the first gas is removed from the reaction chamber (step S220). The second portion of the first gas is removed from the reaction chamber using a first pumping process, a first purge process, or a combination of the first pumping process and the first purge process. For example, the pressure in the reaction chamber is pumped to be about 1 Torr or less, or the reaction chamber is purged with an inert gas such as argon gas, helium gas, or nitrogen gas, or the above-described pumping and purging are performed at the same time. A second portion of one gas is removed from the reaction chamber.

A second gas containing oxygen is provided on the silicon rich chemisorption layer as a second reactive precursor to form a silicon rich insulating layer on the object (step S230). For example, the second gas includes oxygen gas or nitrous oxide gas. The silicon rich insulating layer is formed on the object according to the reaction of the second gas and the silicon rich chemisorption layer. Therefore, the silicon rich insulating layer has a high silicon content and excellent step coverage.

The unreacted second gas remaining in the reaction chamber is removed through a second pumping process, a second purge process, or a process combining the second pumping process and the second purge process (step S240). For example, the reaction chamber may be pumped so that the pressure in the reaction chamber is 1 Torr or less, or the reaction chamber is purged using a second purge gas containing an inert gas, or the pump and purge may be performed simultaneously. 2 gases are removed from the reaction chamber.

A third gas containing hydrogen is introduced into the reaction chamber to remove unwanted components adsorbed in the silicon rich insulating layer (step S250). For example, the third gas includes ammonia gas, hydrogen gas, or deuterium gas, and hydrogen contained in the third gas reacts with chlorine adsorbed to the silicon rich insulating layer to form hydrogen chloride, thereby forming the silicon rich. Unwanted components are removed from the insulating layer.

In one embodiment of the present invention, when the third gas includes hydrogen and nitrogen, and the silicon rich insulating layer is a silicon rich silicon oxide layer, nitrogen included in the third gas may include silicon of the silicon rich insulating layer. The reaction forms strong silicon-nitrogen (Si-N) bonds while reducing silicon dangling bonds. Accordingly, the silicon rich silicon oxide layer is changed into a silicon rich silicon oxynitride layer. Silicon-nitrogen bonds in such a silicon rich silicon oxynitride layer can reduce the formation of unwanted charge trap sites in the silicon rich silicon oxynitride layer while improving the durability against heat or stress of the silicon rich silicon oxynitride layer. .

After removing the unwanted material from the silicon rich insulating layer, an unreacted third gas remaining in the reaction chamber is removed from the reaction chamber (step S260). Similar to the foregoing, the remaining third gas is removed from the reaction chamber using a third pumping process, a third purge process, or a combination of the third pumping process and the third purge process. For example, the reaction chamber may be pumped such that the pressure in the reaction chamber is about 1 Torr or less, or the reaction chamber is purged with a third purge gas containing an inert gas, or the pumping and purging are performed simultaneously. The third gas remaining inside is removed.

Supplying the first gas (S210), removing the remaining first gas (S220), supplying the second gas (S230), removing the remaining second gas (S240) ), By repeatedly performing the third cycle (III) cycle of the atomic layer deposition process consisting of supplying the third gas (S250) and removing the remaining third gas (S260). To adjust the silicon content of the silicon rich insulating layer. When the number of repetitions of the third cycle (III) of the atomic layer deposition process is small, the silicon content in the silicon rich insulating layer may be so high that the electrical insulating properties of the silicon rich insulating layer may be degraded. III) is repeated 5 to 10 times.

Referring back to FIG. 5, after repeatedly performing the third cycle (III), the silicon nano-crystal layer on the silicon rich insulating layer is supplied to the reaction chamber by supplying a fourth gas containing a second silicon compound. (Step S270). For example, the fourth gas includes silane gas. Here, the size and density of the silicon nano-crystals in the silicon nano-crystal layer may be controlled by adjusting the flow rate of the fourth gas.

The unreacted fourth gas remaining in the reaction chamber is removed using a fourth pumping process, a fourth purge process, or a process combining a fourth pumping process and a fourth purge process (step S280). For example, the pump may be pumped so that the pressure in the reaction chamber is about 1 Torr or less, or the reaction chamber is purged with a fourth purge gas containing an inert gas, or the pump and purge are performed simultaneously to remove the remaining fourth gas. do. Accordingly, a silicon rich nano-crystal structure including the silicon rich insulating layer and the silicon nano-crystal layer is formed on the object.

Supplying the first gas (step S210), removing the remaining first gas (S220), and supplying the second gas until the silicon rich structure has a required thickness (S230). ), A third cycle (III) including removing the remaining second gas (S240), supplying the third gas (S250), and removing the remaining third gas (S250). After repeating several times, the fourth cycle of the atomic layer deposition process comprising the step of supplying the third cycle (III) and the fourth gas (S270) and removing the remaining fourth gas (S280) Repeat (IV). Therefore, a silicon rich nano-crystal structure having a desired thickness is formed on the object.

When the silicon rich nano-crystal structure has the required thickness, the object on which the silicon rich nano-crystal structure is formed is unloaded from the reaction chamber (step S290).

According to one embodiment of the invention, to increase the amount of silicon nano-crystals in the silicon rich nano-crystal structure and to prevent the formation of unwanted charge trap sites in the silicon rich nano-crystal structure The silicon rich nano-crystal structure can be heat treated. When the silicon rich nano-crystal structure, which has undergone such heat treatment, is used as the charge trapping structure of the nonvolatile semiconductor device, the write and erase speeds of the nonvolatile semiconductor device can be improved. According to another embodiment of the present invention, by performing a preliminary oxidation process for the silicon rich nano-crystal structure to prevent excessive oxidation of the silicon rich nano-crystal structure in a subsequent process, the silicon rich nano-crystal The data preservation capability of the nonvolatile semiconductor device including the structure as a charge trapping structure can be improved. According to another embodiment of the present invention, a flash annealing process may be performed on the silicon rich nano-crystal structure to increase the amount of silicon nano-crystals of the silicon rich nano-crystal structure. When the silicon rich nano-crystal structure subjected to the flash annealing process is applied to the charge trapping structure of the nonvolatile semiconductor device, the write and erase operation speed and data retention of the nonvolatile semiconductor device can be improved.

As described above, alternately repeating a process of forming an atomic layer of a single silicon rich insulating layer and a process of desorbing unwanted components in the silicon rich insulating layer, overcome the limitation of increasing the thickness of the silicon rich insulating layer. can do. In other words, the thickness of the silicon rich insulating layer may be further increased by controlling the number of repetitions of the third cycle (III) of the atomic layer deposition process.

Table 2 below shows the results of measuring thickness and refractive index of the silicon rich nano-crystal structures according to the number of repetitions of the third cycle (III) and the fourth cycle (IV) of the atomic layer deposition process.

Number of repetitions of the third cycle (III) Number of repetitions of the fourth cycle (IV) Thickness Refractive Index (R.I) 2 10 70 2.33 5 10 75 2.29 10 10 95 2.32

As shown in Table 2, the silicon-rich nano-crystal structures of the silicon-rich nano-crystal structures, because all of the silicon-rich nano-crystal structures from which unwanted components have been removed using the gas containing hydrogen, all have a very high refractive index of 2.2 or more. Richness is also very high.

As described above, after repeatedly performing the third cycle (III), which includes a process of forming a single silicon rich insulating layer and a process of desorbing unwanted components in the single silicon rich insulating layer, the silicon rich insulating layer is repeatedly performed. Since the silicon nano-crystal layer is formed on it, the thickness increase limit of the silicon rich nano-crystal structure can be overcome. That is, the thickness of the silicon rich nano-crystal structure may be increased in proportion to the number of repetitions of the third cycle (III).

Table 3 shows the results of measuring the silicon (Si), oxygen (O) and nitrogen (N) content and refractive index in the conventional silicon oxide layer, the silicon rich silicon oxide layer and the silicon rich silicon oxynitride layer according to the present invention. The silicon, oxygen and nitrogen contents were analyzed by X-ray photoelectron spectroscopy (XPS).

Refractive index Silicon content Oxygen content Nitrogen content Conventional silicon oxide layer 1.46 33.3% 64.7% 0.0% Silicon Rich Silicon Oxide Layer 2.13 49.1% 46.4% 0.0% Silicon rich silicon oxynitride layer (A) 2.36 44.2% 32.9% 18.1% Silicon rich silicon oxynitride layer (B) 2.37 44.6% 38.2% 12.5% Silicon rich silicon oxynitride layer (C) 2.36 45.0% 41.1% 7.7%

In Table 3, the conventional silicon oxide layer was formed using silane gas. The silicon rich silicon oxide layer may be performed by repeating five times of a first cycle including supplying hexadichlorosilane gas and supplying nitrous oxide gas, and then supplying silane gas and performing a first cycle. It was formed by performing a repeating second cycle containing 10 times. The silicon rich silicon oxynitride layers are subjected to five times of a third cycle consisting of supplying hexadichlorosilane gas, supplying nitrous oxide gas, and supplying ammonia gas, and then supplying silane gas. And a fourth cycle including the third cycle is repeated five times. Here, the silicon rich silicon oxynitride layers A, B, and C are classified according to the flow rate of the ammonia gas. That is, the silicon rich silicon oxynitride layer (A) shows the case where the flow rate of ammonia gas is the highest, and the silicon rich silicon oxynitride layer (C) corresponds to the case where the flow rate of the ammonia gas is the lowest, and the silicon rich silicon oxynitride Layer (B) shows that the flow rate of ammonia gas is moderate.

As shown in Table 3 above, in the conventional silicon oxide layer using silane gas, the ratio between the silicon content and the oxygen content is about 1: 2. In addition, the conventional silicon oxide layer exhibits a low refractive index of about 1.46. On the other hand, the silicon content and oxygen content in the silicon rich silicon oxide layer according to the present invention are almost similar, and the silicon rich silicon oxide layer according to the present invention has a relatively high refractive index of about 2.13. In addition, the silicon rich silicon oxynitride layers (A, B, C) according to the present invention have a high refractive index of about 2.36 to about 2.37, and the silicon rich silicon oxynitride layers (A, While the oxygen content and nitrogen content in B, C) change, the silicon content appears almost uniform. Therefore, in order to optimize the nitrogen content in the silicon rich silicon oxynitride layer by adjusting the flow rate of ammonia gas, unwanted charge trap sites in the silicon rich silicon oxynitride layer are reduced by forming silicon-nitrogen (Si-N) bonds. It is possible to form a silicon rich silicon oxynitride layer having stable electrical properties.

Manufacturing method of nonvolatile semiconductor device

6 to 8 are cross-sectional views illustrating a method of manufacturing a nonvolatile semiconductor device in accordance with an embodiment of the present invention.

Referring to FIG. 6, the device isolation layer 205 is formed on a substrate 200 such as a silicon wafer or an SOI substrate to divide the substrate 200 into an active region and an isolation region. For example, the device isolation layer 205 is formed using a shallow trench device isolation (STI) process or a thermal oxidation process.

A tunnel dielectric layer 205 is formed over the active region of the substrate 200. According to one embodiment of the invention, tunnel dielectric layer 205 is formed using a silicon compound, such as silicon oxide or silicon oxynitride. In another embodiment of the present invention, the tunnel dielectric layer 205 is formed using a metal oxide having a high dielectric constant such as hafnium oxide, zirconium oxide, aluminum oxide, or the like.

Referring to FIG. 7, a charge trapping layer 230 corresponding to the silicon rich nano-crystal structure is formed on the tunnel dielectric layer 205. The charge trapping structure 230 includes a plurality of silicon rich layers 215, 216, 217 and a plurality of silicon nano-crystal layers 220, 221.

As described above, the charge trapping structure 230 according to an embodiment of the present invention is an atomic layer deposition process using a first gas containing hexadichlorosilane (HCD) gas and a second gas containing oxygen It is formed by repeatedly performing the second cycle of the atomic layer deposition process additionally using the first cycle and the third gas containing silicon. In addition, the charge trapping structure 230 according to another embodiment of the present invention uses a first gas containing hexadichlorosilane (HCD) gas, a second gas containing oxygen and a third gas containing hydrogen. It is formed by repeatedly performing the third cycle of the atomic layer deposition process and the fourth cycle of the atomic layer deposition process additionally using a fourth gas containing silicon.

In the charge trapping structure 230 according to the present invention, the silicon nano-crystal layers 220 and 221 play substantially the same role as the floating gate of the conventional nonvolatile semiconductor device.

According to one embodiment of the present invention, the charge trap is increased to increase the amount of silicon nano-crystals in the charge trapping structure 230 and to prevent unwanted charge trap sites from forming in the charge trapping structure 230. By heat-treating the lapping structure 230, the writing and erasing operation speed of the nonvolatile semiconductor device including the charge trapping structure 230 which has undergone the heat treatment process can be improved. According to another embodiment of the present invention, by performing a preliminary oxidation process for the charge trapping structure 230, it is possible to prevent the charge trapping structure 230 is excessively oxidized in a subsequent process, the nonvolatile semiconductor device Improve data retention capabilities. According to another embodiment of the present invention, the flash annealing process may be performed on the charge trapping structure 230 to increase the amount of silicon nano-crystals, and the write and erase operation speed and data of the nonvolatile semiconductor device may be performed. Improved retention

Referring to FIG. 8, a blocking dielectric layer 235 is formed on the charge trap layer 106. The blocking dielectric layer 235 serves to prevent charges from moving from the control gate 240 formed thereon to the charge trapping structure 230. The blocking dielectric layer 235 is formed using a silicon compound such as silicon oxide or silicon oxynitride. In addition, the blocking dielectric layer 235 may be formed using a metal oxide having a high dielectric constant such as hafnium oxide, zirconium oxide, or aluminum oxide.

Control gate 240 is formed using a conductive material on blocking dielectric layer 235. The control gate 240 is formed using polysilicon, metal or metal nitride doped with impurities. Impurities are implanted into the substrate 200 adjacent to the control gate 240 to form source / drain regions to complete the nonvolatile semiconductor device on the substrate 200.

Hereinafter, a programming operation, a reading operation, and an erasing operation of the nonvolatile semiconductor device having the above-described structure will be described.

In the programming operation of the nonvolatile semiconductor device according to an embodiment of the present invention, a voltage is applied to the control gate 240 and the source region and the drain region is grounded. Accordingly, hot electrons are generated near the source region, and the generated hot electrons move beyond the energy barrier of the tunnel dielectric layer 205 into the plurality of silicon nano-crystal layers 220 and 221 near the source region. As hot electrons are injected into the silicon nano-crystal layers 220 and 221, a threshold voltage of the nonvolatile semiconductor device increases, and data is written to the nonvolatile semiconductor device.

Since the silicon nano-crystal layers 220, 221 are electrically spaced from each other by the silicon rich insulating layers 215, 216, 217, any one of the programming operation silicon nano-crystal layers 220, 221 may be used. The injected electrons do not move to the other of the silicon nano-crystal layers 220 and 221.

In the programming operation of the nonvolatile semiconductor device according to another embodiment of the present invention, the source region and the drain region are grounded and the FN tunneling phenomenon of applying a voltage to the control gate 240 and the substrate 200 is performed. Data can be recorded in the nonvolatile semiconductor device. In this case, electrons are uniformly injected into the plurality of silicon nano-crystal layers 220 and 221 by the F-N tunneling phenomenon.

In a read operation of the nonvolatile semiconductor device, a voltage is applied to the control gate 240 and the drain region and the source region is grounded. At this time, the gate voltage Vg applied to the control gate 240 is lower than the threshold voltage when hot electrons are injected into the plurality of silicon nano-crystal layers 220 and 221. Therefore, since channel current does not flow in the memory cell in which electrons are injected into the silicon nano-crystal layers 220 and 221, data of "0" is obtained in such a memory cell. On the other hand, in a memory cell in which electrons are not injected into the silicon nano-crystal layers 220 and 221, the channel is turned on by the gate voltage so that channel current flows. Accordingly, data of "1" is obtained in the memory cell in which electrons are not injected into the silicon nano-crystal layers 220 and 221.

In one embodiment of the present invention, the erase operation of the nonvolatile semiconductor device is performed using a hot hole injection method. Specifically, when a negative voltage is applied to the control gate 240 to generate thermal holes near the source region, the generated thermal holes are energy of the tunnel dielectric layer 210 by the voltage applied to the control gate 240. The barrier moves within the silicon nano-crystal layers 220 and 221 near the source region. Thermal holes injected into the silicon nano-crystal layers 220 and 221 remove electrons in the silicon nano-crystal layers 220 and 221 to delete data from the nonvolatile semiconductor device.

According to another exemplary embodiment of the present disclosure, the erase operation of the nonvolatile semiconductor device may be performed by applying a negative voltage to the control gate 240 and applying a positive voltage to the substrate 200 in an FN tunneling scheme. have. In this case, electrons injected into the silicon nano-crystal layers 220 and 221 are erased by F-N tunneling, thereby deleting data from the nonvolatile semiconductor device.

As described above, according to the present invention, the silicon rich insulating layers and the silicon rich nano-crystal layers through the atomic layer deposition process using a gas that can extend the range of change of the silicon content, including the high silicon content and excellent step coating A silicon rich nano-crystal structure can be formed. In addition, it is possible to improve the speed of writing and erasing operations of the nonvolatile semiconductor device including the silicon rich nano-crystal structure as the charge trapping structure, and at the same time improve the data retention of the nonvolatile semiconductor device.

Although the above has been described with reference to preferred embodiments of the present invention, those skilled in the art will be able to vary the present invention without departing from the spirit and scope of the invention as set forth in the claims below. It will be appreciated that modifications and variations can be made.

Claims (35)

Providing a first gas comprising a first silicon compound on the object to form a silicon rich chemisorption layer on the object; Providing a second gas containing oxygen on the silicon rich chemisorption layer to form a silicon rich insulating layer on the object; And Forming a silicon nano-crystal layer on the silicon rich insulating layer by providing a third gas including a second silicon compound on the silicon rich insulating layer, using the silicon rich nano-crystal using the atomic layer deposition process. Method of forming the structure. The method of claim 1, wherein the first silicon compound comprises two silicon atoms. 3. The method of claim 2, wherein the first silicon compound comprises hexadichlorosilane (HCD). 4. The method of claim 1, wherein the second gas comprises nitrous oxide gas or oxygen gas. The method of claim 1, wherein the second silicon compound comprises silicon and hydrogen. 6. The method of claim 5, wherein the second silicon compound comprises silane. 7. The atomic layer stacking process of claim 1, wherein the forming of the silicon rich insulating layer and the forming of the silicon rich insulating layer are repeatedly performed to adjust the silicon content of the silicon rich insulating layer. Method of forming a silicon rich nano-crystal structure using. The silicon rich nano-crystal structure of claim 1, wherein the size and density of the silicon nano-crystals in the silicon nano-crystal layer are controlled by controlling the flow rate of the third gas. Method of formation. The method of claim 1, wherein the forming of the silicon rich chemisorption layer, the forming of the silicon rich insulating layer, and the forming of the silicon nano-crystal layer are repeatedly performed. A method for forming a silicon rich nano-crystal structure using an atomic layer deposition process, comprising forming silicon rich insulating layers and a plurality of silicon nano-crystal layers interposed between the silicon rich insulating layers. The silicon rich nano-crystal structure of claim 1, further comprising removing unwanted material from the silicon rich insulating layer before forming the silicon nano-crystal layer. Method of formation. 11. The method of claim 10, wherein removing the unwanted material from the silicon rich insulating layer comprises providing a gas containing hydrogen onto the silicon rich insulating layer. Method of Forming Rich Nano-Crystal Structures. The method of claim 11, wherein the hydrogen-containing gas comprises ammonia gas, hydrogen gas, or deuterium gas. The method of claim 1, further comprising heat treating the silicon rich nano-crystal structure. The silicon rich nano-crystal structure of claim 13, wherein the silicon rich nano-crystal structure is heat-treated for 10 to 90 minutes at a temperature of 800 to 1,100 ° C. under an atmosphere containing nitrogen. Method of formation. The method of claim 1, further comprising pre-oxidizing the silicon rich nano-crystal structure. 16. The method of claim 15, wherein the silicon rich nano-crystal structure is pre-oxidized under an atmosphere containing nitrogen and oxygen. 2. The method of claim 1, further comprising flash annealing the silicon rich nano-crystal structure. The method of claim 17, wherein the silicon rich nano-crystal structure of the silicon rich nano-crystal structure using an atomic layer deposition process characterized in that the object is maintained at a temperature of 20 to 500 ℃ and flash annealed for 5 to 20msec. Forming method. Forming a tunnel dielectric layer on the substrate; Forming a charge trapping structure on the tunnel dielectric layer through an atomic layer deposition process; And Forming a control gate on the charge trap structure, The forming of the charge trapping structure may include providing a first gas containing a first silicon compound on the tunnel dielectric layer to form a silicon rich chemisorption layer on the tunnel dielectric layer. Providing a second gas comprising oxygen onto the tunnel dielectric layer to form a silicon rich insulating layer on the tunnel dielectric layer, and providing a third gas comprising a second silicon compound onto the silicon rich insulating layer to provide the silicon rich insulating layer. A method of manufacturing a nonvolatile semiconductor device using an atomic layer deposition process, comprising: forming a silicon nano-crystal layer on an insulating layer. 20. The method of manufacturing a nonvolatile semiconductor device using an atomic layer deposition process according to claim 19, wherein the first silicon compound and the second silicon compound are different from each other. 21. The method of claim 20, wherein the first silicon compound comprises two silicon atoms. 21. The method of manufacturing a nonvolatile semiconductor device using an atomic layer deposition process according to claim 20, wherein the second silicon compound contains one silicon atom and hydrogen. 21. The method of claim 20, wherein the first silicon compound comprises hexadichlorosilane and the second silicon compound comprises silane. 20. The method of manufacturing a nonvolatile semiconductor device using an atomic layer deposition process according to claim 19, wherein the second gas comprises nitrous oxide gas or oxygen gas. The atomic layer deposition process of claim 19, wherein the forming of the silicon rich insulating layer and the forming of the silicon rich insulating layer are repeatedly performed to control the silicon content of the silicon rich insulating layer. A method of manufacturing a nonvolatile semiconductor device using the same. The method of claim 19, wherein the size and density of the silicon nano-crystals in the silicon nano-crystal layer are controlled by adjusting the flow rate of the third gas. . 20. The method of claim 19, wherein the forming of the silicon rich chemisorption layer, the forming of the silicon rich insulating layer, and the forming of the silicon nano-crystal layer are repeatedly performed to recover the plurality of layers on the tunnel dielectric layer. Forming a charge trapping structure comprising two silicon rich insulating layers and a plurality of silicon nano-crystal layers interposed between the silicon rich insulating layers. Manufacturing method. 20. The method of claim 19, further comprising removing unwanted material from the silicon rich insulating layer before forming the silicon nano-crystal layer. Way. 29. The method of claim 28, wherein removing the unwanted material from the silicon rich insulating layer comprises providing a gas comprising hydrogen onto the silicon rich insulating layer. Method of manufacturing volatile semiconductor device. 30. The method of manufacturing a nonvolatile semiconductor device using an atomic layer deposition process according to claim 29, wherein the gas containing hydrogen includes ammonia gas, hydrogen gas or deuterium gas. 20. The method of claim 19, further comprising heat treating the charge trapping structure in an atmosphere containing nitrogen. The method of claim 19, further comprising pre-oxidizing the charge trapping structure under an atmosphere containing nitrogen and oxygen. 20. The method of claim 19, further comprising flash annealing the charge trapping structure for 5-20 msec. 20. The method of claim 19, further comprising forming a blocking dielectric layer on the charge trapping structure prior to forming the control gate. 35. The method of claim 34, wherein the blocking dielectric layer is formed using a silicon compound or a metal oxide.

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