KR100712211B1 - Tft and oled using the same - Google Patents

Abstract

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a thin film transistor and to an organic light emitting display device using the same. A thin film transistor and a organic light emitting display device using the same have a threshold voltage (V _th ) and a predetermined level of S-factor by channel doping the negative first thin film transistor.

Channel doping, S-factor, PMOS first thin film transistor, gradation expression

Description

Thin film transistor and organic light emitting display device using the same {TFT and OLED using the same}

1 is a plan view of a unit pixel of an organic light emitting display device according to an exemplary embodiment of the present invention.

FIG. 2 is a cross-sectional view of the unit pixel of FIG. 1 taken along line AA ′, and is a cross-sectional view of the organic light emitting display device according to the present invention.

3A to 3H are cross-sectional views sequentially illustrating a process of manufacturing an organic light emitting display device according to an exemplary embodiment of the present invention.

4A and 4B are graphs showing V _th and S-factor changes when channel doping a PMOS thin film transistor.

               <Explanation of symbols for the main parts of the drawings>

1. Scan Line 2. Data Line

3. Common Power Line 5. Switching Thin Film Transistor

6. Driving thin film transistor 7. Capacitor

8. Lower electrode 9. Pixel part

100. Substrate 110. Buffer layer

120. Gate insulating films 130a and 130b. Semiconductor layer

132a, 132b. Source regions 134a, 234b. Channel area

136a, 136b. Drain regions 138a and 138b. Gate electrode

140. Interlayer insulating film 150. Flattening film

152a, 252b. Source electrodes 154a and 254b. Drain electrode

156a, 156b. Contact hole 165. Via hole

170. Lower electrode 180. Pixel defining layer pattern

190. Organic film 200, upper electrode

I. Pixel part II. Circuit

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a thin film transistor and an organic light emitting display device using the same. In a thin film transistor having a circuit portion and a pixel portion, channel doping is performed on a pixel portion to form amorphous silicon on a substrate and obtain different characteristics from the circuit portion and the pixel portion. The present invention relates to a thin film transistor having a channel doping and having a threshold voltage V _th and a predetermined level of S-factor, and an organic light emitting display device using the same.

In general, an organic light emitting display device (OLED) is a self-luminous display device that electrically excites a fluorescent organic compound to emit light. A passive matrix method and an active matrix method are used according to a method of driving pixels. It is divided into (active matrix) method. The active matrix method is characterized in that the unit pixel driving circuit for driving the current or voltage of the pixel is arranged for each pixel, and the power consumption is lower than that of the passive matrix method. There is an advantage.

In general, circuits using a CMOS Metal Thin Film Transistor (CMOS TFT) include an Active Matrix Liquid Crystal Display (AMLCD), an Active Matrix Organic Electro Luminescence Display; It is used to drive Active Matrix Flat Panel Display such as OLED) and image sensor.

At this time, the NMOS thin film transistor used as the transistor of the circuit portion of the active matrix flat panel display device and the switching transistor of the pixel portion and the PMOS thin film transistor used as the driving thin film transistor have different required characteristics.

Particularly, in the active matrix organic light emitting display device, the circuit portion and the switching thin film transistor have a low threshold voltage and the slope inverse of the source / drain current graph curve according to the change of the gate voltage indicating the electrical characteristics of the thin film transistor. Factors require large characteristics. On the contrary, the requirements of the pixel portion thin film transistors are reversed.

In order to solve the above problem, a method of fabricating a thin film transistor by forming a polysilicon film thicker than the polysilicon film of the circuit part to produce a thin film transistor to change the characteristics of the thin film transistor of the pixel part and the circuit part has been proposed. In the method of forming different positions for each location, an additional process is introduced, and the process is complicated. In addition, many problems have to be controlled to reduce only the characteristics of the driving thin film transistor.

The present invention is to solve the above problems of the prior art, in the first and second thin film transistors having a pixel portion and a circuit portion to form amorphous silicon on the substrate and to obtain different characteristics of the circuit portion and the pixel portion By channel doping the first thin film transistor (channel dopping) to have a threshold voltage (V _th ) and a certain level of the S-factor (factor) value in the circuit portion to have a low S-factor (factor) in the circuit section, to facilitate the circuit drive, In the pixel portion, the slope of the S-factor is higher than that of the circuit portion, and the threshold voltage of the driving transistor is -1.2V to -3.8V to secure the voltage compensation effect. There is an object of the present invention to obtain.

In order to achieve the above object, a thin film transistor and an organic light emitting display device using the same according to the present invention,

A substrate having a pixel portion and a circuit portion;

A first thin film transistor positioned in the pixel portion; And

And a second thin film transistor positioned on the circuit unit.

The first thin film transistor is electrically connected to the pixel electrode of the pixel portion, and the channel region of the first thin film transistor is doped with an impurity;

The impurities are n-type impurities,

The n-type impurities are phosphorus (P),

Phosphorus (P) is doped in a concentration of 5 * e ¹¹ to 10 * e ¹² atoms / cm ² ,

The first thin film transistor of the pixel portion has an S-factor of 0.33 to 0.45 V / dec,

The first thin film transistor of the pixel portion is a driving thin film transistor,

The driving thin film transistor is characterized in that the PMOS.

Hereinafter, with reference to the accompanying drawings, preferred embodiments of the present invention will be described in more detail. However, the present invention describes an active matrix top-emitting organic light emitting display device, but is not limited to the embodiments described herein, and the present invention is not limited to the scope of the present invention. Many variations and modifications will be possible to those skilled in the art.

1 is a plan view of a unit pixel of an organic light emitting display according to an exemplary embodiment of the present invention, and FIG. 2 is a cross-sectional view of the unit pixel of FIG. 1 taken along line AA ′, and according to an exemplary embodiment of the present invention. 3A to 3H are cross-sectional views sequentially illustrating a process of manufacturing an organic light emitting display device according to an embodiment of the present invention, and FIG. 4 is a view illustrating V _th and V _th when a PMOS thin film transistor is channel-doped. It is a graph showing the change of the S-factor.

Referring to FIG. 1, a scan line 1 arranged in one direction, a data line 2 intersecting while insulated from the scan line 1, and an intersecting line and insulated from the scan line 1 and cross the data line ( The common power supply line 3 is located parallel to 2). The scan line 1, the data line 2, and the common power supply line 3 represent one of a plurality of unit pixels, for example, one of red (R), green (G), and blue (B). Unit pixels are defined.

Accordingly, the unit pixel includes a data signal applied to the data line 2 according to a signal applied to the scan line 1, for example, a data voltage and a voltage difference applied to the common power supply line 3. The capacitor 7 which accumulates the charge and the signal generated by the charge accumulated in the capacitor 7 are input to the driving thin film transistor 6 through the switching thin film transistor 5. Subsequently, the driving thin film transistor 6 receiving the data signal sends an electrical signal to the pixel portion 9 having the organic layer between the lower electrode 8, the upper electrode, and the two electrodes to emit light.

In the organic light emitting display device, gray scale display of emission color is determined according to the amount of current supplied to the organic light emitting display device, and the current amount is a data signal applied to the gate electrode of the driving thin film transistor 6. That is, controlled by voltage.

First, referring to FIGS. 2 and 3A, the buffer layer 110 is formed to a predetermined thickness on the substrate 100 on which the pixel portion I and the circuit portion II are formed. In this case, the buffer layer 110 is formed by a method such as PECVD, LPCVD, sputtering, etc., which diffuses impurities or moisture in the substrate 100 during the crystallization process of the amorphous silicon layer formed in a subsequent process. To prevent them.

Next, after the buffer layer 110 is formed, an amorphous silicon layer (not shown) is deposited on the buffer layer 110 to a predetermined thickness by using a method such as PECVD, LPCVD, and sputtering. And a dehydrogenation process is performed in a vacuum furnace. When the amorphous silicon layer is deposited by LPCVD or sputtering, it may not be dehydrogenated.

The amorphous silicon layer is crystallized through a crystallization process of the amorphous silicon layer for irradiating high energy to the amorphous silicon layer to form a polysilicon layer (poly-Si). Preferably, crystallization processes such as ELA, MIC, MILC, SLS, and SPC are used as the crystallization process.

Next, as shown in FIG. 3B, the polysilicon layer is formed and then patterned to form semiconductor layers 130a and 130b in the region of the pixel portion I and the circuit portion II.

After the semiconductor layers 130a and 130b are formed, a photoresist is formed on the entire surface of the substrate 100 and exposed to expose the semiconductor layers 130a and 130b formed in the region of the pixel portion I and the circuit portion II. A photoresist pattern is formed.

The semiconductor layers 130a and 130b may be formed of an NMOS thin film transistor or a PMOS thin film transistor. In the present invention, the semiconductor layers 130a and 130b formed in the pixel portion I may be formed of a PMOS first thin film transistor. In order to provide conductivity to the PMOS first thin film transistor, channel doping is performed using a P-type dopant on the semiconductor layer 130a of the pixel portion I using the photoresist pattern as a mask.

In the pixel portion (I), the S-factor is 0.33 to 0.45V / dec for the gray scale expression, and a high S-factor is required compared to the circuit portion (II), and to secure the voltage compensation effect. The V _th (threshold voltage) of the first thin film transistor of the pixel portion I is required to be -1.2 V to -3.8 V. The P-type semiconductor layer 130a of the PMOS first thin film transistor of the pixel portion I is The dopant is channel-doped, and the concentration of the P-type dopant is 5 * e ¹¹ to 10 * e ¹² to have an S-factor of 0.33 to 0.45V / dec and V _th of -1.2V to -3.8V. do. By channel doping with the P-type dopant at the above concentration, the V _th of the PMOS first thin film transistor formed in the pixel portion I is -1.2V to -3.8V, and MURA is applied on the pixel portion I. The back is removed and the desired tone expression can be expressed.

4A illustrates a change in V _th according to channel doping of the PMOS first thin film transistor, and FIG. 4B illustrates S-factor according to channel doping of the PMOS first thin film transistor. In the PMOS first thin film transistor, when the channel doping is not performed, the S-factor is 0.3V / dec and V _th is -2V, and when the S-factor is 0.3V / dec, Although the minimum voltage interval is 10 mV, when 0.2 V / dec, the value is 5 to 6 mV, so the luminance unevenness due to the voltage drop in the cell is greatly generated, and gray scale expression becomes difficult. In addition, when the S-factor of the PMOS first thin film transistor of the pixel portion I is 0.5 V / dec or more, the driving range is increased, so that data values beyond the data IC output are required to be driven. Since the S-factor of the driving transistor of the thin film transistor is set to 0.33 to 0.45 V / dec, the concentration of P is 5 * e ¹¹ to 10 * e ¹² in the first thin film transistor of the pixel portion I. By channel type doping, desired thin film transistor characteristics can be secured. Thus, the present invention can form the first thin film transistor of the pixel portion I having a different characteristic from the second thin film transistor of the circuit portion II.

Next, after channel doping the semiconductor layers 130a and 130b of the pixel portion I and the circuit portion II, the photoresist pattern is removed and a gate insulating layer 120 is formed on the substrate 100. In this case, the gate insulating layer 120 may be formed using a silicon oxide layer (SiO ₂ ), a silicon nitride layer (SiN _x ), or a stacked structure thereof.

Subsequently, a single layer of an aluminum alloy such as aluminum (Al) or aluminum-neodymium (Al-Nd) on the gate insulating layer 120, or multiple aluminum alloys are laminated on a chromium (Cr) or molybdenum (Mo) alloy. A gate electrode metal layer (not shown) is formed as a layer, and the gate electrode metal layer is etched by a photolithography process to form gate electrodes 138a and 138b at predetermined portions corresponding to the semiconductor layers 130a and 130b. . Subsequently, the source regions 132a and 132b and the drain regions 136a and 136b are formed by using the gate electrodes 138a and 138b as masks and by doping a predetermined type of impurities. The region located between the source regions 132a and 132b and the drain regions 136a and 136b serves as the channel regions 134a and 134b. However, the doping process may be performed by forming a photoresist before forming the gate electrodes 138a and 138b.

Next, as shown in FIG. 3C, an inorganic insulating film is deposited on the substrate 100 to form an interlayer insulating film 140 having a predetermined thickness, and the interlayer insulating film 140 and the gate insulating film 120 are photo-etched. As a result, contact holes 156a, 156b, 158a, and 158b exposing portions of the source regions 132a and 132b and the drain regions 136a and 136b are formed. The inorganic insulating film is preferably a silicon oxide film so as to have high transmittance.

Subsequently, as illustrated in FIG. 3D, a conductive material is deposited on the interlayer insulating layer 140 including the contact holes 156a, 156b, 158a, and 158b, and then the conductive material is patterned to form contact holes 156a and 156b. Source electrodes 152a and 152b connected to source regions 132a and 132b and drain electrodes 154a and 136b connected to drain regions 136a and 136b through contact holes 158a and 158b. . In this case, molybdenum (MoW) or aluminum-neodymium (Al-Nd) may be used as the conductive material.

Next, as shown in FIG. 3E, the planarization film 150 is formed on the entire surface. The planarization film 150 is formed on the entire surface of the substrate 100 on which the source / drain electrodes 152a, 152b, 154a, and 154b are formed. 150).

Subsequently, a portion of the source electrode 152a or the drain electrode 154a formed in the pixel portion I, for example, a portion of the drain electrode 154a is exposed to the planarization film 150 as shown in 3f. The via hole 165a is formed. This is to connect the lower electrode 170 and the drain electrode 154a to be formed in a subsequent process.

Next, as illustrated in FIG. 3G, any one of the source / drain electrodes 152a and 154a is deposited through the via hole 165 by depositing a conductive material on the planarization film 150 having a flat top surface including the via hole 165. For example, the lower electrode 170 connected to the drain electrode 154a is formed. The substrate 100 may be formed as a reflective film or a reflective electrode, which is formed to reflect light emitted from the organic film 190 formed in a subsequent process in a direction opposite to the substrate 100.

The lower electrode 170 may serve as an anode and may form an organic light emitting display device by forming a transparent electrode including a reflective film. At this time, the material of the reflective film is a single metal of silver (Ag), aluminum (Al), chromium (Cr), molybdenum (Mo), tungsten (W), titanium (Ti) and thallium (Ta) and alloys thereof. As a constituent material of the transparent electrode of the lower electrode 170, indium tin oxide (ITO) or indium zinc oxide (IZO) having a high work function may be used, and aluminum may be used in consideration of reflection efficiency and work function. Al or alloys thereof and ITO are most widely used.

Subsequently, as illustrated in FIG. 3H, a pixel definition layer (not shown) is formed over the entire surface. In this case, the pixel definition layer may be formed of one material selected from the group consisting of polyimide, benzocyclobutene series resin, phenol resin, and acrylate. have. The thin film as described above can be patterned by a photolithography process performed by an exposure and development process.

Next, as shown in FIG. 2, after forming the pixel definition layer pattern 180 to expose the emission region by patterning the pixel definition layer through a photolithography process, the lower electrode exposed by the pixel definition layer pattern 180. An organic layer 190 including at least an organic light emitting layer is formed on the upper portion 170.

Next, an upper electrode 200 is formed on the organic layer 190 on the substrate 100. The upper electrode 200 serves as a cathode electrode and is formed of a transparent electrode, but a conductive metal having a low work function, and formed of one material selected from the group consisting of Mg, Ca, Al, Ag, and alloys thereof.

According to the invention as described above, the channel doped (channel dopping) in the pixel portion first thin film transistor to form an amorphous silicon layer on a substrate and to obtain a circuit portion and a pixel portion different characteristics with a threshold voltage (V _th) By having a certain level of S-factor, the circuit part has a low S-factor, so that the circuit can be easily driven. In the pixel part, the S-factor gradient is compared with the circuit part for gray scale expression. It is possible to obtain desired characteristics of the thin film transistor by setting the threshold voltage of the driving transistor to -1.2V to -3.8V in order to increase the voltage compensation effect.

Claims (7)

A substrate having a pixel portion and a circuit portion; A first thin film transistor positioned in the pixel portion; And And a second thin film transistor positioned on the circuit unit. And the first thin film transistor is electrically connected to the pixel electrode of the pixel portion, and the channel region of the first thin film transistor is doped with an impurity. The method of claim 1, And the impurity is an n-type impurity. The method of claim 2, The n-type impurity is phosphor (P) organic light emitting display device. The method of claim 3, wherein And phosphorus (P) is doped at a concentration of 5 * e ¹¹ to 10 * e ¹² atoms / cm ² . The method of claim 1, The first thin film transistor of the pixel unit has an S-factor of 0.33 to 0.45 V / dec. The method of claim 1, And the first thin film transistor of the pixel portion is a driving thin film transistor. The method of claim 6, The driving thin film transistor is an organic light emitting display device, characterized in that the PMOS.

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