KR100691127B1 - Broadcast signal receiving circuit - Google Patents

Abstract

By sampling and holding the IF signal and converting it into a digital signal, the analog transmission signal contained in the IF signal is extracted and the impedance is not changed when sampling the IF signal.

A tuner unit which receives a television broadcast signal of a predetermined channel according to a channel selection signal and outputs it as an IF signal of a predetermined frequency, an oscillator generating an oscillation signal of a predetermined frequency for sampling and holding the IF signal, and an oscillator of the oscillator An analog / digital converter for sampling and holding the IF signal according to the signal, extracting an analog transmission signal, converting the extracted analog transmission signal into a digital signal, and a DSP for processing the digital transmission signal output from the analog / digital converter; It does not use a separate mixer, extracts the analog transmission signal from the IF signal, and reduces the occurrence of noise.

VSB / QAM, digital television broadcasting, IF signal, sample hold circuit,

Description

Broadcast signal receiving circuit

1 is a block diagram showing the configuration of a conventional broadcast signal receiving circuit.

Figure 2 is a block diagram showing the configuration of a broadcast signal receiving circuit of the present invention.

3 is a circuit diagram showing the configuration of the analog-digital converter of FIG.

4 is a circuit diagram illustrating a configuration of a sampling / holding unit of FIG. 2.

5a and 5b are views for explaining the operation principle of the switching unit used in the broadcast signal receiving circuit of the present invention.

Explanation of symbols on the main parts of the drawings

210: tuner portion 220: filter

230: AGC amplifier 240: oscillator

250: analog-to-digital converter 260: DSP

300: sampling / holding amplifier 301: amplifier

310: pipeline analog to digital converter

320: error correction unit 400: charging unit

410: bias voltage supply unit SW11 to SW31, SW12 to SW32: switching unit

NM11 to NM14: NMOS transistor PM11, PM12: PMOS transistor

The present invention is a broadcast signal receiving circuit for extracting a transmission signal from an IF (Intermediate Frequency) signal of the broadcast signal received by the tuner, sampling and holding the IF signal to convert to a digital signal while extracting the transmission signal contained in the IF signal The present invention relates to a broadcast signal receiving circuit, and more particularly to a broadcast signal receiving circuit for extracting an AV (Audio and Video) signal carried on a carrier wave in a digital television receiver and a broadcast signal receiver such as a set-top box for receiving a digital television broadcast signal. It is about.

Digital television broadcasting is being actively developed based on high definition, high resolution, and large size, and VSB / QAM (Vestigial Side Band / Quadrature Amplitude Modulation), which is a digital television reception method, is becoming a standard in Korea.

The VSB / QAM system includes an analog-to-digital converter to digitally process an analog signal received by airwaves. That is, the VSB / QAM method receives a broadcast signal of a predetermined channel from the tuner unit, outputs an IF signal having a frequency of about 44 MHz, filters the output IF signal, and extracts a 6 MHz transmission signal through a mixer. It was then input to an analog / digital converter and converted into a digital signal.

This conventional technique will be described in detail with reference to the drawings of FIG. 1.

1 is a block diagram showing the configuration of a conventional broadcast signal receiving circuit. As shown in the figure, a tuner unit 110 for receiving a television broadcast signal of a predetermined channel according to a channel selection signal from a broadcast signal received through the antenna 100 and outputting it as an IF signal of a predetermined frequency, and the tuner unit 110. AGC filter IF signal of a predetermined frequency to remove noise by filtering), a first oscillator 130 for generating an oscillation signal of a predetermined frequency, and IF signal output from the filter 120 AGC amplification according to the (Automatic Gain Control) signal and mixing and extracting the AV signal by mixing the oscillation signal of the first oscillator 130 and the output signal of the mixed and AGC amplifier 140, The second oscillator 150 generating an oscillation signal of a predetermined frequency for sampling and holding, and the output signal of the mixing and AGC amplifier 140 in accordance with the oscillation signal of the second oscillator 150 while sampling and holding the analog signal. signal Was composed of the A / D converter 160 for conversion to a digital signal, the A / D converter 160, DSP (Digital Signal Processor) (170) for processing the digital signal output from.

In the conventional broadcast signal receiving circuit configured as described above, the tuner unit 110 receives a television broadcast signal of a predetermined channel according to a channel selection signal among the television broadcast signals received through the antenna 100, for example, at a predetermined frequency. It outputs an IF signal having a frequency of 44 MHz.

The IF signal output from the tuner unit 110 is filtered by the filter 120 to remove the noise signal. Here, the filter 120 uses, for example, a Surface Acoustic Wave (SAW) filter, and an IF signal having a frequency of 44 MHz output from the tuner unit 110 is filtered by the filter 120 so that a noise signal is generated. Removed.

The IF signal from which the noise signal is removed from the filter 120 is input to the mixing and AGC amplifier 140. The mixing and AGC amplifier 140 amplifies the IF signal input from the filter 120 according to the AGC signal. The gain is made constant, and the oscillation signal output from the first oscillator 130 is mixed and converted into an AV signal having a frequency band of 6 MHz.

The AV signal output from the mixed and AGC amplifier 140 is input to the analog / digital converter 160, and the second oscillator 150 generates an oscillation signal of about 25 MHz to the analog / digital converter 160. As input, the analog-to-digital converter 160 samples and holds the AV signal input from the mixing and AGC amplifier 140 according to the oscillation signal of about 25 MHz generated by the second oscillator 150, and the digital AV signal. The digital AV signal converted by the analog-to-digital converter 160 is digitally processed by the DSP 170 and output.

However, the above-described conventional technology converts the oscillation signal output from the first oscillator 130 to the IF signal filtered by the filter 120, mixed with the AGC amplifier 140, and converts the signal into a 6 MHz AV signal. Convert to The mixing and AGC amplifier 140 extracts an analog AV signal of 6 MHz by using an expensive two-stage mixer, which is complicated in construction, and increases production costs of the product.

It is therefore an object of the present invention to provide a broadcast signal receiving circuit that extracts analog AV signals contained in an IF signal while sampling and holding the IF signal and converting it into a digital signal without using a mixer.

Another object of the present invention is to provide a broadcast signal receiving circuit which can reduce noise by preventing input impedance from changing when sampling an IF signal.

Another object of the present invention is to provide a broadcast signal receiving circuit which can reduce noise by reducing the input impedance of sampling switching when sampling an IF signal.

The broadcast signal receiving circuit of the present invention having the above object has a tuner unit for receiving a television broadcast signal of a predetermined channel and outputting it as an IF signal of a predetermined frequency according to a channel selection signal, and a predetermined frequency for sampling and holding the IF signal. An oscillator for generating an oscillation signal, an analog / digital converter for extracting an analog transmission signal by sampling and holding the IF signal according to the oscillation signal of the oscillator, and converting the extracted analog transmission signal into a digital signal, and the analog / digital converter And a DSP for processing a digital transmission signal output from the filter, and filtering the IF signal output from the tuner unit to remove noise between the tuner unit and the analog / digital converter, and the IF signal filtered by the filter. It further comprises an AGC amplifier for adjusting the gain according to the AGC signal And a gong.

The analog-to-digital converter includes a sampling / holding amplifier for sampling and holding an IF signal according to an oscillation signal of an oscillator, extracting the analog AV signal, and amplifying the extracted analog AV signal, and the analog AV signal amplified by the sampling / holding amplifier. A pipeline analog / digital converter for converting a digital AV signal using a plurality of MDACs (multiplying digital to analog converters) and a plurality of flash analog / digital converters, and digital outputs of the pipeline analog / digital converters. And an error correction unit for correcting an error of an AV signal and outputting it to the DSP, wherein the sampling / holding amplifier is connected to a capacitor for holding a sampled IF signal, and connected during a first period of the oscillation signal of the oscillator. A first switching unit and a second switching unit for sampling and holding the capacitor in the capacitor; An amplifier for amplifying the IF signal held in the condenser, and a third switching unit which is connected during the second period of the oscillation signal of the oscillator to cause the IF signal held in the condenser to be amplified in the amplifier. An inverter for inverting the oscillation signal of the oscillator is provided between the first and second switching units or between the oscillator and the third switching unit, and each of the first to third switching units switches an input signal and outputs it to an output terminal. An NMOS transistor, a capacitor for applying a bias voltage to the NMOS transistor, a charging unit for charging power to the capacitor during the first period of the oscillation signal of the oscillator, and a second period of the oscillation signal of the oscillator A bias voltage is applied to a gate and a source of the NMOS transistor for the power charged in the capacitor. Applying to and is composed of a bias voltage supply which outputs the input signal to the output terminal, the first period and the second period of the oscillation signal of the oscillator is characterized in that the high potential period and the low potential period of the oscillation signal.

Hereinafter, the broadcast signal receiving circuit of the present invention will be described in detail with reference to the accompanying drawings of FIGS. 2 to 5.

2 is a block diagram showing the configuration of a broadcast signal receiving circuit of the present invention. As shown in the figure, the tuner unit 210 receives a television broadcast signal of a predetermined channel according to a channel selection signal from a broadcast signal received through the antenna 200 and outputs the IF signal of a predetermined frequency, and the tuner unit ( A filter 220 for removing noise by filtering an IF signal of a predetermined frequency output by 210, an AGC amplifier 230 for AGC amplifying an IF signal output from the filter 220 according to an AGC signal, and the AGC Oscillator 240 for generating an oscillation signal of a predetermined frequency for sampling and holding the output signal of the amplifier 230, and sampling and holding the output signal of the AGC amplifier 230 in accordance with the oscillation signal of the oscillator 240 An analog / digital converter 250 for extracting the analog AV signal and converting the extracted analog AV signal into a digital AV signal, and a DSP for processing the digital signal output from the analog / digital converter 250. It consisted of (260).

In the broadcast signal receiving circuit of the present invention configured as described above, the tuner unit 210 receives a television broadcast signal of a predetermined channel according to a channel selection signal among the television broadcast signals received through the antenna 200 and outputs an IF signal. . For example, the tuner unit 210 outputs an IF signal having a frequency of 44 MHz.

The IF signal output from the tuner 210 is filtered by the filter 220 to remove the noise signal, and the IF signal from which the noise signal is removed is amplified by the AGC amplifier 230 according to the AGC signal so that the gain is constant. The output is adjusted after adjusting.

The IF signal whose gain is adjusted in the AGC amplifier 230 is input to the analog-to-digital converter 250, and the oscillation signal of about 25 MHz generated by the oscillator 240 is input to the analog-to-digital converter 250. The analog-to-digital converter 250 extracts the analog AV signal by sampling and holding the IF signal input from the AGC amplifier 240 according to the oscillation signal of about 25 MHz generated by the oscillator 240, and extracts the analog AV signal. The AV signal is converted into a digital AV signal, and the digital AV signal converted by the analog-to-digital converter 250 is digitally processed by the DSP 260 and output.

3 is a circuit diagram showing the configuration of the analog-to-digital converter 250 in the above-described broadcast signal receiving circuit of the present invention. As shown therein, the sampling / holding amplifier 300 extracts and amplifies an analog AV signal by sampling and holding the input IF signal according to the oscillation signal of the oscillator 240, and the sampling / holding amplifier 300 amplifies the signal. A pipelined analog-to-digital converter 310 for converting an analog AV signal into a digital AV signal using a plurality of multiplying digital to analog converters (MDACs) and a plurality of flash analog / digital converters; An error correcting unit 320 for correcting an error of the digital AV signal output from the pipeline analog / digital converter 310 and outputting the digital AV signal to the DSP 260 is configured.

The sampling / holding amplifier 300 is connected during the first period of the oscillation signal of the oscillator 240, and the first switching unit SW11 (SW21) for sampling the IF signal and holding it in the capacitors C1 and C2. And an IF signal held in the capacitors C1 and C2 while being connected during a second period of the oscillation signal of the second switching unit SW12 (SW22), the amplifier 301, and the oscillator 240, the amplifier. And a third switching section SW13 (SW23) for amplifying at 301.

According to the present invention configured as described above, the first switching unit SW11 (SW21) and the second switching unit SW12 (SW22) are connected during the first period of the oscillation signal of the oscillator 240, that is, the high potential period of the oscillation signal. .

As the high potential period in which the oscillation signal of the oscillator 240 is the first period, the first switching unit SW11 (SW21) and the second switching unit SW12 (SW22) are connected, and the third switching unit SW13 (SW23) Is open, the IF signal input from the AGC amplifier 230 flows through the first switching unit SW11 (SW21), the condenser C1 (C2) and the second switching unit SW12 (SW22). The capacitor C1 and C2 are then charged with the IF signal. That is, the IF signal is held in the capacitors C1 and C2.

In this state, when the oscillation signal of the oscillator 240 is the low potential period of the second period, the first switching unit SW11 (SW21) and the second switching unit SW12 (SW22) are opened on the contrary. The third switching unit SW13 (SW23) is connected.

Then, the IF signal held in the capacitors C1 and C2 is amplified by the amplifier 301 and output.

FIG. 4 is a circuit diagram showing the configuration of each of the first to third switching units SW11 to SW13 (SW21 to SW23) included in the sampling / holding amplifier 300. As shown in FIG. 1, the first NMOS transistor NM11 for switching the input signal VIN to be output to the output terminal VOUT, and the capacitor C11 for applying a bias voltage to the first NMOS transistor NM11. ), And second and third NMOS transistors NM12 and NM13 and a first PMOS transistor PM11 that charge power to the capacitor C11 during the first period of the oscillation signal of the oscillator 240. The charging unit 400 and the power supplied to the capacitor C11 during the second period of the oscillation signal of the oscillator 240 are applied as a bias voltage to the gate and the source of the first NMOS transistor NM11 as input signals. The bias voltage supply part 410 which consists of the 4th NMOS transistor NM14 and the 2nd PMOS transistor PM12 which makes (VIN) output to the output terminal VOUT is comprised.

Each of the switching units SW11 to SW13 (SW21 to SW23) of the present invention configured as described above is the first of the oscillation signal generated by the oscillator 240 in a state where power is applied to the power supply terminal V _DD (V _SS ). In other words, when the high potential signal is input, the second and third NMOS transistors NM12 and NM13 of the charging unit 400 become conductive, and the third NMOS transistor NM13 becomes conductive. Since the low potential, which is the power source of the power supply terminal V _SS , is applied to the gate of the first PMOS transistor PM11 through the third NMOS transistor NM13, the first PMOS transistor PM11 is in a conductive state.

Then, a current path is formed from the power supply terminal V _DD to the first PMOS transistor PM11, the capacitor C11, the second NMOS transistor NM12, and the power supply terminal V _SS to supply power to the capacitor C11. Is charged.

In this state, when the second period of the oscillation signal generated by the oscillator 240, that is, the low potential signal is input, the second and third NMOS transistors NM12 and NM13 of the charging unit 400 are reversed. The first PMOS transistor PM11 enters the cutoff state as the blocking state and the third NMOS transistor NM13 become the blocking state.

As a result of the low potential signal generated by the oscillator 240, the second PMOS transistor PM12 of the bias voltage supply unit 410 becomes conductive, and the PMOS transistor PM12 becomes conductive, thereby condensing the capacitor C11. ) Is applied to the gates of the first and fourth NMOS transistors NM11 and NM14 through the second PMOS transistor PM12, so that the fourth NMOS transistor NM14 is in a conductive state.

Then, since the charging power of the capacitor C11 is applied to the gate and the source of the first NMOS transistor NM11 through the second PMOS transistor PM12 and the fourth NMOS transistor NM14, the first NMOS transistor. NM11 is brought into a conductive state, and the input signal of the input terminal VIN is output to the output terminal VOUT through the first NMOS transistor NM11.

Here, in the present invention, when the oscillation signal generated by the oscillator 240 is a first period of time with a high potential signal, the first switching unit SW11 (SW21) and the second switching unit SW12 (SW22) are connected. When the oscillation signal is the second period of the low potential signal, the third switching unit SW13 (SW23) is connected. Therefore, an inverter is provided between the first switching unit SW11 (SW21) and the second switching unit SW12 (SW22) and the oscillator 240 to invert the oscillation signal or to switch the third switching unit SW13 (SW23). ) And an oscillator having an inverter between the oscillator 240 and the oscillator 240 to invert the oscillation signal so that the oscillation signal of the oscillator 240 is the first switching unit SW11 (SW21) and the second switching unit SW12 (SW22) and the second switching unit. 3 The switching sections SW13 (SW23) are alternately connected.

In general, in the VSB / QAM method, the analog-to-digital converter 250 is one of the most sensitive components. Among them, when sampling a high frequency signal such as an IF signal, the impedance change is large or the impedance value is high. In this case, the occurrence of noise becomes large. That is, when the analog / digital converter 250 samples the IF signal, a low pass filter is formed by internal resistance, parasitic capacitance, etc., and the formed low pass filter affects the IF signal of high frequency so that the analog / digital converter ( It lowers the operating characteristics of the 250).

Therefore, in the present invention, the IF signals are sampled, held, amplified and output using the first to third switching units SW11 to SW13 (SW21 to SW23), and the first to third switching units SW11 to SW13 ( Each of the SW21 to SW23 is connected to the PMOS transistor PM11 of the charging unit 400 by the high potential of the oscillation signal generated by the oscillator 240 as shown in FIG. 5A when the power is supplied to the capacitor C11. The NMOS transistor NM12 is brought into a conductive state, and the power is charged to the capacitor C11. At this time, the NMOS transistor NM13 is brought into a conductive state, and both the PMOS transistor PM12 and the NMOS transistor NM14 of the bias voltage supply unit 410 are turned off so that the input signal VIN is not output. Will not.

In the low potential period of the oscillation signal generated by the oscillator 240, as shown in FIG. 5B, both the PMOS transistor PM11 and the NMOS transistors NM12 and NM13 of the charging unit 400 are blocked, and the bias is performed. The PMOS transistor PM12 and the NMOS transistor NM14 of the voltage supply unit 410 are both in a conducting state, and the charging voltage of the capacitor C11 passes through the PMOS transistor PM12 and the NMOS transistor NM14. The NMOS transistor NM11 is brought into a conductive state by being applied as a bias voltage to the gate and the source of the MOS transistor NM11.

Here, the charging voltage of the capacitor C11 is not discharged, and a constant bias voltage is continuously applied to the NMOS transistor NM11.

When the NMOS transistor NM11 is in a conductive state, the impedance between the source and the drain of the NMOS transistor NM11 is expressed by Equation 1 below.

Here, R _DS is an impedance between the drain and the source of the NMOS transistor NM11, V _DS is a voltage between the drain and the source of the NMOS transistor NM11, and I _D is the drain of the NMOS transistor NM11. Current is, K is a constant value determined according to the structure of the NMOS transistor NM11, V _GS is a bias voltage applied between the gate and the source of the NMOS transistor NM11, V _T is the NMOS transistor NM11 Is the threshold voltage of

Assuming that the threshold voltage V _T of the NMOS transistor NM11 is constant in Equation 1, the NMOS transistor NM11 when the bias voltage V _GS applied to the NMOS transistor NM11 is constant. It can be seen that the impedance (R _DS ) between the drain and the source of N is maintained constant.

As described above, the present invention improves the reception characteristics of the broadcast signal by switching while maintaining a constant bias voltage of the NMOS transistor NM11, sampling and holding a high frequency IF signal, and simultaneously performing a mixer function to perform a desired frequency. The transmission signal can be extracted and converted into a digital signal and output.

On the other hand, while the present invention has been shown and described with respect to specific preferred embodiments, various modifications and changes of the present invention without departing from the spirit or field of the invention provided by the claims below It can be easily understood by those skilled in the art.

As described above, the present invention maintains the bias voltage of the MOS transistor used as the switching element to maintain the impedance between the drain and the source to perform the mixer function while accurately sampling and holding the high frequency IF signal. The transmission signal can be extracted, thereby improving reception characteristics of the broadcast signal, as well as signal to noise ratio (SNR), single to noise plus distortion ratio (SNDR), and spurious free dynamic range (SFDR). It can dramatically improve noise characteristics such as INL (Integral Non-Linearity) and DNL (Differential Non-Linearity), and it can reduce the production cost of the product without the need for a separate mixer. .

Claims (7)

A tuner unit for receiving a television broadcast signal of a predetermined channel according to the channel selection signal and outputting the signal as an IF (Intermediate Frequency) signal of a predetermined frequency; An oscillator for generating an oscillation signal of a predetermined frequency for sampling and holding the IF signal; An analog / digital converter for sampling and holding the IF signal according to the oscillation signal of the oscillator to extract an analog transmission signal and converting the extracted analog transmission signal into a digital signal; And And a digital signal processor (DSP) for processing a digital transmission signal output from the analog / digital converter. 2. The apparatus of claim 1, further comprising: between the tuner section and an analog / digital converter; A filter for removing noise by filtering an IF signal output from the tuner unit; And And an AGC amplifier for adjusting gain according to an AGC signal based on the IF signal filtered by the filter. The apparatus of claim 1, wherein the analog-to-digital converter; A sampling / holding amplifier which extracts and amplifies an analog transmission signal by sampling and holding an IF signal according to an oscillation signal of an oscillator; A pipeline analog / digital converter for converting the analog transmission signal amplified by the sampling / holding amplifier into a digital transmission signal using a plurality of multiplying digital to analog converters (MDACs) and a plurality of flash analog / digital converters; And And an error correction unit for correcting an error of a digital transmission signal output from the pipeline analog / digital converter and outputting the error to the DSP. 4. The apparatus of claim 3, wherein the sampling / holding amplifier; A capacitor for holding a sampled IF signal; A first switching unit and a second switching unit which are connected during the first period of the oscillation signal of the oscillator and sample the IF signal to be held in the capacitor; An amplifier for amplifying the IF signal held in the capacitor; And And a third switching unit which is connected during the second period of the oscillation signal of the oscillator to cause the IF signal held in the capacitor to be amplified by the amplifier. 5. The apparatus of claim 4, further comprising: between the oscillator and the first and second switching portions or between the oscillator and the third switching portion; And an inverter for inverting the oscillation signal of the oscillator. The method of claim 4, wherein each of the first to third switching unit; An NMOS transistor for switching an input signal to output the output terminal; A capacitor for applying a bias voltage to the NMOS transistor; A charging unit for charging power to the capacitor during the first period of the oscillation signal of the oscillator; And And a bias voltage supply unit configured to output the input signal to an output terminal by applying power charged in the capacitor to the gate and the source of the NMOS transistor during the second period of the oscillation signal of the oscillator as a bias voltage. Broadcast signal receiving circuit. 7. The oscillator of claim 4 or 6, wherein the first period and the second period of the oscillation signal of the oscillator are each; And a high potential period and a low potential period of the oscillation signal.

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