KR100687613B1 - Apparatus and method for digital combiner of base transceiver station in mobile communication system - Google Patents

Abstract

The present invention provides a digital combiner device of a base station and a method thereof in a mobile communication system, comprising: a reception processing unit which performs reception processing by parity check and synchronization bit check when serial data is received; A combiner configured to receive the data stored in the reception processor and perform combining; It comprises a transmission processing unit for receiving and storing the data of the combiner, and then transmits the parity bit and the sync bit, and then outputs the data. The data received from each channel card when multiple channel cards are used in the base station. It will be able to compensate for the delay.

Description

Apparatus and method for digital combiner of base transceiver station in mobile communication system

1 is a block diagram of a general mobile communication system,

2 is a block diagram of a digital combiner device of a base station in a conventional mobile communication system,

3 is a flowchart illustrating a digital combiner method of a base station in a conventional mobile communication system.

4 is a waveform diagram of data reception in a steady state and an abnormal state showing a problem according to the prior art;

5 is a block diagram of a digital combiner device of a base station in a mobile communication system according to the present invention;

6 is a flowchart illustrating a digital combiner method of a base station in a mobile communication system according to the present invention;

FIG. 7 is a detailed flowchart illustrating a write operation on a received DPRAM in FIG. 6.

FIG. 8 is a detailed flowchart illustrating a read operation of the received DPRAM in FIG. 6.

9 is a data format configuration diagram showing a CDMA data format used in the present invention.

Explanation of symbols on the main parts of the drawings

100: reception processing unit 110 ~ 113: S / P conversion unit

120 to 123: reception control section 130 to 133: reception DPRAM

200: coupling unit 300: transmission processing unit

310 to 313: transmission DPRAM 320 to 323: transmission control unit

330 ~ 333: P / S converter

The present invention relates to a digital combiner of a base station in a mobile communication system. In particular, the base station in a mobile communication system suitable for compensating for the delay of data received from each channel card when the base station uses a plurality of channel cards. A digital combiner device and a method thereof.

In general, a mobile communication system is a communication system that targets mobile devices such as people, cars, ships, trains, and airplanes, which includes key phone systems, mobile phones (mobile phones, vehicle phones), port phones, aircraft phones, and mobile phones. Trains, cruise ships, express buses), radio calling, radiotelephony, satellite mobile communication, amateur radio, and fishing service ships.

The mobile communication system includes an AMPS (Advanced Mobile Phone Service) system using an analog method, a Code Division Multiple Access (CDMA) system using a digital method, a Wideband Code Division Multiple Access (WCDMA), and a TDMA (Time). Division Multiple Access, Time Division Multiple Access (FDMA) system, Frequency Division Multiple Access (FDMA) system, Wireless Local Loop (WLL), CDMA2000-1x, IMT-2000 (International Mobile Telecommunication in the year 2000 , Global mobile communication (GSM) systems, and GSM (Global System for Mobile communication) systems.

A base station is used in such a mobile communication system, and is a network termination device that is directly connected to a subscriber terminal by performing baseband signal processing, wired / wireless conversion, and transmission and reception of a wireless signal.

1 is a block diagram of a general mobile communication system.

Where reference number 10 is a mobile switching center / visitor location register (MSC / VLR), 20 is a home location register (HLR), 30 is a public switched telephone network (PSTN) 40 denotes a base station controller (BSC / BTS), and 50 denotes a mobile station (MS).

Thus, the MSC 10 performs an exchange function, and serves as a road and an intersection of all communication lines.

The HLR 20 is a database in which subscriber information is stored, and the VLR is a device that temporarily stores important subscriber information in order to prevent frequent HLR 20 inquiry.

The PSTN 30 refers to the entire telephone network used in a general home.

Thus, when a user calls a mobile communication terminal 50 of a mobile subscriber from a general home telephone, the home telephone signal is first connected to the PSTN 30 and then inputted to the switch 10 of the mobile communication operator using the telephone number. .

The exchange 10 of the mobile communication provider inquires whether the subscriber is a valid subscriber and the location of the subscriber to the HLR 20, and then transmits the information to the corresponding base station 40 to call the mobile communication terminal 50.

The location of the BSC and VLR in terms of systems may vary depending on the equipment manufacturer. For example, the BSC may be in the same spatial location as the MSC or may be in the BTS, which is the base station 40. The base station 40 means that the BSC and the BTS are combined.

2 is a block diagram of a digital combiner device of a base station in a conventional mobile communication system.

As shown therein, a Serial to Parallel (S / P) converter 10 for receiving CDMA serial data from a channel card and converting the data into parallel data; The analog processing unit receives the parallel data converted from the S / P converter 10 and combines the combined data 20 and the parallel data output from the combined data 20 into serial data. It consists of a P / S (Parallel to Serial) conversion unit 30 to transmit.

Here, reference numerals 11 to 13 in the S / P converter 10 are 1 to K S / P converters for receiving serial data from 1 to K channel cards and converting them into parallel data, respectively, and P / S conversion. Reference numerals 31 to 33 in the unit 30 denote 1 to L P / S conversions which receive 1 to L parallel data of the combiner 20 and convert them into serial data, respectively, and transmit them to 1 to L analog processing units. It is wealth.

3 is a flowchart illustrating a digital combiner method of a base station in a conventional mobile communication system.

As shown therein, a first step (ST1) (ST2) for receiving CDMA serial data from a channel card and performing S / P conversion; A second step (ST3) of combining the parallel data after the first step; After the second step, a third step (ST4) (ST5) of performing P / S conversion on the combined data and transmitting the same to the analog processor is performed.

The operation of the prior art will be described in detail with reference to the accompanying drawings.

First, the digital combiner of the conventional CDMA base station is configured as shown in FIG. 2, and when the CDMA serial data arranged in even seconds is received from the channel card, the combiner combines them and transmits them to the analog unit.

In this case, the data received from each channel card must be exactly in phase at the corresponding point in time, and error-free combining is possible when there is no delay of data even in one link.

However, this conventional technology has the following problems.

If one of the data received from the channel card is not aligned in Even Seconds, or if one clock is turned off due to the delay of the data occurring in the length of the transmission line, the output of the combiner will return normal data. It cannot be guaranteed.

4 is a waveform diagram of data reception in a normal state and an abnormal state showing a problem according to the prior art.

Therefore, as shown in FIG. 4, when one clock is turned due to the data delay, normal data such as abnormal # 1 data and abnormal # 2 data cannot be guaranteed.

In addition, the prior art has the disadvantage of recalculating and correcting the start point of CDMA data and the link delay time according to Serial to Parallel (S / P) conversion and Parallel to Serial (P / S) conversion whenever the system configuration changes. There was also.

Accordingly, the present invention has been proposed to solve the above-mentioned conventional problems, and an object of the present invention is to move a mobile station that can compensate for a delay of data received from each channel card when a plurality of channel cards are used in a base station. The present invention provides a digital combiner device of a base station and a method thereof in a communication system.

In order to achieve the above object, a digital combiner device of a base station in a mobile communication system according to an embodiment of the present invention,

A reception processing unit for performing reception processing by parity check and sync bit check when storing serial data; A combiner configured to receive the data stored in the reception processor and perform combining; And a transmission processing unit for receiving and storing data of the coupling unit, attaching the parity bit and the synchronization bit, and then performing a transmission process.

Digital combiner method of the base station in the mobile communication system according to an embodiment of the present invention to achieve the above object,

A tenth step of receiving and storing received data by parity check and sync bit check when serial data is received; A twentieth step of combining received and stored data after the tenth step; And a thirtieth step of storing the combined data after the twentieth step, and then transmitting the parity bit and the sync bit to perform a transmission process.

Hereinafter, an embodiment according to the present invention, a digital combiner device of a base station and a method thereof in a mobile communication system will be described with reference to the accompanying drawings.

5 is a block diagram of a digital combiner device of a base station in a mobile communication system according to the present invention.

As shown therein, a reception processing unit 100 for receiving and receiving serial data and performing reception processing by parity check and sync bit check; A combiner 200 that receives the data stored in the reception processor 100 and performs combining; It comprises a transmission processor 300 for receiving and storing the data of the combiner 200, and then attach the parity bit and the sync bit to perform the transmission process and then output.

In the above, the reception processing unit 100 includes: an S / P conversion unit 110 for converting serial data into parallel data when receiving the serial data; A reception controller 120 which receives the output of the S / P converter 110 and performs a parity check and a sync bit check to control a write operation of received data; Under the control of the reception control unit 120 is configured to include a receiving dual port random access memory (DPRAM) 130 for storing parallel data.

The transmission processor 300 includes a transmission DPRAM 310 for storing parallel data output from the combiner 200; A transmission control unit (320) for monitoring a transmit write enable (TX_WEN) signal to the transmission DPRAM (310) and attaching a parity bit and a synchronization bit to parallel data of the transmission DPRAM (310); The P / S converter 330 converts the parallel data output from the transmission control unit 320 into serial data and transmits the converted serial data.

Here, reference numerals 111 to 113 in the S / P converter 100 are 1 to K S / P converters for receiving serial data from 1 to K channel cards and converting the serial data into parallel data, respectively, and the reception controller 120. Reference numerals 121 to 123 denoted by 1 to K receive control units that perform reception control on the outputs of the 1 to K S / P converters 111 to 113, and reference numerals 131 to 133 denoted by the receive DPRAM 130. 1 to K receive DPRAMs performing write operations on the outputs of 1 to K receive control units 121 to 123.

In addition, reference numerals 311 to 313 in the transmission DPRAM 310 are 1 to L transmission DPRAMs which receive 1 to L parallel data from the combiner 200 and perform a write operation, respectively, and reference numbers within the transmission control unit 320. 321 to 323 are 1 to L transmission control units which perform transmission control on transmission data of 1 to L transmission DPRAMs 311 to 313, and reference numerals 331 to 333 in the P / S conversion unit 330 are 1 to 1, respectively. 1 to L P / S converters converting parallel data of the L transmission control units 321 to 323 into serial data and transmitting the same to 1 to L analog processing units, respectively.

6 is a flowchart illustrating a digital combiner method of a base station in a mobile communication system according to the present invention.

As shown therein, a tenth step (ST11 to ST13) for performing reception processing by parity check and sync bit check when receiving serial data; A twentieth step (ST20) for combining the received and stored data after the tenth step; And the thirtieth step (ST31 to ST33) of storing the combined data after the twentieth step, and then transmitting the parity bit and the sync bit to perform a transmission process.

The tenth step (ST11 to ST13), the eleventh step (ST11) for receiving the serial data and converts it to parallel data; A twelfth step (ST12) of performing parity check and sync bit check on the converted parallel data after the twenty-first step to control a write operation of the received data; A thirteenth step ST13 is performed to allow parallel data to be stored in the reception DPRAM 130 according to the write operation control in the twenty-second step.

FIG. 7 is a detailed flowchart illustrating a write operation on a reception DPRAM in FIG. 6.

As shown therein, the thirteenth step ST13 includes: an initial setting step ST21 for setting a receive write enable (RX_WEN) and a write count (WR_CNT); A parity check step (ST22) for checking whether there is an error by checking the parity bit of the data after the initial setting step; If there is an error in the parity bit of the data, resetting the receiving DPRAM (130) and then returning to the parity check step (ST23); If there is no error in the parity bit of the data, determining whether a receive write enable (RX_WEN) value is '1' (ST24); Determining whether the synchronization bit is '1' if the RX_WEN value is not '1' (ST25); Setting the write enable (WR_EN) value to '1' if the sync bit is '1' and returning to the parity check step (ST26); If the received write enable value is '1', increasing the write count (WR_CNT) value and then determining whether the write count reaches a specific value (ST27) (ST28); Returning to the parity check step if the sync bit is not '1' or the write count has not reached a specific value (X); And returning to the initial setting step when the write count reaches a specific value (X).

In the thirteenth step ST13, the respective values are determined at the rising edge of the clock.

FIG. 8 is a detailed flowchart illustrating a read operation of the transmission DPRAM in FIG. 6.

As shown therein, the thirteenth step ST13 includes: an initial setting step ST31 for setting a receive read enable (RX_REN) and a read count (RD_CNT); Determining whether all of the signals (RX_WEN_K) that delay the received read enable value by a predetermined (K) clock after the initial setting step are all '0' (ST32); If all of the signals RX_WEN_K delaying the read read enable value by a predetermined clock are '0', the signal is returned to the initial setting step, and the signal delayed by the received read enable value by a predetermined clock (K) ( If both RX_WEN_K) are not '0', the read enable value is set by setting the read enable value to '1' and increasing the read count (RD_CNT) until the read count (RD_CNT) reaches a certain value (X). And processing (ST33) (ST34) all the data of the link having the signal RX_WEN_K delayed by a predetermined (K) clock as '0'.

In the thirteenth step ST13, the respective values are determined at the rising edge of the clock.

The thirtieth step (ST31 to ST33) may include a thirty first step (ST31) for storing the combined parallel data after the twentieth step in the transmission DPRAM 310; A thirty-second step (ST32) of monitoring a transmit write enable signal for the transmit DPRAM (310) after the thirty-first step, and attaching a parity bit and a sync bit to parallel data of the transmit DPRAM (310); After the thirty-second step, a thirty-third step (ST33) of converting parallel data into serial data and transmitting the same is performed.

The operation of the digital combiner device of the base station and the method in the mobile communication system according to the present invention configured as described above will be described in detail with reference to the accompanying drawings.

First, the present invention is to compensate for the delay of the data received from each channel card when the base station uses a plurality of channel cards.

In addition, the present invention includes a reception processing unit 100, a coupling unit 200, and a transmission processing unit 300.

Therefore, when receiving serial data, the reception processing unit 100 performs reception processing by parity check and sync bit check and stores the received serial data.

In the reception processing unit 100, the S / P converter 110 converts the serial data into parallel data when it is received.

Also, the reception controller 120 receives the output of the S / P converter 110 and performs parity check and sync bit check to control the write operation of the received data. Thus, the reception control unit 120 performs parity check on the data of each S / P converted link and monitors a SYNC bit indicating the start of the data. When normal data is received, a RX_WEN (Receive DPRAM Write Enable) signal and a RX_WADDR (Receive DPRAM Write Address) are generated to write to the receiving DPRAM 130.

In addition, the reception DPRAM 130 in the reception processing unit 100 stores parallel data under the control of the reception control unit 120.

In this case, the write operation on the reception DPRAM 130 is performed as shown in FIG. 7.

Therefore, an initial setting step ST21 of setting the receive write enable (RX_WEN) and the write count (WR_CNT) to '0' is performed.

After the initial setting step, the parity check step ST22 is performed to check whether there is an error by checking the parity bit of the data.

Therefore, if there is an error in the parity bit of the data, the receiving DPRAM 130 is reset and then returned to the parity check step (ST23).

If there is no error in the parity bit of the data, it is determined whether the received write enable (RX_WEN) value is '1' (ST24).

If the reception write enable (RX_WEN) value is not '1', it is determined whether the sync bit is '1' (ST25).

If the sync bit is '1', the write enable (WR_EN) value is set to '1' and the process returns to the parity check step (ST26).

If the reception write enable value is '1', the write count value is increased (WR_CNT) and then it is determined whether the write count has reached a specific value X (ST27) (ST28).

If the sync bit is not '1' or the write count has not reached the specific value X, the process returns to the parity check step.

When the write count reaches the specified value X, the process returns to the initial setting step.

All operations in FIG. 7 determine the respective values at the rising edges of the clock to operate.

Meanwhile, the combiner 200 receives the data stored in the reception processor 100 and performs combining.

Thus, when the combiner 200 reads the data of the reception DPRAM 130, the combiner 200 performs the data as shown in FIG. 8.

First, an initial setting step of setting Receive Read Enable (RX_REN) and Read Count (Read Count, RD_CNT) to '0' is performed (ST31).

After the initial setting step, it is determined whether all of the signals RX_WEN_K having delayed the read read enable value by a predetermined (K) clock are all '0' (ST32).

If all of the signals RX_WEN_K which delayed the read read enable value by a certain clock are '0', the process returns to the initial setting step.

If all of the signals (RX_WEN_K) that delayed the receive read enable value by a constant (K) clock are not '0', the read enable value is set to '1' until the read count (RD_CNT) reaches a constant value (X). Set and increase the value of the read count (RD_CNT) to process all the data of the link whose signal RX_WEN_K is '0' that delays the read enable value by a certain clock (K) (ST33) (ST34). .

Here, the combiner 200 monitors a signal obtained by delaying the RX_WEN signal of each reception controller 120 by K clocks, where K is a range of how much delay can be compensated between links. If any of the delayed WEN signal is asserted, it generates RX_RADDR (Receive DPRAM Read Address) to read the data of the receiving DPRAM 130, combines the data of each link, and transmits TX_WEN (Transmit A DPRAM Write Enable (TX) signal and a TX_WADDR (Transmit DPRAM Write Address) signal are generated to perform a write operation to the transmission DPRAM 310 allocated for each sector.

On the other hand, the transmission processing unit 300 receives and stores the data of the coupling unit 200, and then attaches the parity bit and the synchronization bit to perform the transmission process and then outputs the data.

In the transmission processor 300, the transmission DPRAM 310 stores parallel data output from the combiner 200.

The transmission control unit 320 monitors a transmit write enable (TX_WEN) signal to the transmission DPRAM 310, and attaches a parity bit and a synchronization bit to parallel data of the transmission DPRAM 310.

The P / S converter 330 converts the parallel data output from the transmission controller 320 into serial data and transmits the serial data to the analog processor.

9 is a data format configuration diagram showing a CDMA data format used in the present invention.

Therefore, the transmission control unit 320 monitors the TX_WEN signal delayed by L clocks. In this case, the value of L should be determined so that a write operation and a read operation do not occur at a specific address of the transmission DPRAM 310 at the same time. When the TX_WEN signal delayed by L clocks is asserted, a TX_REN (Transmit DPRAM Read Enable) signal and a TX_RADDR (Transmit DPRAM Read Address) signal are generated to read the data of the transmission DPRAM 310 and attach a parity bit and a sync bit. As in 9, the CDMA data is transmitted to each FA (Frequency Allocation) / Sector analog processor.

As such, the present invention compensates for the delay of data received from each channel card when the base station uses a plurality of channel cards.

Although the preferred embodiment of the present invention has been described above, the present invention may use various changes, modifications, and equivalents. It is clear that the present invention can be applied in the same manner by appropriately modifying the above embodiments. Accordingly, the above description does not limit the scope of the invention as defined by the limitations of the following claims.

As described above, in the mobile communication system according to the present invention, the digital combiner device and the method of the base station can prevent the malfunction in advance by correcting the data delay that may occur between each channel card in advance, Whenever the shape of the system is changed, it is not necessary to correct the starting point of the CDMA data and the delay time of the link due to the S / P conversion and the P / S conversion, thereby providing a highly flexible configuration of the system shape. .

Claims (10)

A reception processing unit converting the serial data into parallel data and performing parity check and sync bit check and storing the serial data; A combiner configured to receive the data stored in the reception processor and perform combining; And a transmission processor for receiving and storing the data of the combiner, converting the serial data into serial data by attaching a parity bit and a sync bit, and outputting the serial data. The method of claim 1, wherein the receiving processing unit, An S / P converter for converting serial data into parallel data when receiving the serial data; A reception controller which receives the output of the S / P converter and performs a parity check and a sync bit check to control a write operation of received data; And a receiving DPRAM for storing parallel data under the control of the receiving control unit. The transmission processing unit according to any one of claims 1 to 3, wherein A transmission DPRAM for storing parallel data output from the combining section; A transmission control unit for monitoring a transmission write enable signal for the transmission DPRAM and attaching a parity bit and a synchronization bit to parallel data of the transmission DPRAM; And a P / S converter converting the parallel data output from the transmission control unit into serial data and transmitting the serial data. A tenth step of converting the serial data into parallel data and performing parity check and sync bit check; A twentieth step of combining received and stored data after the tenth step; And a thirty step of storing the combined data after the twentieth step, and then converting the serial data with the parity bit and the sync bit and transmitting the serial data. . The method of claim 4, wherein the tenth step is An eleventh step of receiving serial data and converting the serial data into parallel data; A twelfth step of performing parity check and sync bit check on the converted parallel data after the twenty-first step to control a write operation of the received data; And a thirteenth step of allowing parallel data to be stored in a received DPRAM according to the write operation control in the twenty-second step. The method of claim 5, wherein the thirteenth step is An initial setting step of setting a receive write enable and a write count; A parity checking step of checking whether a parity bit of data is present after the initial setting step to determine whether an error exists; If there is an error in the parity bit of the data, resetting the receiving DPRAM and then returning to the parity check step; Determining whether a receive write enable value is '1' if there is no error in the parity bit of the data; Determining whether the synchronization bit is '1' if the received write enable value is not '1'; Setting the write enable value to '1' if the sync bit is '1' and returning to the parity check step; Increasing the write count value when the received write enable value is '1' and then determining whether the write count has reached a specific value; Returning to the parity check step if the sync bit is not '1' or the write count has not reached a specific value; And returning to an initial setting step when the write count reaches a specific value. The method of claim 6, wherein the thirteenth step is A digital combiner method of a base station in a mobile communication system, characterized in that for determining the respective value at the rising edge of the clock. The method of claim 5, wherein the thirteenth step is An initial setting step of setting a receive read enable and a read count; Determining whether all of the signals delaying the received read enable value by a predetermined clock after the initial setting step are all '0'; If all of the signals delaying the received read enable value by a predetermined clock are '0', the process returns to the initial setting step. Set the read enable value to '1' until a certain value is reached, and increase the read count value to process all data on the link with a '0' signal that delayed the read enable value by a certain clock as '0'. Digital combiner method of a base station in a mobile communication system comprising the step of performing. The method of claim 8, wherein the thirteenth step comprises: A digital combiner method of a base station in a mobile communication system, characterized in that for determining the respective value at the rising edge of the clock. The method of claim 4, wherein the thirtieth step comprises: A thirty-first step of storing the combined parallel data after the twentieth step in a transmission DPRAM; A thirty-second step of monitoring a transmit write enable signal for the transmit DPRAM after the thirty-first step, and attaching a parity bit and a sync bit to parallel data of the transmit DPRAM; And a thirty-third step of converting the parallel data into serial data after the thirty-second step and transmitting the serial data.

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