KR100686223B1 - Liquid crystal display - Google Patents

Abstract

A gate line including a gate line extending in the horizontal direction and a gate electrode of the thin film transistor is formed on the lower substrate, and a storage electrode line for forming a storage capacitor overlapping with a pixel electrode formed later is formed in parallel with the gate line. A first electrode electrically connected to the storage electrode line is formed outside the active region. A data line including a data line defining a unit pixel vertically crossing the gate line, a source electrode of the thin film transistor, and a drain electrode positioned opposite to the source electrode is formed on the gate insulating layer. A pixel electrode connected to the drain electrode is formed through the contact hole on the passivation layer covering the data line and the semiconductor layer, and the second electrode which is grounded while overlapping the first electrode to form a storage voltage fixing capacitor outside the active region. Formed.

Holding capacity, liquid crystal capacity, flicker

Description

Liquid crystal display {LIQUID CRYSTAL DISPLAY}

1 is a schematic diagram for determining the amount of change in voltage between two capacitors connected to each other,

2 is a plan view illustrating a unit pixel structure in a liquid crystal display according to a first exemplary embodiment of the present invention.

3 is a cross-sectional view taken along the line III-III 'of FIG. 2,

4 is a circuit diagram showing the structure of a liquid crystal display according to a first embodiment of the present invention;

5 is a plan view schematically illustrating a structure of a liquid crystal display according to a first exemplary embodiment of the present invention;

6 is a cross-sectional view taken along the line VI-VI 'of FIG. 5,

7 and 8 are circuit diagrams schematically showing the structure of a liquid crystal display device according to a second and third embodiment of the present invention.

The present invention relates to a liquid crystal display device, and more particularly, to a liquid crystal display device having separate independent wirings for forming a storage capacitor.

The liquid crystal display is one of the most widely used flat panel display devices. The liquid crystal display includes two substrates on which electrodes are formed and a liquid crystal layer interposed therebetween, and rearranges the liquid crystal molecules of the liquid crystal layer by applying a voltage to the electrode. By controlling the amount of light transmitted.

Among the liquid crystal display devices, a liquid crystal display device having a common electrode and a pixel electrode formed on two substrates and a thin film transistor for switching a voltage applied to each electrode is currently used. The thin film transistor is formed on one of two substrates. In general, a substrate on which a thin film transistor is formed is called a thin film transistor substrate for a liquid crystal display device.

A gate line and a data line are formed on the thin film transistor substrate for a liquid crystal display device to cross each other, and a thin film transistor is formed at an intersection portion of the gate line and the data line, and a gate line is formed in each pixel. According to the switching operation of the thin film transistor by the scan signal (gate voltage) transmitted through the pixel electrode, a pixel electrode to which the image signal (data voltage) is transmitted through the data line is formed.

On the other hand, the thin film transistor substrate for the liquid crystal display device has a sustain electrode line is formed to assist and maintain the charge holding ability of the liquid crystal capacitor made of the pixel electrode and the common electrode, the sustain electrode line overlaps the pixel electrode and the insulating film through the medium. To create a holding capacity. In this case, the common voltage applied to the common electrode or the gate voltage transferred to the gate line is transferred to the sustain electrode line.

However, the storage electrode lines overlap the data lines with the insulating film interposed therebetween, so that parasitic capacitance is formed therebetween. As a result, the voltage transferred to the storage electrode lines is inverted by the data lines and is affected by the change of the image signal transferred. As a result, the voltage of the storage electrode line is shaken, which causes signal distortion, which causes problems such as flicker or crosstalk.

An object of the present invention is to suppress flicker or crosstalk by suppressing a change in potential of the sustain electrode line as a whole.

In order to solve the above problems, the liquid crystal display according to the present invention includes a first electrode connected to the storage electrode line and a second electrode insulated from the first electrode and overlapped with each other, and have a holding voltage having a capacitance rather than a parasitic capacitance. A fixed capacitor is formed.

In the liquid crystal display according to the present invention, a pixel electrode to which a data voltage is transmitted is formed in a unit pixel arranged in a matrix form, and a common voltage facing the pixel electrode and a common voltage for rearranging liquid crystal molecules along with the data voltage are transmitted. An electrode is formed. In addition, a storage electrode line overlapping the pixel electrode to form a storage capacitor is formed, and includes a first electrode electrically connected to the storage electrode line and a second electrode insulated from the first electrode and overlapped with the storage electrode line. A capacitor for fixing a holding voltage is formed to minimize a change in the holding voltage.

It is preferable that the sustain electrode line is electrically connected to the common electrode so that the common voltage is transferred to the sustain voltage.

Here, the common electrode and the pixel electrode linearly face each other in parallel with each other, and may be formed on one of two substrates constituting the liquid crystal display device. It may be formed.

In this case, the second electrode is preferably grounded.

In the liquid crystal display device according to the present invention, gate wirings including a plurality of gate lines are formed in a row direction, insulated from and intersecting with the gate wirings, and data wirings including data lines in a column direction are formed. Pixel electrodes receiving image signals from the data lines are formed in the pixels in the matrix form defined by the intersection of the gate lines and the data lines, and the storage electrode lines overlapping the pixel electrodes in the same direction as the gate lines form the storage capacitor. A first electrode electrically connected to the storage electrode line is formed outside the display area formed of a set of pixels, and a second electrode insulated from the first electrode and overlapped to form a storage voltage fixing capacitor is formed.

The thin film transistor may include a thin film transistor including a gate electrode connected to the gate line, a source electrode connected to the data line, a drain electrode connected to the pixel electrode, and a semiconductor layer. It may include. The display device may further include a common electrode for driving the liquid crystal molecules together with the pixel electrode and transmitting a common voltage.

The storage electrode line may be electrically connected to the common electrode to transmit the common voltage to the storage electrode line.

The common electrode and the pixel electrode linearly face each other in parallel and may be formed on one of two substrates constituting the liquid crystal display device. The common electrode and the pixel electrode may be formed on two substrates each having a flat plate shape and forming the liquid crystal display device. It may be.

The first and second electrodes are preferably formed of the same layer as the gate line, the data line, or the pixel electrode, and the second electrode is preferably grounded.

On the other hand, it is formed of the same layer as the gate wiring or data wiring, and may further include a sustain voltage wiring for transmitting a signal to the first electrode from the outside, and is formed of the same layer as the gate wiring or the data wiring, A sustain voltage correction line may be further included to ground the second electrode.

It is preferable that the sustain voltage fixing capacitor has a capacity larger than the parasitic capacitance generated between the data line and the sustain electrode line, and the capacitance of the sustain voltage fixing capacitor is 500 pF or more.

Next, a thin film transistor substrate for a liquid crystal display according to an exemplary embodiment of the present invention will be described in detail with reference to the accompanying drawings so that a person skilled in the art may easily implement the present invention.                     

First, a method for minimizing a change in voltage at an arbitrary point will be described in detail with reference to the drawings.

1 is a schematic diagram for determining the amount of change in voltage between two capacitors connected to each other.

As shown in FIG. 1, two capacitors each having capacitances Cd and Ct are connected to each other.

At this time, when the potential at point d changes, the potential Vc at point c changes due to the potential change ΔVd at point d. Here, the potential change ΔVc at point c may be represented by ΔVc = (Cd / Ct) * ΔVd. In this way, in order to minimize the potential change ΔVc at point c, the capacitance Ct may be made large or the capacitance Cd may be made small.

According to the present invention, one end is connected to the sustain electrode line to prevent the sustain voltage transmitted to the sustain electrode line from shaking due to the change in the parasitic capacitance formed between the data line and the sustain electrode due to the potential change of the data line. The other jar is to make a holding voltage fixing capacitor having a grounding capacitance, and to increase the capacitance of the holding voltage fixing capacitor. Then, the potential change of the sustain electrode line can be minimized.

First, a unit pixel structure of a liquid crystal display according to an exemplary embodiment of the present invention will be described in detail with reference to the accompanying drawings.

2 is a plan view illustrating a unit pixel structure in a liquid crystal display according to an exemplary embodiment of the present invention, and FIG. 3 is a cross-sectional view taken along line III-III 'of FIG. 2.

The liquid crystal display according to the present invention basically has a structure in which a liquid crystal material is injected between the upper substrate and the lower substrate.

On the lower substrate 10, gate wirings including the gate lines 22 and the gate lines 22 extending in the horizontal direction are formed, and the gate wirings including the gate electrodes 26 of the thin film transistor are formed, and the gate wirings are the gate lines 22. And a gate pad (not shown) connected to the end of the N-axis to transfer a scan signal from the outside to the gate line 22. In addition, on the substrate 10, a storage electrode line 28 is formed in parallel with the gate line 22 to overlap the pixel electrode formed later to form the storage capacitor.

The gate insulating film 30 is formed on the gate wirings 22 and 26 and the storage electrode line 28, and the semiconductor layer 40 is formed on the gate insulating film 30 above the gate electrode 26. Further, on the gate insulating layer 30, a source line 65 and a gate electrode 26 of the thin film transistor are formed by branching the data line 62 and the data line 62 vertically crossing the gate line 22 to define a unit pixel. A data line including a drain electrode 66 positioned opposite the source electrode 65 is formed around the source electrode 65. The data line is connected to the end of the data line 62 to transmit a data signal from the outside to the data line 62. May include a data pad (not shown). The source electrode 65 and the drain electrode 66 are mounted on the semiconductor layer 40 and resistive therebetween to reduce the contact resistance between the source electrode 65 and the drain electrode 66 and the semiconductor layer 40. Contact layers 55 and 56 are formed.                     

A protective film 70 having a contact hole 81 exposing the drain electrode 66 is formed on the data wires 62, 65, 66, and the like, and the drain electrode 66 is formed on the protective film through the contact hole 81. ) Is connected to the pixel electrode 80. The pixel electrode 80 is made of a transparent material such as indium tin oxide (ITO) or indium zinc oxide (IZO). Here, the pixel electrode 80 is formed on the passivation layer 70, but may be formed on the gate insulating layer 30 to be directly connected to the drain electrode 66.

On the upper substrate 100 facing the lower substrate 10, a black matrix 91 is formed of an opaque material to prevent light leakage and has an opening in a unit pixel area. In addition, a common electrode 101 formed of a transparent material such as ITO is formed on the entire surface of the upper substrate 100, and a color filter (not shown) may be formed on the upper substrate 100. In this case, the black matrix 91 or the color filter may be formed on the lower substrate 10.

In this case, a liquid crystal capacitor is formed between the two substrates 10 and 100 using the pixel electrode 80 and the common electrode 101 as both terminals, and the liquid crystal molecules of the liquid crystal layer are formed on the pixel electrode 80. The data is rearranged by the transferred data voltage and the common voltage transferred to the common electrode 101. On the other hand, the thin film transistor substrate is provided with the holding capacitor Cst having the pixel electrode 80 and the storage electrode line 28 as both terminals, and having the gate insulating film 30 and the protective film 70 as a medium. However, the data line 62 and the storage electrode line 28 also overlap with the gate insulating film 30 interposed therebetween, and a parasitic capacitor Cd is formed therebetween.                     

When the liquid crystal display is driven, an image signal transmitted through the data line 62 is transferred to an arbitrary pixel electrode 80 through the source electrode 65 of the thin film transistor, the channel of the semiconductor layer 40, and the drain electrode 66. After being applied once through the thin film transistor, the thin film transistor is turned off, and becomes a floating state until the next signal is applied. However, data signals of other pixel rows are repeatedly transferred to the data line 62 while being repeatedly inverted. At this time, the signal transmitted to the storage electrode line 28 is shaken due to the influence of the data signal inverted and transmitted by the parasitic capacitor Cd. As a result, the potential of the storage capacitor or the liquid crystal capacitor formed adjacent to the parasitic capacitor is also changed to change the rearrangement state of the liquid crystal molecules, which causes problems such as flicker or crosstalk of the screen. An object of the present invention for solving this problem is to minimize the change in the signal transmitted to the sustain electrode line 28, for this purpose, the sustain voltage is connected to the parasitic capacitor (Cst) and one end in the same manner as described with reference to FIG. It is to make a fixing capacitor, it will be described in detail with reference to the drawings.

4 is a circuit diagram schematically illustrating a structure of a liquid crystal display according to a first exemplary embodiment of the present invention. 4 illustrates a case where the voltage transmitted to the sustain electrode line is the common voltage transmitted to the common electrode.

As shown in FIG. 4, each pixel includes a gate electrode 26 connected to a gate line 22, a source electrode 65 connected to a data line 62, and a drain electrode 66 connected to a pixel electrode 80. The formed thin film transistor TFT is formed. In each pixel, a liquid crystal capacitor C _LC and a storage capacitor Cst having both terminals connected to the pixel electrode 80, the common electrode 101, and the pixel electrode 80 and the storage electrode line 28 are formed, respectively. The parasitic capacitor Cd is formed at the portion where the storage electrode line 28 and the data line 62 cross each other. In this case, the common electrode 101 is connected to the plurality of storage electrode lines 28 such that the common voltage Vcom is commonly transmitted to the plurality of storage electrode lines 28.

Meanwhile, one terminal 85 is electrically connected to the storage electrode line 28 and the common electrode 101, and the other terminal 25 has a storage voltage fixing capacitor Ct that is grounded (GND). have.

In the liquid crystal display according to the present invention, if the capacitance of the holding voltage fixing capacitor Ct is formed to be much larger than the parasitic capacitance of the parasitic capacitor Cd formed between the data line 62 and the storage electrode line 28, According to the principle described with reference to FIG. 1, even if the data voltage changes, the change in the parasitic capacitance Cd may be minimized, thereby minimizing the change in the sustain voltage transferred to the sustain electrode line 28, which is a common voltage.

Next, a structure of the liquid crystal display according to the exemplary embodiment of the present invention having the storage voltage fixing capacitor will be described in detail with reference to the accompanying drawings.

5 is a plan view schematically illustrating a structure of a liquid crystal display according to a first exemplary embodiment of the present invention, and FIG. 6 is a cross-sectional view taken along the line VI-VI ′ of FIG. 5.

5 and 6, in the liquid crystal display according to the first exemplary embodiment of the present invention, the lower substrate 10 and the upper substrate 100 are stacked on each other, and the liquid crystal is disposed between the two substrates 10 and 100. Sealing material 300 to trap the material is formed. At this time, since the lower substrate 10 is larger than the upper substrate 100, a part of the edge of the lower substrate 10 is not covered by the upper substrate 100 and is exposed. As shown in FIGS. 2 and 3, the lower substrate 10 has a plurality of gate lines 22 formed in a horizontal direction and a data line 62 formed in a vertical direction. The right edge of the lower substrate 10 is connected to a gate tape carrier package 201 on which a gate driving integrated circuit 200 is electrically connected to the gate line 22 to output a gate driving signal. The upper edge of the lower substrate 10 is connected to the data TCP 601 in which a data driving integrated circuit 600 mounted thereon is electrically connected to the data line 62 to output a data driving signal. Here, the gate TCP 201 or the data TCP 601 are connected to gates and data printed circuit boards 700 and 800 that output electrical signals for driving the liquid crystal display.

On the other hand, as shown in FIG. 6, the display area A on the lower substrate 10 is the same layer as the gate line 22, and is a terminal of the storage voltage fixing capacitor Ct (see FIG. 4) and the ground voltage. The sustain voltage fixing first electrode 25 to be transmitted is formed, and the sustain voltage fixing first electrode 25 is covered with the gate insulating film 30 and the protective film 70 which are sequentially formed. Here, the display area R is a set of unit pixels defined by the gate line 22 and the data line 62 and arranged in a matrix, and is a portion where an image is displayed. On the upper portion of the passivation layer 70, a second voltage 85 for holding voltage, which is another terminal of the capacitor Ct (see FIG. 4), is overlapped with the first voltage 25 for holding the voltage. . Here, the second electrode 85 for fixing the sustain voltage is connected to the common electrode 101 of the upper substrate 100 through the contact point 501. Of course, instead of being formed on the upper part of the second electrode 85 for fixing the sustain voltage like the contact point 500, it may be directly formed on the upper part of the substrate 10 to transmit the common voltage to the common electrode 101. One or more 500 may be formed, and different common voltages may be transmitted to each of the contact points 500 and 501 to correct a delay of the common voltage.

In addition, the lower substrate 10 is provided with a storage voltage wiring 92 for transmitting a common voltage to the contact point 500 and the second electrode 85 for fixing the sustain voltage from the outside to fix the contact point 500 and the sustain voltage. It is electrically connected to the second electrode 85 for melting. In addition, the lower substrate 10 is provided with the sustain voltage correction wiring 91 for grounding the first electrode 25 for fixing the sustain voltage from the outside. Here, the sustain voltage wiring 92 and the sustain voltage correction wiring 91 may be formed of the same layer as the gate line 22 or the data line 62, and are formed on the gate or data TCPs 201 and 601. Electrical signals are received from the outside through the dummy pad (not shown). Here, the holding voltage fixing voltage transferred to the holding voltage fixing first electrode 25 may be any voltage, but is grounded as in the embodiment of the present invention so as not to affect other driving signals. Is preferred.

Here, the second electrode 85 for fixing the holding voltage may be formed of the same layer as the pixel electrode 80 or the data line 62. The holding voltage wiring 92 and the holding voltage correction wiring 91 may also be gated. It may be formed of the same layer as the line 22 or the data line 62. At this time, the holding voltage fixing capacitor Ct (see FIG. 4) includes the first electrode 25 and the second electrode 85, and is made through the gate insulating film 30 and the protective film 70.

On the other hand, the grounding first electrode may be formed of the same layer as the data line 62 or the pixel electrode 80, and the second electrode may be the common electrode 101 to form a capacitor for fixing the sustain voltage.

Therefore, in the present invention, the capacitor for fixing the holding voltage can be formed without any additional process on the manufacturing process of the thin film transistor. Here, the capacitance of the holding voltage fixing capacitor is preferably made to be 500 pF or more in order to minimize the change in the common voltage transmitted to the holding electrode line 28 (see FIG. 4).

Here, the gate driving integrated circuit 200 and the data driving integrated circuit 600 may be directly mounted on the lower substrate 10.

In the first embodiment of the present invention, as shown in FIG. 4, although the second electrode 85 of the storage voltage fixing capacitor is directly connected to the common electrode 101, the second electrode 85 may be connected to the storage electrode line 28. And a sustain electrode line. This will be described in detail with reference to FIGS. 7 and 8.

7 and 8 are circuit diagrams schematically showing the structure of a liquid crystal display device according to a second and third embodiment of the present invention.

As shown in Figures 7 and 8, most of the structure is the same as the first embodiment shown through FIG.

However, in the second embodiment of the present invention, as shown in FIG. 7, the second electrode 85 of the sustain voltage fixing capacitor Ct is connected to the sustain electrode line 28. In addition, in the third embodiment of the present invention, as shown in FIG. 8, the second electrode 85 of the storage voltage fixing capacitor Ct is connected to both the common electrode 101 and the storage electrode line 28.

In the embodiment of the present invention, a case in which the common electrode and the pixel electrode are formed in the shape of a flat plate on each substrate will be described. However, the linear common electrode and the pixel electrode are formed to face each other in parallel to one substrate and are almost parallel to the substrate. The same applies to the planar drive type liquid crystal display device that drives the liquid crystal molecules forming one electric field. In such a flat drive type liquid crystal display, a storage capacitor is formed by overlapping a common electrode and a pixel electrode. In this case, the first electrode of the holding voltage fixing capacitor may be grounded, and the second electrode may be electrically connected to the common electrode to transmit the common voltage.

As described above, when the liquid crystal display has a capacitor for fixing the holding voltage, even if the data signal transmitted to the data line changes, the change in the voltage transmitted to the sustain electrode line can be minimized, thereby improving the image quality of the product.

Claims (23)

A pixel electrode formed in each of the unit pixels arranged in a matrix form and having a data voltage to which the data voltage is transmitted, a common electrode facing the pixel electrode, and having a common voltage to rearrange liquid crystal molecules together with the data voltage; And a sustain electrode line constituting a sustain capacitor, a first electrode electrically connected to the sustain electrode line, and a second electrode insulated from and overlapping the first electrode and minimizing a change in the sustain voltage due to the inversion of the data voltage. A liquid crystal display device comprising a capacitor for fixing a holding voltage therefor. In claim 1, And the common voltage is transferred to the sustain electrode line as the sustain voltage. In claim 1, And the common electrode and the pixel electrode linearly face each other in parallel with each other, and are formed on one of two substrates of the liquid crystal display. In claim 1, The common electrode and the pixel electrode have a flat plate shape and are formed on two substrates of the liquid crystal display, respectively. In claim 1, And the second electrode is grounded. A gate wiring including a plurality of gate lines formed in a row direction, A data line comprising a data line insulated from and intersecting the gate line and formed in a column direction; A pixel electrode formed in each pixel of a matrix defined by the intersection of the gate line and the data line, and receiving an image signal from the data line; A storage electrode line formed in the same direction as the gate line and overlapping the pixel electrode to form a storage capacitor; A first electrode formed outside the display area formed of the set of pixels and electrically connected to the storage electrode line; A second electrode insulated from and overlapping the first electrode to form a storage voltage fixing capacitor Liquid crystal display comprising a. In claim 6, A thin film transistor formed at a portion where the gate line and the data line cross each other, and including a gate electrode connected to the gate line, a source electrode connected to the data line, a drain electrode connected to the pixel electrode, and a semiconductor layer Liquid crystal display further comprising a thin film transistor further comprising. In claim 6, And a common electrode configured to drive liquid crystal molecules together with the pixel electrode and to transmit a common voltage. In claim 8, The storage electrode line is electrically connected to the common electrode, and the common voltage is transferred to the storage electrode line. In claim 8, And the common electrode and the pixel electrode linearly face each other in parallel with each other, and are formed on one of two substrates of the liquid crystal display. In claim 8, The common electrode and the pixel electrode have a flat plate shape and are formed on two substrates of the liquid crystal display, respectively. In claim 6, And the first and second electrodes are formed of the same layer as the gate line, the data line, or the pixel electrode. In claim 6, And the second electrode is grounded. In claim 6, And a sustain voltage wiring which is formed of the same layer as the gate wiring or the data wiring, and which transmits a signal to the first electrode from the outside. In claim 6, And a sustain voltage correction line formed to have the same layer as the gate line or the data line and to ground the second electrode. In claim 6, And the sustain voltage fixing capacitor has a larger capacitance than a parasitic capacitance generated between the data line and the sustain electrode line. In claim 6, The capacitance of the holding voltage fixing capacitor is 500pF or more. A gate wiring including a plurality of gate lines formed in a row direction, A data line comprising a data line insulated from and intersecting the gate line and formed in a column direction; A pixel electrode formed in each pixel of a matrix defined by the intersection of the gate line and the data line, and receiving an image signal from the data line; A common electrode driving a liquid crystal molecule together with the pixel electrode and transmitting a common voltage; A storage electrode line formed in the same direction as the gate line and overlapping the pixel electrode to form a storage capacitor, and electrically connected to the common electrode; A first electrode formed outside the display area formed of the set of pixels and electrically connected to the common electrode; A second electrode insulated from and overlapping the first electrode to form a storage voltage fixing capacitor Liquid crystal display comprising a. The method of claim 18, And the common electrode and the pixel electrode linearly face each other in parallel with each other, and are formed on one of two substrates of the liquid crystal display. The method of claim 18, The common electrode and the pixel electrode have a flat plate shape and are formed on two substrates of the liquid crystal display, respectively. A gate wiring including a plurality of gate lines formed in a row direction, A data line comprising a data line insulated from and intersecting the gate line and formed in a column direction; A pixel electrode formed in each pixel of a matrix defined by the intersection of the gate line and the data line, and receiving an image signal from the data line; A common electrode driving a liquid crystal molecule together with the pixel electrode and transmitting a common voltage; A storage electrode line formed in the same direction as the gate line and overlapping the pixel electrode to form a storage capacitor, and electrically connected to the common electrode; A first electrode formed outside the display area formed of the set of pixels and electrically connected to the common electrode and the storage electrode line; A second electrode insulated from and overlapping the first electrode to form a storage voltage fixing capacitor Liquid crystal display comprising a. The method of claim 21, And the common electrode and the pixel electrode linearly face each other in parallel with each other, and are formed on one of two substrates of the liquid crystal display. The method of claim 21, The common electrode and the pixel electrode have a flat plate shape and are formed on two substrates of the liquid crystal display, respectively.

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