KR100670529B1 - Graphic signal driving method - Google Patents

Abstract

The present invention is a pulse width modulation (PWM) driving method for driving a display panel, particularly a display panel of a current driving type such as an organic EL.

That is, a segment line driving method performed by a source driver for driving a display panel of a current driving method, the current being supplied to the segment line is cut off during a predetermined first turn-off period according to the brightness indication to be output to the first common line. Step (S200); Supplying a high current to the segment line for a predetermined precharge period (S300); Supplying a driving current for a first common line to the segment line (S400); Blocking current supplied to the segment line (S450); Supplying a driving current for a second common line to the segment line (S500); Blocking current supplied to the segment line during a second turn-off period according to the brightness indication to be output to the second common line (S600); And removing the charge accumulated in the segment line (S700).

PWM, precharge, discharge, OLED, organic EL, source driver

Description

Video signal driving method {GRAPHIC SIGNAL DRIVING METHOD}

1 is a waveform diagram of a signal output to a segment line according to a video signal driving method of the prior art,

2 is a waveform diagram illustrating a palette pulse for implementing an image signal driving method according to an embodiment of the present invention and a detailed waveform diagram thereof;

3 is a waveform diagram illustrating a precharge palette pulse used to determine a precharge interval in accordance with one embodiment of the present invention;

4 is a circuit diagram illustrating a connection between a source driver and a gate driver of a pixel device for implementing a video signal driving method of the present invention;

5 is a waveform diagram of a signal output to a segment line according to the video signal driving method of the present invention;

6 is a waveform diagram of a signal output to a segment line according to the video signal driving method of the present invention when the brightness display of the pixel output to the first common line is a minimum value;

7 is an image frame diagram showing a first method for overcoming dogs by the video signal driving method according to the present invention;

8 is a waveform diagram showing a second method for overcoming dogs by the video signal driving method according to the present invention;

The present invention relates to a pulse width modulation (PWM) driving method for driving a display panel, and more particularly, to driving a display panel of a current driving method.

As a flat panel display device, an LCD panel, an organic EL panel, or the like is used. Among them, an organic EL panel uses an organic EL, a device driven by a current, and is supplied to each organic EL element in order to control its brightness and gray level. Adjust the amount of current.

Various control devices / methods for adjusting the luminance / gradation of the organic EL device have been proposed, and the PWM method to which the present invention is applied is sequentially driven in time division according to a predetermined line driving pulse for each line constituting the frame. In this method, the width of the line driving pulse is adjusted to adjust luminance (full screen brightness, luminance).

1 is a timing diagram of a signal showing a PWM driving method according to the prior art. As shown in the figure, after the common address is activated, precharging is performed with a higher current, and when the precharging is completed, a driving section in which each pixel data is reflected in the pixels on the line is continued, and the driving section ends. Then, a discharge period for preventing aging of the panel is continued. In this case, the brightness control is performed by the length of the driving section.

However, the prior art has a problem in that waste of power exists because precharge and discharge are performed for each common line.

The present invention has been made to solve the above problems, and provides an image signal driving method capable of preventing unnecessary waste of power.

According to another aspect of the present invention, there is provided a video signal driving method comprising: supplying a high current to the segment line during a predetermined precharge period (S300); Supplying a driving current for a first common line to the segment line (S400); Supplying a driving current for a second common line to the segment line (S500); And removing the charge accumulated in the segment line (S700).

In addition, when driving an image signal for an even frame, an even common line becomes the first common line, an odd common line becomes the second common line, and drives an image signal for an odd frame. In this case, the odd common line becomes the first common line, and the even common line becomes the second common line.

Hereinafter, exemplary embodiments of the present invention will be described in detail with reference to the accompanying drawings. Prior to this, terms or words used in the specification and claims should not be construed as having a conventional or dictionary meaning, and the inventors should properly explain the concept of terms in order to best explain their own invention. Based on the principle that can be defined, it should be interpreted as meaning and concept corresponding to the technical idea of the present invention. Therefore, the embodiments described in the specification and the drawings shown in the drawings are only the most preferred embodiment of the present invention and do not represent all of the technical idea of the present invention, various modifications that can be replaced at the time of the present application It should be understood that there may be equivalents and variations.

(Example)

The flat panel display device requires equipment for designating and driving an element which is responsible for displaying each pixel such as an organic EL and an LCD. The position of each pixel on the display plane can be specified by the X coordinate of the horizontal axis and the Y coordinate of the vertical axis, and the equipment for driving the display device using this point is also disposed on the X axis of the display panel. A source driver element for outputting a corresponding signal for a line or a source line, and a gate driver element disposed on the Y axis of the display panel for outputting a corresponding signal for each horizontal line (called a common line or a gate line) It includes. As shown in FIG. 2, in a state in which only the pixel elements Dp included in any one common line are activated by the gate driver 200, the source driver 100 includes the pixel elements included in each segment line ( The display is performed in such a manner as to supply driving power to Dp) according to the brightness indication.

The video signal driving method according to the present embodiment is a segment line driving method performed by a source driver for driving a display panel of a current driving method, and performs segment segmenting during a first turn-off period according to brightness indication to be output to a first common line. Blocking the current supplied to the line (S200); Supplying a high current to the segment line for a predetermined precharge period (S300); Supplying a driving current for a first common line to the segment line (S400); Blocking current supplied to the segment line (S450); Supplying a driving current for a second common line to the segment line (S500); Blocking current supplied to the segment line during a second turn-off period according to the brightness indication to be output to the second common line (S600); And removing the charge accumulated in the segment line (S700).

Meanwhile, the brightness display includes luminance indicating brightness of the entire screen and gradation indicating brightness of each pixel according to image data. Various methods for controlling brightness and gradation in current flat panel display apparatuses and The structure exists. Accordingly, the brightness display applied in steps S200 and S600 may be luminance or gray scale, or a value including both luminance and gray scale. If the brightness display applied in steps S200 and S600 applies only one of luminance or gray scale, the other one may be applied to the driving currents in steps S400 and S500 or to a common line selection signal of a separate gate driver. Can be.

The driving current for the first common line output in step S400 and the driving current for the second common line output in step S500 are output as the same segment line, and the division is made by selecting a common line by a separate gate driver. Is done. By performing the step S450, the output of the shifted image due to the mismatch of the common line selection timing is prevented. Therefore, the step S450 is to turn off the connection of the source driver and the segment line for a short period including the time of selecting (ie, switching) the activation common line by the separate gate driver.

During the sections in which the common address is activated, driving of steps S400 and S500 is performed during the sections except the turn-off periods determined in steps S200 and S600, and the brightness display calculated in steps S200 and S600 is applied to the display device. .

The step S200 may include: counting a predetermined binary number from a time point of activating a common address for a first common line (S210); Comparing the first milestone binary number determined according to the brightness indication to be output to the first common line with the counted binary number (S220); And determining the first turn-off period from the activation time of the common address for the first common line to the time when two binary numbers compared in the operation S220 are the same (S230). The method embodied in steps S210 to S230 may be applied when the brightness display of step S210 includes a gray level signal or a gray level signal and a luminance signal.

The milestone binary number is a value according to the gradation (or gradation and luminance) of the first common line calculated from the pixel data read from the graphic memory, and the counting of the predetermined binary digit in the step S210 may use a general counter, Counting for the predetermined binary number of the step may be performed using a palette pulse described below.

The step S500 may include: counting a predetermined binary number from an activation time point of a common address for a second common line (S510); Comparing a second milestone binary number determined according to the brightness indication to be output to the second common line with the counted binary number (S520); And determining the second turn-off period from the activation time of the common address for the second common line to the time when two binary numbers compared in the operation S520 are the same (S530). The method embodied in steps S510 to S530 may be applied when the brightness display of step S210 includes a gray level signal or a gray level signal and a luminance signal. The step S510 may also be performed using a palette pulse similarly to the step S210, which will be described later.

Hereinafter, the principle of the pallet pulse will be described in detail with reference to FIGS. 2 and 3. First, the control of each driving section for the first / second common line will be described.

Looking at the shape of the palette pulse of Figure 2 it can be seen that the symmetry between both the driving section and the section. In the case of driving the first common line, the role of the palette pulse is to determine the driving section of each common line at a point where the 6-bit data value when the memory data and the palette pulses are made into a bus is small or coincident. That is, comparing the bits of the memory data with the pallet pulses corresponds to steps S220 and S520, and thus enabling / disabling the driving PWM signal for the corresponding common line corresponds to steps S230 and S530. do.

That is, when using the palette pulse, in step S210, the first palette pulse (palette_pulse_0) for outputting the high value and the low value at 1/2 frequency of the count frequency, the high value and low at 1/4 frequency of the count frequency second palette pulse (palette_pulse_1), third palette pulse (palette_pulse_2) to a high frequency one-half ⁶ and the low frequency value of the count value and outputting a high value and a low value by 1/8 the frequency of the count frequency of the output value It generates a sixth palette pulse for outputting the. In operation S220, the logic values of the first to sixth palette pulses are compared with the logic values of the respective digits of the 6-bit first milestone binary.

In addition, the PWM signal is necessarily generated only within the driving time period. Referring to the operation of the enlarged section in FIG. 2, it can be seen that the memory data is 58, the binary number is 111010, and the value of the palette pulse is 111010. The driving period (PWM signal) for the first common line is determined as starting from the matching point until the first common line address is deactivated, and the driving period (PWM signal) for the second common line is determined as the second. From the time when the common line address is activated until the matching point.

Next, the control of the precharge section for the first common line may also be performed as a separate palette pulse, as shown in FIG. 3 and the following description.

First, the most central operation is to generate a separate precharge palette pulse having the same shape as the driving PWM, shift it by a desired precharge PWM size (for example, 16 clocks) and send it to the local block. In this case, the local block uses this signal to generate the PWM signal only until the bus data of the pallet pulse is smaller than or equal to the memory data as in the case of driving. And again, this signal is only inverted within the precharge driving range. This creates a signal pre_pwm_r_en, shown in FIG. Observing the shape of this signal, it can be seen that the section between the driving PWM signal pwm_r_1 and the pre_pwm_r_en signal exists exactly as the size of the precharge PWM signal. When the coarse logic is created using these signals, the precharge PWM signal of the set size always follows the driving PWM signal according to the memory data. If the memory data is 0, the driving PWM signal is not generated and only the precharge PWM signal is generated.

4 and 5, an execution section of steps S200 to S700 will be defined, and operation of the source driver and the gate driver in the section will be described.

The step S200 is performed in the section indicated by ① of FIG. 5, and in this step, the source driver of FIG. 4 does not supply current to the corresponding segment line by turning off all switches.

The step S300 is performed in the section indicated by ② of FIG. 5, in which the source driver turns on the S1 switch and outputs the output current (pre-charge current) of the high voltage current source 20 to the corresponding segment line. The precharge current charges the plate capacitor Cp of the pixel selected by the turn-on of the S4 switch of the separate gate driver among the pixels of the segment.

The step S400 is performed in the section indicated by ③ of FIG. 5, in which the source driver turns on the S2 switch to output the output current (driving current) of the driving current source 30 to the corresponding segment line. The driving current drives only the light emitting device Dp of the pixel included in the first common line selected by the turn-on of the S4 switch of the separate gate driver among the pixels of the corresponding segment. The step S400 ends with the deactivation of the common address.

The step S450 is a process performed in the section ④ of FIG. 5, in which the source driver turns off all switches, and a separate gate driver also supplies an idle potential (Vdc) to all common lines, thereby displaying the display. Pause all pixels in the panel.

The step S500 is performed in the section ⑤ of FIG. 5, in which the source driver turns on the S2 switch to output the output current (driving current) of the driving current source 30 to the corresponding segment line. The driving current drives only a light emitting device (not shown) of a pixel included in a second common line selected by turning on an S4 switch of a separate gate driver among pixels of the corresponding segment. Step S500 is also maintained only by the number of counts according to the pixel data value. As described above, a palette pulse similar to step S200 may be used.

The step S600 is a process performed in the section indicated by ⑥ of FIG. 5 and starts at the end of the step S500 and ends before a predetermined time before the corresponding common address is deactivated. In the case of using the pallet signal, as shown in FIG. 2, the period from when the pallet signal starts to oscillate and ends is set to have a maximum section length (driving section length when the brightness display value is the largest) of the driving signal. . Then, it may be determined as a section ⑥ from the end of the step S500 to the end of the oscillation of the pallet signal.

The step S700 is a process performed in the section ⑦ of FIG. 5, and in the state in which the idle potential Vdc is applied to all common lines by the gate driver, S3 is turned on and the ground voltage VSS is applied to the segment line. Will be supplied. As a result, the charge accumulated in the plate capacitor Cp of all the pixels of the display panel is discharged.

The processes of steps S100 to S700 are performed by the source driver 100 and the gate driver 200 shown in FIG. 4. However, in this case, the operation of the gate driver 200 is not different from the case of the related art, and the idea of the present invention is realized by the source driver 100. The states of the switches S1 to S5 in the sections ① to ⑦ of FIG. 5 in which the steps S100 to S700 are performed are shown in Table 1 below.

The length of each of sections ① to ⑦ will be described in detail with reference to FIGS. 5 and 6 as follows.

Waveform A of FIGS. 5 and 6 shows a signal output to the segment line when the brightness display (luminance and / or gradation) is the maximum value, and waveform B is a segment line according to the brightness display for each pixel. The output signal is shown.

For waveform A, the section in which the common address for the first common line is activated is divided into a precharge section PR0 and a first full driving section FR1, and the discharge is performed. The section in which the common address for the two common lines is activated is divided into a second full driving section FR2 and a discharge section CR0.

For waveform B, the section in which the common address for the first common line on which the precharge is performed is activated is divided into a first turn-off section OR1, a precharge section PR, and a first driving section DR1. The period in which the common address for the second common line is discharged is activated is divided into a second driving period DR2, a second turn-off period OR2, and a discharge period CR.

The precharge section PR0 and the discharge section CR0 of the waveform A have the same length as the precharge section PR and the discharge section CR of the waveform B. FIG. The length of the first driving section DR1 of waveform B is determined according to the grayscale and / or luminance to be displayed on the corresponding pixel of the first common line, and the second driving section DR2 has the corresponding pixel of the second common line. The length is determined according to the gradation and / or luminance to be displayed on the screen.

The first turn-off period OR1 of the waveform B is equal to the length of the first driving section DR1 of the waveform A minus the first full driving period FR1 of the waveform A and corresponds to the first common line. The length is calculated in advance from grayscale and / or luminance values to be displayed on the pixels, and is applied using a palette signal or the like as described above.

The second turn-off period OR2 of the waveform B is equal to the length of the second driving period DR2 of the waveform A minus the second driving period FR2 of the waveform A, as described above. Is determined at the end of the second driving section DR2, and the end point is determined at the completion of counting of the pallet signal or the like.

However, when using the video signal driving method as described above, the following color problem occurs.

The first common line is performed in a state where the precharge is always sufficiently made in the same amount, but the second common line is performed in a state where the precharge is variable and made in a lesser amount. Therefore, there may be a difference in luminance between the first common line and the second common line, which reduces color.

As shown in FIG. 7, the first method for alleviating the color image problem is to alternate physical common lines on the display panel corresponding to the first common line and the second common line for each display frame. As an implementation for this, the display always drives an even number of common lines, but the source driver adds one virtual common line per frame, thereby driving an odd number of common lines. Then, the precharge is performed by the precharge section alternately between the even common line and the odd common line according to the frame. In addition, due to the frame frequency faster than the afterimage retention time of the human, the luminance difference between the common line where precharge is performed and the common line which is not performed is visually eliminated.

That is, in the driving method of the video signal including the steps S200 to S700, when driving the video signal for the even-numbered frame, the even-numbered common line becomes the first common line, and the odd-numbered common line It becomes the second common line. On the other hand, when driving an image signal for an odd frame, the odd common line becomes the first common line, and the even common line becomes the second common line.

As shown in FIG. 8, the second method for alleviating the color image problem may provide a difference between the length of the driving section of the first common line and the length of the driving section of the second common line. This means that there is sufficient precharge section in the case of the first common line, and the signal in the driving section is used to drive the pixel elements, but in the second common line, the precharge is not enough, To compensate for the signal being used to complete the precharge. Therefore, when the first common line and the second common line display the same luminance and / or gray level, the driving section of the first common line has a length slightly shorter than that of the second common line.

As described above, if the image signal driving method of the present embodiment is performed, the driving PWM signal (section ③ of FIG. 4) is performed when the brightness indication to be applied to the corresponding pixel of the first common line is 0 (darkest brightness). Only the precharge PWM signal (section ② of FIG. 4) is generated without being generated. By the way, in the case of using the first method and the second method for mitigating the color problem, the preliminary charge generated in the case of the first common line having zero brightness indication is applied to the plate capacitor Cp of the pixel. Excess charge may accumulate, causing excessive driving of the second common line, thereby adversely affecting the retrofit. Therefore, by forcibly adding a zero detection function, when the brightness display of the corresponding pixel of the first common line is 0 (or close to), the precharge section of step S300 may be omitted. The method of determining whether the brightness indication is 0 (or near zero threshold) is determined as a value of the first milestone binary number in step S300. In the present embodiment, since the first milestone binary number represents the length of the turn-off section, the first milestone binary number may be implemented to omit the precharge section if it is larger than a predetermined threshold.

Although the present invention has been described by way of limited embodiments and drawings, the present invention is not limited thereto, and the technical spirit of the present invention and the claims to be described below by those skilled in the art to which the present invention pertains. Of course, various modifications and variations are possible within the scope of equivalents.

By performing the video signal driving method according to the present invention, there is an effect that can prevent power consumption due to frequent charging and discharging of the plate capacitor.

Claims (20)

delete Cutting off a current supplied to the segment line during a predetermined first turn-off period, the length of which is determined according to the brightness indication to be output to the first common line (S200); Supplying a high current to the segment line for a predetermined precharge period (S300); Supplying a driving current for a first common line to the segment line (S400); Blocking current supplied to the segment line (S450); Supplying a driving current for a second common line to the segment line (S500); Cutting off a current supplied to the segment line during a second turn-off period, the length of which is determined according to the brightness indication to be output to the second common line (S600); And Removing charges accumulated in the segment line (S700) Image signal driving method comprising a. The method of claim 2, wherein the step S200, Counting a predetermined binary number from an activation time of a common address for a first common line (S210); Comparing the first milestone binary number determined according to the brightness indication to be output to the first common line with the counted binary number (S220); And Determining the first turn-off period from the time of activating the common address for the first common line to the time when two binary numbers compared in the step S220 are the same (S230) Image signal driving method comprising a. The method of claim 3, The S210 step, A first palette pulse that outputs high and low values at half frequency of the count frequency, a second palette pulse that outputs high and low values at 1/4 frequency of the count frequency, to 1/2 ^N of the count frequency Generates an N-th palette pulse (N is a natural number) that outputs high and low values as frequencies, The step S220, Comparing the logic values of the first to Nth palette pulses with the logic values of the respective digits of the first milestone binary number, respectively. Video signal driving method, characterized in that. The method of claim 2, wherein the step S300, Beginning at the end of the step S200, The video signal driving method is terminated when a predetermined fixed delay time passes. The method of claim 2, wherein the S400 step, Beginning at the end of the step S300, And the video signal driving method is terminated when the common address for the first common line is inactivated. The method of claim 2, wherein the step S500, Counting a predetermined binary number from an activation time point of a common address for a second common line (S510); Comparing a second milestone binary number determined according to the brightness indication to be output to the second common line with the counted binary number (S520); And Determining as a section for supplying a driving current for the second common line from the time of activating the common address for the second common line to the time when two binary numbers compared in the step S520 become the same (S530). Image signal driving method comprising a. The method of claim 7, wherein The S510 step, A first palette pulse that outputs high and low values at half frequency of the count frequency, a second palette pulse that outputs high and low values at 1/4 frequency of the count frequency, to 1/2 ^N of the count frequency Generates an N-th palette pulse (N is a natural number) that outputs high and low values as frequencies, The step S520, Comparing the logic values of the first to Nth palette pulses with the logic values of the respective digits of the second milestone binary number, respectively. Video signal driving method, characterized in that. The method of claim 7, wherein the step S600, Beginning at the end of the step S500, And the binary number counted in step S510 ends when the binary number equals to a predetermined maximum section milestone binary number. The method of claim 2, wherein the S700 step, Beginning at the end of the step S600, And the video signal driving method is terminated when the common address for the second common line is inactivated. The method of claim 3, And if the first milestone binary number is smaller or larger than a predetermined threshold value, step S300 is omitted. The method according to any one of claims 2 to 11, wherein If the first common line and the second common line display the same luminance and / or gray scale, the driving section of step S400 is slightly shorter than the driving section of step S500. The method according to any one of claims 2 to 11, wherein And the video signal driving method is performed by a source driver for driving the organic EL panel. Supplying a high current to the segment line for a predetermined precharge period (S300); Supplying a driving current for a first common line to the segment line (S400); Blocking current supplied to the segment line (S450); Supplying a driving current for a second common line to the segment line (S500); And Removing the charge accumulated in the segment line (S700), When driving an image signal for an even frame, an even common line becomes the first common line, an odd common line becomes the second common line, When driving a video signal for an odd frame, the odd common line becomes the first common line, and the even common line becomes the second common line. The method of claim 14, Before the step S300, further comprising the step (S200) of blocking the current supplied to the segment line during a predetermined first turn-off period, the length is determined according to the brightness display to be output to the first common line, After the step S500 and before the step S700, blocking current supplied to the segment line during a predetermined second turn-off period whose length is determined according to the brightness indication to be output to the second common line (S600). Video signal driving method further comprising. delete The method of claim 14, wherein the step S200, Counting a predetermined binary number from an activation time of a common address for a first common line (S210); Comparing the first milestone binary number determined according to the brightness indication to be output to the first common line with the counted binary number (S220); And Determining the first turn-off period from the time of activating the common address for the first common line to the time when two binary numbers compared in the step S220 are the same (S230) Image signal driving method comprising a. The method of claim 14, wherein the step S500, Counting a predetermined binary number from an activation time point of a common address for a second common line (S510); Comparing a second milestone binary number determined according to the brightness indication to be output to the second common line with the counted binary number (S520); And Determining as a section for supplying a driving current for the second common line from the time of activating the common address for the second common line to the time when two binary numbers compared in the step S520 become the same (S530). Image signal driving method comprising a. The method according to any one of claims 14, 15, 17 and 18, If the first common line and the second common line display the same luminance and / or gray scale, the driving section of step S400 is slightly shorter than the driving section of step S500. The method according to any one of claims 14, 15, 17 and 18, And the video signal driving method is performed by a source driver for driving the organic EL panel.

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