KR100666162B1 - Control module of mass memory-stored data of satellite - Google Patents

Abstract

A module for controlling a mass memory of a satellite is provided to increase processing efficiency of data stored in the mass memory and correctly download the stored data to the ground in a needed period by advancing a command of a CPU with priority set in hardware. An access arbiter(110) determines an input signal cycle applied to the mass memory(30) among the input signal cycles for multiple tasks to be processed on the basis of the control from the CPU of the satellite by the set priority. A multiplexer(120) generates a control and access signal to be applied to the mass memory according to determination of the access arbiter. An error corrector(130) calculates an ECC(Error Checking and Correction) code value for correcting an error generated in the mass memory. An initializer(140) sets up operation configuration by setting a register value of the mass memory. A task unit(150) sets up, generates, and stores a cycle signal for executing each task by the control of the access arbiter.

Description

Control module of mass memory-stored data of satellite

1; A diagram for describing a process of processing large amounts of data performed by one embodiment of the present invention.

2; Block diagram of a large-capacity memory control module according to an embodiment of the present invention.

3; A diagram illustrating a signal movement and processing process centering on a satellite large memory control module according to an embodiment of the present invention.

4; Signal cycle for performing each task generated in the mass memory control module of the present embodiment.

<Description of Symbols for Major Parts of Drawings>

10: Mass Memory Control Module

110: Approach Foundation 120: Multiplexer

130: error correction stage 140: initial setting stage

150: task unit

151: refresh unit 152: PM unit

153: PB unit 154: initialization unit

155: Scrub Unit

160: power supply

20: central processing unit

30: large capacity memory

40: buffer

50: downlink module

60: decoder

In the present invention, a large-capacity memory control means (module) of a satellite included in a satellite system for controlling a large-capacity memory has been stored by proceeding by setting a command instructed from the central processing unit in hardware according to a set priority. To improve the processing efficiency of data and to send it to the ground exactly when needed, a large-capacity memory control module of satellite is presented.

In general, Earth orbiting low-orbiting satellites perform missions orbiting the Earth 14.5 times a day on a solar orbit at an altitude of 685 km. On the ground, it also receives satellite images, which are the result of missions performed by satellites, and periodically transmits operational status data to manage the operation of satellites. It also receives the operation status data stored in the large memory at once.

Multipurpose satellites use a 1G bit DRAM module to store the operating state of the satellite. The memory module has a total of 1024 pages, and each page consists of 128K bytes. Refresh, which is essential for DRAM characteristics, is performed through a 13-bit sequential address counter embedded in an individual chip. In general, 8192 refreshes are performed within 64 ms. In the meantime, the mechanical structures and electronic components that make up the satellites encounter various extreme operating environments different from the ground environment. Among them, DRAM changes the value of one bit of memory due to the influence of radioactive materials. do.

To prevent this, the satellite has an error detection and correction circuit, and basically, it reads the memory contents periodically from the first page to the last page to check whether the values are correct. If the value is corrupted, but the calibration is possible, the calibration value is recorded again immediately. If the calibration is not possible, the corresponding page can be initialized.

This periodic reading of the value of the memory is called memory scrubbing. In the case of KOMPSAT 2, the software performs the memory scrubbing task by default, but KOMPSAT 3 is designed to perform scrubbing in hardware. (See Republic of Korea Patent No. 0465421)

The types of data generated by satellites and sent down to the ground can be classified into real-time data and memory data.

Unlike general systems, satellites perform tasks such as recording data from the central processing unit, refreshing large amounts of memory, transferring memory stored data to downlink modules, initializing pages in memory, and scrubbing memory. Will be performed.

These tasks are necessary to maintain the integrity of large memory data in addition to the purpose of storing and transferring data, and can be performed by software, but in doing so, the software must process the events of each task every time. There is a problem that the load on the software is increased.

Accordingly, an object of the present invention for solving the above-mentioned problems is that the present invention is directed to a large-capacity memory control means (module) of a satellite included in a satellite system for controlling a large-capacity memory, and sets a command directed from a central processing unit. It is to provide a technology for the satellite large memory control module that improves the processing efficiency of the stored data and sends it to the ground exactly when needed by setting and proceeding in hardware according to the priority.

Mass memory control module of the present invention for achieving the above object, the access intermediate stage, multiplexer, error correction stage, initial stage, and the task unit stage is the center and includes a power stage for the power source, etc. In addition, interworking is performed between components such as the central processing unit, the mass memory, the buffer, the downlink module, and the decoder constituting the satellite system.

Hereinafter, with reference to the accompanying drawings will be described in detail an embodiment of the present invention.

1 is a view for explaining the processing of a large amount of data performed by an embodiment of the present invention.

As shown, the central processing unit 20, the large-capacity memory 30, the buffer 40, downward in the processing of the large-capacity data performed according to an embodiment of the present invention, mainly the large-capacity memory control module 10. The link module 50 and the decoder 60 operate in conjunction with each other to proceed.

As described above, the types of data generated by the satellite and to be sent down to the ground can be classified into real-time data and memory storage data.

The real-time data is data generated by the central processing unit 20 as needed, which can be transmitted to the downlink module 50 or the mass memory 30, and the memory storage data is stored in the mass memory 30. This data is the data that can be transmitted to the ground if necessary. These two types of data are grounded via the downlink module 50 in real time or data stored in the large-capacity memory 30 according to the operation of the large-capacity memory control module 10 by the command of the central processing unit 20. Send down or store real-time data in the mass memory 30.

2 is a block diagram illustrating a mass memory control module according to an embodiment of the present invention.

As shown, the large-capacity memory control module 10 of the present embodiment is centered on the access intermediate stage 110, the multiplexer 120, the error correction stage 130, the initialization stage 140, the task unit stage 150 This is provided with a power supply terminal 160 for the power supply.

The task unit 150 includes a refresh unit 151, a PM unit 152, a PB unit 153, an initialization unit 154, and a scrub unit 155, respectively.

First, the approaching foundation 110 is applied to the mass memory 30 according to the priority set among the input signal cycles for each task to be processed based on the control input from the central processing unit 20 of the satellite system. As a component that performs a function of determining an input signal cycle to be performed, it can be said to be a kind of arbiter that plays a key function among the components of the mass memory control module 10.

The multiplexer 120 performs a function of generating a control signal and an access signal to be applied to the mass memory 30 according to the determination of the access arbitration 110.

The error correction unit 130 (EDAC) calculates an error correction code value for correcting an error occurring in the mass memory 30. The error correction stage 130 (EDAC) always accesses the mass memory 30 except for the signal cycle and the refresh cycle of the initial stage 140 among the signal cycles that access the mass memory 30. It is the component to check.

And the initial setting stage 140 is a component for setting the operation configuration by setting a register value of the mass memory (30). More specifically, the memory used as the mass memory 30, for example, sets a register value mounted in the SDRAM, and through this, a function of configuring the configuration of how to use the mass memory 30 is provided. Perform.

The task unit 150 sets and stores an execution cycle signal for each task to be processed in order to process the data of the mass memory 30, and according to the instruction of the access arbitration 110 As a component for generating a signal cycle for executing a task to be performed, when the service is required, the interrupting step is applied to the access arbitration 110.

In the present embodiment, the task is performed based on five tasks, and the task unit 150 may perform the refresh unit 151, the PM unit 152, the PB unit 153, the initialization unit 154, and the screen. Each of the love units 155 is as described above.

First, the refresh unit 151 generates a cycle of refresh cycles to periodically perform a refresh, and the initialization unit 154 generates a cycle cycle required for initialization of the memory. The scrub unit 155 is a unit for generating periodic cycles for memory scrubbing.

The PM unit 152 is a unit that generates signal cycles to be irregularly generated under the control of the central processing unit 20, and the PB unit 153 (Play Back) plays data stored in the mass memory 30. This unit generates a cycle for playing back. Therefore, the data recording task T1 of the central processing unit and the downlink module transmission task T3 of the memory storage data are performed with the PM unit 152 and the PB unit 153 (Play Back) as the center.

The PM unit 156 is a subsidiary unit for supplying initial power, and has a unique routine different from the units.

These units memorize their own periods, and when the service is needed, the interrupting unit 110 applies an interrupt.

As described above, the present invention includes a large-capacity memory control module 10 in a satellite system, and a process of setting and setting a large amount of data processing in hardware, which has been performed through a conventional software process. In order to solve the load problem caused by software processing and the delay of processing.

First, the software processing and hardware processing intended in the present invention will be described.

As described above, the software processing has a certain processing routine or processes tasks to be processed by a processing program or the like. Of course, this software processing is accomplished by the movement of a very small number of signals on the electronic circuit, but the center of the software is the central processing that is processed first in software. For example, when prioritizing a number of tasks to be processed, it is a software process to process the core prioritization by a certain processing routine or an execution program.

However, in the present invention, this process is initially set in hardware and thereafter, such a task is not hardware-processed on a circuit but hardware-processed on a circuit, thereby reducing the load generated by software processing of repetitive or periodic nature. To solve the problem.

3 is a view for explaining a signal movement and processing process centering on the large-capacity memory control module of the satellite according to an embodiment of the present invention.

As described above, in order to reduce the load of the software, the mass memory control module 10 processes the various tasks in a hardware and dominant manner, in order to reduce the load of the software.

Looking at the common process first, when the central processing unit 20 to instruct the mass memory control module 10 through the data (Data), Address (Address) line, the decoder 60 itself Determining the state of, and when the condition matches the condition presented by the CPU 20, decode the command. In this case, the decoded commands include a command for selecting whether the central processing unit 20 only writes data to the mass memory or downlinks the data through the downlink module 50, and initializes a page of the specific mass memory 30. , A scrubbing command, and a specific page downlink command of the mass memory 30.

First, the data recording task T1 of the central processing unit is a task that is performed when the central processing unit 20 sends down real-time data to the ground or attempts to record it in the mass memory 30. This is a task that can preempt the service of the memory control module 10 first.

If it is determined that the result of decoding for performing this task is the data writing task T1 of the central processing unit, the decoder 60 sets ① RT_ON to 1 in the mass memory control module 10, and the data line. Downlink the data or write the data in the location of the address defined in RT_PAGE of the mass memory 30. In this case, when performing downlink, data is transmitted to the downlink module 50 through RT_DATA as it is. When RT_EN and Downlink_ON are set to 1, the downlink module 50 receives while generating RT_CLK having a predetermined period. Data is sent down to the transmitter through the RT_DATA line. In this case, the data is actually stored in the buffer 40 for a while and then sent down to the transmitter to prevent the loss of data that may occur in the downlink.

Secondly, the mass memory refresh task T2 is a refresh task T2 that is periodically performed by the mass memory 30.

Since the task is automatically performed from the time when the power is first supplied to the mass memory control module 10, the mass memory control module 10 automatically executes through the control signal pins of the mass memory 30 when necessary. Done.

Third, the downlink module transmission task T3 of the memory stored data is a task that occurs when the mass memory 30 stored data is sent to the ground as needed.

If the result of decoding by the decoder is to transmit the memory stored data to the downlink module (1), PB_ON is set to 1 and the start and end numbers of the pages of the mass memory 30 to be downlinked are indicated through PB_START and PB_END. do. On the other hand, the data coming up from the mass memory 30 is loaded on the PB_DATA with the signals PB_EN and Downlink_ON as 1 and exported to the downlink module 50. The downlink module 50 transmits the received data to the transmitter through the PB_DATA line by making the PB_CLK having a predefined period. On the other hand, even in the case of transmission of the memory stored data, it is sent to the ground after being stored in the buffer for a while as in the case of the real-time data transmission.

In the fourth memory page initialization task T4, since the unit of the mass memory 30 is a page, one page is required when the page is first used after the power is applied or when the corresponding page is found to be defective. It is a task to initialize.

The central processing unit 20 can read the DBE (Double Bit Error) and SBE (Single Bit Error) counter values recorded in the mass memory 30 through the mass memory control module 10 as needed, At this time, if it is determined that DBE has occurred in a specific page, the decoder 60 may request to initialize the specific page. At this time, the page to be initialized is specified by the HW_INIT_PAGE signal, and by writing 1 to the HW_INIT_ON signal, the actual initialization is performed by the mass memory control module 10.

Finally, since the memory scrubbing task T5 is highly likely to be corrupted in the mass memory 30 due to various factors in the space environment, the data of the mass memory 30 is periodically read to prevent this. This task checks the status and rewrites it.

This task is automatically performed by the mass memory control module 10 like the mass memory refresh, but the central processing unit 20 may turn on / off the scrubbing task T5. To this end, if the decoder 60 recognizes a command to perform scrubbing, it designates a page for scrubbing through SCRUB_START and SCRUB_END and writes 1 to the SCRUB_ON signal, thereby causing the mass memory control module 10 to scrub. to be.

Except for the data recording task T1 of the central processing unit, the tasks are to generate an event at regular intervals. When finished, it ensures that the highest existing task is performed. In addition, when the high priority task is terminated, it automatically receives the service in order from the highest priority task among the existing tasks.

In addition, the priority between the tasks is determined as follows.

First, the data writing task T1 of the central processing unit has the highest priority in order to fulfill the original purpose of sending data in real time, and the refresh task T2 is next because the mass memory 30 itself is a volatile DRAM. Priority was set. Next, a downlink module transmission task T3 of the stored data transmitted when the data stored in the mass memory 30 is requested from the ground. In addition, the memory initialization task T4 may check the availability through the initialization when the page is found to be defective due to a data error, such as before the first use of the mass memory 30 or due to the influence of cosmic radiation. The next priority was given. Finally, the scrubbing task (T5), which reads the data of the mass memory 30 and checks the error periodically and rewrites the data, is concerned about the deterioration of the data of the mass memory 30 that may occur only in a space environment. .

4 is a diagram illustrating a signal cycle for performing each task generated in the mass memory control module according to the present embodiment.

As shown in the figure, except for the data recording task of the central processing unit, all four tasks have a regular cycle, have their own constant execution time, and the tasks are actually performed by the priority of the tasks. This hardware processing reduces the load on the software.

As described above, the present invention can reduce the load on the software and send the stored data to the ground accurately when needed, and can effectively maintain and manage desired data by preventing data corruption of the memory in a space environment. It works.

Claims (3)

In controlling the large memory included in the satellite system, Based on the control from the central processing unit of the satellite system, the access intermediate foundation for determining the input signal cycle to be applied to the mass memory 30 according to the priority set among the input signal cycles for the plurality of tasks to be processed 110; A multiplexer (120) for generating a control signal and an access signal to be applied to the mass memory (30) according to the determination of the access intermediate foundation (110); An error correction stage 130 for calculating an error correction code value for correcting an error occurring in the mass memory 30; An initial setting stage (140) for setting an operation configuration by setting a register value of the mass memory (30); Task unit stage 150 for setting and storing the execution cycle signal for each of the tasks to be processed and generating a signal cycle for executing the corresponding task in accordance with the instructions of the approach intermediate step 110 By including A large-capacity memory control module of a satellite, characterized in that to set the processing process in accordance with the control of the central processing unit of the satellite system to process in hardware. The method of claim 1, wherein the plurality of tasks, A data recording task (T1) of the central processing unit, which the central processing unit 20 proceeds at the time of real-time data terrestrial transmission and recording to the mass memory 30; A large memory refresh task T2 that is periodically refreshed in the large memory 30; A downlink module transmission task (T3) of memory stored data generated during terrestrial transmission of the stored data of the mass memory 30; A page initialization task of memory for initializing one page after applying power and when the corresponding page of the mass memory 30 is found to be defective; Of the memory scrubbing task (T5) to periodically read the data of the mass memory 30, check the status and rewrite to prevent data corruption of the mass memory 30, Large capacity memory control module of the satellite, characterized in that it comprises at least one. The method of claim 1, wherein the task unit 150, A refresh unit 151 for generating a refresh cycle of a predetermined period in order to periodically refresh the mass memory 30; A PM unit 152 for generating signal cycles to be generated irregularly under the control of the central processing unit 20; A PB unit 153 for generating a periodic cycle for playing back data stored in the mass memory 30; An initialization unit 154 for generating a cycle for initializing the mass memory 30; And a scrub unit (155), each generating a cycle cycle for scrubbing of the mass memory (30), respectively.

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