KR100626061B1 - Plasma display panel - Google Patents

Abstract

According to the present invention, a plasma display panel is disclosed. The plasma display panel is disposed between the upper substrate and the lower substrate, the upper substrate and the lower substrate disposed to face each other, and extends over a partition wall and the light emitting cells to define a plurality of light emitting cells together with the upper substrate and the lower substrate. In the plasma display panel including a plurality of electrodes to be performed and a dielectric layer formed to fill the electrodes, a dummy barrier rib is formed outside the barrier rib, and the dummy barrier rib is formed outside the dielectric layer. According to the plasma display panel, while a new dielectric layer forming method, which shortens the number of processes and processing time, is applied, an excessive gap between upper and lower structures is prevented, thereby ensuring stable driving.

Description

Plasma Display Panel {Plasma display panel}

1 is a plan view showing a plasma display panel according to a first embodiment of the present invention;

FIG. 2 is a diagram illustrating the plasma display panel shown in FIG. 1, illustrating an exploded perspective view of a display area;

3 is a schematic illustration of an apparatus for forming the dielectric layer of FIG. 2;

4 is a profile showing the thickness of the dielectric layer applied using the dielectric layer forming apparatus shown in FIG. 3 along the application direction thereof;

5 is a cross-sectional view taken along the line VV of FIG.

6 is a cross-sectional view showing a plasma display panel according to a second embodiment of the present invention;

<Description of the symbols for the main parts of the drawings>

100,200: plasma display panel 110,210: upper panel

111,211: upper substrate 112: scanning electrode

113: sustain electrode 114,214: dielectric layer

116: discharge sustaining electrode pair 120,220: lower panel

121,221: Lower substrate 122,222: Address electrode

123,223: Dielectric layer 124,224: bulkhead

125,225 phosphor layer 140,240 dummy bulkhead

145,245: Sealant 300: Slot die

310: nozzle 320: supply pump

330: storage tank 350: stone tablet

360: vacuum pump

The present invention relates to a plasma display panel, and more particularly, to a plasma display panel which is stable in operation by preventing excessive gaps between upper and lower structures while applying a new dielectric layer forming method which shortens the number of processes and processing time. It is about.

The plasma display panel is a flat panel display panel which displays an image by using gas discharge phenomenon, and is excellent in various display capabilities such as display capacity, brightness, contrast, afterimage, and viewing angle. In addition, it is being spotlighted as a next-generation flat panel display panel that can replace a CRT because it is thin and can display a large screen.

A typical plasma display panel includes an upper substrate and a lower substrate facing each other up and down, and a partition wall is disposed between the upper substrate and the lower substrate to divide a plurality of light emitting cells. Electrodes are disposed across the light emitting cells, and display discharge is performed by these electrodes to realize a predetermined image. The electrodes are filled by a dielectric layer, which serves to protect the electrodes from damage by colliding with charged particles of the discharge gas.

According to the prior art, the dielectric layer is formed by a screen printing method, whereby a screen mask having a predetermined pattern is disposed on the substrate on which electrodes are formed, a dielectric paste is placed on the screen mask, and then pressed by a squeezer to press the screen. The dielectric paste is applied through the opening of the mask. After the dielectric paste is applied, it is subjected to a baking process that is cured at high temperature. In the case of applying the screen printing method, since the thickness of the dielectric layer that can be formed through one coating is limited, there is a problem in that the dielectric layer of the desired thick film is obtained only after several coating and baking processes are repeated. As the number of processes is increased, the manufacturing time of the plasma display panel is increased, and product yield is reduced. In addition, since the number of times of the firing process is different from each other even in the same dielectric layer, there is a problem that the material properties are changed differently.

The present invention was created in order to solve the above problems and other problems, while the new dielectric layer forming method of shortening the number of processes and the process time is applied, the plasma is prevented by excessive gap between the upper and lower structures to ensure stable driving Provide a display panel.

In order to achieve the above object, the plasma display panel of the present invention,

An upper substrate and a lower substrate disposed to face each other;

A partition wall disposed between the upper substrate and the lower substrate to define a plurality of light emitting cells together with the upper substrate and the lower substrate;

A plurality of electrodes extending over the light emitting cells to perform discharge; And

A plasma display panel comprising: a dielectric layer formed to bury the electrodes;

A dummy barrier rib is formed outside the barrier rib, and the dummy barrier rib is formed outside the dielectric layer.

In the present invention, preferably, the dielectric layer is applied using a coater. At this time, at least one or more steps may be formed on the opposite dielectric layer of the electrode. In particular, two steps may be sequentially formed while going in an application direction, and the steps may have an inclination upward while going in an application direction. Can be.

In the present invention, preferably, a plurality of pairs of discharge sustaining electrodes and a phase dielectric layer filling the discharge sustaining electrodes are formed below the upper substrate.

A plurality of address electrodes corresponding to the discharge sustain electrodes and a lower dielectric layer filling the address electrodes are formed on the lower substrate,

The dummy partition wall is interposed between the outer side of the upper dielectric layer of the upper substrate and the outer side of the lower dielectric layer of the lower substrate.

On the other hand, the plasma display panel according to another aspect of the present invention,

A plasma display panel in which display is performed including a plurality of light emitting cells that are discharged.

Electrodes for discharging over the light emitting cells and a dielectric layer filling the electrodes are formed;

A dummy barrier rib is formed outside the light emitting cells and inside the region where the dielectric layer is formed, and the height of the dummy barrier rib is complementary to the thickness of the dielectric layer.

Here, the dielectric layer is preferably applied using a coater (coater).

In the present invention, preferably, a plurality of pairs of discharge sustaining electrodes and a phase dielectric layer filling the discharge sustaining electrodes are formed below the upper substrate.

A plurality of address electrodes corresponding to the discharge sustain electrodes and a lower dielectric layer filling the address electrodes are formed on the lower substrate,

The dummy partition wall is interposed between the dielectric and lower dielectric layers.

Next, a plasma display panel according to a preferred embodiment of the present invention will be described in detail. 1 shows a typical plasma display panel. As shown in the figure, the plasma display panel 100 includes an upper panel 110 and a lower panel 120 bonded to the upper panel 110. The upper panel 110 and the lower panel 120 are encapsulant 145, for example, are joined by a frit, and an area C in which the upper panel 110 and the lower panel 120 overlap each other. As shown in the figure, a display area DP is formed in which a plurality of light emitting cells 130 are discharged. The display area DP is an area where an image is displayed by performing display discharge. . The dummy partition wall 140 surrounding the display area DP is disposed.

FIG. 2 is an exploded perspective view of the plasma display panel shown in FIG. 1, and a perspective view of a part of the display area is shown. As can be seen in the drawing, the plasma display panel 100 includes a top panel 110 and a bottom panel 120 that are largely opposed to each other. In more detail, the plasma display panel 100 includes an upper substrate 111 and a lower substrate 121 disposed to face up and down, and the partition wall 124 disposed between the upper and lower substrates 111 and 121. Equipped. The space between the substrates 111 and 121 is partitioned into a plurality of light emitting cells 130 by the partition wall 124, and electrodes are disposed over the light emitting cells 130. That is, the discharge sustaining electrode pairs 116 are disposed on the upper substrate 111 side, and the address electrodes 122 are disposed on the lower substrate 121 side in the direction crossing the discharge sustaining electrode pairs 116. One of the pair of paired discharge sustain electrodes 116 is the scan electrode 112, and the other electrode is the sustain electrode 113. The discharge sustaining electrode pair 116 and the address electrode 122 are buried by the upper dielectric layer 114 and the lower dielectric layer 123, respectively. The dielectric material layer 114 and the dielectric material layer 123 prevents cations or electrons from directly colliding with the electrodes 116 and 122 and damages the electrodes 116 and 122, while also helping to accumulate wall charges. The dielectric layers 114 and 123 may be formed of PbO, B 2 O 3, SiO 2, or the like.

The phosphor layer 125 is disposed in the light emitting cell 130. The phosphor layer 125 performs a function of converting vacuum ultraviolet rays formed by discharge between the discharge sustaining electrode pairs 116 into visible light. The image is realized by the formed visible light. Although not shown, discharge gas such as a Ne-Xe mixed gas is filled in the light emitting cells 130, and preferably, the phase dielectric layer 114 is formed by a protective layer 115 such as an MgO film. Covered.

The dielectric layer 114 shown in the drawing is formed by applying a dielectric paste on the upper substrate 111 on which the discharge sustaining electrode pairs 116 are arranged in a predetermined pattern. Specifically, the dielectric layer forming apparatus shown in FIG. It can be applied as. The illustrated dielectric layer forming apparatus includes a stone plate 350 on which the upper substrate 111 is seated, and a coater for applying a predetermined paste while moving on the upper substrate 111. The upper substrate 111 is fixed to a predetermined position on the crystal panel 350 by a vacuum pump 360 that adsorbs the substrate 111. The coater includes a storage tank 330 storing the dielectric paste 114 ′ and a slot die 300 receiving paste from the storage tank 330 and applying the paste onto the upper substrate 111. At the end of the 300, a nozzle 310 through which the paste 114 ′ is discharged is formed. The nozzle 310 may be provided in plurality in parallel in the width direction of the surface to be coated. A supply pump 320 is disposed between the storage tank 330 and the slot die 300 to force the flow of the paste 114 ′ therebetween. The dielectric paste 114 ′ contains glass powder, an organic binder, and a filler as main components, and may also contain other additives commonly used in various fields.

The slot die 300 applies the paste 114 ′ onto the upper substrate 111 while moving on the stone slab 350 along the application direction shown in the drawing. For example, the paste 114 ′ may be applied along the arrangement direction of the discharge sustaining electrode pair.

FIG. 4 is a profile showing a change in thickness of the dielectric layer shown in FIG. 3 and is shown along the application direction of the dielectric layer. As shown, the dielectric layer is formed relatively thin in the initial section P1, is formed relatively thick in the end section P3, and the dielectric layer has a relatively uniform thickness between the initial section P1 and the end section P3. There is a normal section (P2) is formed. In the initial section P1, since the amount of paste discharged through the nozzle is relatively small even when the supply pump is operated, a thin film dielectric layer is formed, and in the end section, even if the supply pump is turned off, the paste is not immediately stopped. A relatively thick dielectric layer is formed.

FIG. 5 is a cross-sectional view taken along the line VV of FIG. 1. The plasma display panel 100 of the present exemplary embodiment includes an upper panel 110 and a lower panel 120 facing up and down. A display area DP including a plurality of light emitting cells 130 is disposed at an approximately center of the plasma display panel 100, and a dummy partition wall 140 and an encapsulant 145 are disposed outside the display area DP. Is placed. In the display area DP, a partition 124 partitioning the light emitting cells 130 is disposed between the substrates 111 and 121. Discharge sustaining electrode pairs (not shown) are disposed above the light emitting cells 130, and address electrodes 122 are disposed below the light emitting cells 130. The electrodes 122 are buried by the dielectric material layer 114 and the dielectric material layer 123. The thickness t of the dielectric material layer 114 varies in steps along the direction in which it is applied, as shown in FIG. Likewise, the thickness t gradually increases as the initial section P1, the normal section P2, and the end section P3 go. Therefore, two steps are sequentially formed while going in the application direction, and these steps have an inclination downward while going in the application direction. The dielectric dielectric layer 114 is preferably covered by the protective layer 115.

Meanwhile, the dummy partition wall 140 is disposed outside the display area DP. In the present invention, the dummy partition wall 140 is disposed outside the dielectric layer 114. That is, since the dummy partition wall 140 is disposed at a position away from the dielectric layer 114, the gap space g between the dielectric layer 114 and the partition wall 124 despite the step difference of the dielectric layer 114. This can be kept approximately uniform. In general, a small gap space g exists between the dielectric dielectric layer 114 and the partition wall 124, which contributes to the discharge of impurity gas and the filling of discharge gas. However, if the size of these g is not limited within a certain range, the display light or the charged particles flow from the adjacent light emitting cells 130 to generate electrical and optical crosstalk. In the present invention, by placing the dummy partition wall 140 on the outside of the stepped dielectric dielectric layer 114, it is to be uniformly maintained to the size of the gap space (g). On the other hand, the sealing member 145 is formed on the outer side of the dummy partition wall 140, which is interposed between the upper substrate 111 and the lower substrate 121 to seal between the two substrates (111, 121).

  6 is a cross-sectional view of the plasma display panel according to the second embodiment of the present invention, which is a modification of the plasma display panel shown in FIG. Hereinafter, a description will be given of the second embodiment, with a focus on differences from the first embodiment. The plasma display panel 200 according to the present embodiment also includes a top panel 210 and a bottom panel 220 that face each other up and down, and a display area including a plurality of light emitting cells 230 in the center area. A DP is disposed, and a dummy partition wall 240 is disposed outside the display area DP. Unlike the first embodiment, the dummy partition wall 240 is disposed between the dielectric material layer 214 and the dielectric material layer 223, and may be formed at different heights as shown in the drawing. That is, the dummy bulkheads 240 formed at the left and right sides in the drawing are formed to have heights of h1 and h3, respectively, and they have a height difference of dh. As described above, the dielectric dielectric layer 214 is gradually changed in thickness t along its application direction. That is, the thickness t gradually increases from the initial section P1 to the normal section P2 and the end section P3. Despite the change in the thickness t of the dielectric layer 214, the dummy partition wall 240 is formed in the dielectric dielectric layer 214 so that the gap space g between the dielectric dielectric layer 214 and the partition wall 224 is substantially maintained. Should be complementary to the thickness t of That is, since the dielectric layer 214 of the initial section P1 has a thickness difference from the dielectric layer 214 of the ending section P3, the dummy partition wall 240 also has the same height difference dh.

On the other hand, the sealing material 245 for sealing between the upper substrate 211 and the lower substrate 221 is disposed, in addition to the matters relating to the upper panel 210, such as a protective layer 215 to cover the dielectric dielectric layer 214 and Details of the lower panel 220 such as the address electrode 222 formed on the lower substrate 221 and the phosphor layer 225 disposed in the light emitting cell 230 are substantially the same as those described in the first embodiment.

In the drawings attached to the present specification, the upper dielectric layer is shown as being applied by a dielectric layer forming apparatus including a coater, but the present invention is not limited thereto. For example, only the lower dielectric layer on the lower substrate side may be coated. It may be applied by, and both the dielectric and lower dielectric layer may be formed by a coater. The lower dielectric layer coated by the coater may have a step in sequence along the application direction thereof, and the dummy partition wall may be formed on the outer side of the lower dielectric layer or may be formed on the lower dielectric layer to have a height difference corresponding to the step. . Despite the step formed in the dielectric layer by the dummy partition wall thus formed, the gap space between the upper panel and the partition wall can be kept relatively uniform.

Since the dielectric layer provided in the plasma display panel of the present invention is formed through one application process and a hardening process, the number of processes is greatly reduced compared to the conventional art in which the application and curing processes are repeatedly performed several times. Productivity and product quality are improved. In particular, when such a dielectric layer forming method is applied, an excessive gap space between the upper panel and the lower panel may be caused. According to the plasma display panel of the present invention, by adjusting the formation position of the dummy partition wall or the height of the dummy partition wall, To prevent excessive gap space and to maintain a relatively uniform gap space.

Although the present invention has been described with reference to the embodiments illustrated in the accompanying drawings, it is merely exemplary, and various modifications and equivalent other embodiments are possible from those skilled in the art to which the present invention pertains. You will be able to understand the point. Therefore, the true scope of protection of the present invention should be defined by the appended claims.

Claims (9)

An upper substrate and a lower substrate disposed to face each other; A partition wall disposed between the upper substrate and the lower substrate to define a plurality of light emitting cells together with the upper substrate and the lower substrate; A plurality of electrodes extending over the light emitting cells to perform discharge; And A plasma display panel comprising: a dielectric layer formed to bury the electrodes; A dummy barrier rib is formed outside the barrier rib, wherein the dummy barrier rib is formed outside the dielectric layer. The method of claim 1, And the dielectric layer is coated using a coater. The method of claim 1, At least one step is formed on the dielectric layer opposite to the electrode. The method of claim 3, Plasma display panel, characterized in that two steps are sequentially formed on the dielectric layer while going in the application direction, wherein the steps have an upward inclination in the application direction. The method of claim 1, A plurality of pairs of discharge sustaining electrodes and a phase dielectric layer filling the discharge sustaining electrodes are formed below the upper substrate. A plurality of address electrodes corresponding to the discharge sustain electrodes and a lower dielectric layer filling the address electrodes are formed on the lower substrate, And the dummy partition wall is interposed between an outer side of the upper dielectric layer of the upper substrate and an outer side of the lower dielectric layer of the lower substrate. A plasma display panel in which display is performed including a plurality of light emitting cells that are discharged. Electrodes for discharging over the light emitting cells and a dielectric layer filling the electrodes are formed; And a dummy partition wall formed outside the light emitting cells and inside the region where the dielectric layer is formed, wherein the height of the dummy partition wall is complementary to the thickness of the dielectric layer. The method of claim 6, And the dielectric layer is coated using a coater. The method of claim 6, Plasma display panel, characterized in that two steps are sequentially formed on the dielectric layer while going in the application direction, wherein the steps have an upward inclination in the application direction. The method of claim 6, A plurality of pairs of discharge sustaining electrodes and a phase dielectric layer filling the discharge sustaining electrodes are formed below the upper substrate. A plurality of address electrodes corresponding to the discharge sustain electrodes and a lower dielectric layer filling the address electrodes are formed on the lower substrate, And the dummy partition wall is interposed between the dielectric and lower dielectric layers.

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