KR100606907B1 - Method For Fabricating CMOS Image Sensor - Google Patents

Abstract

The present invention relates to a method of manufacturing a CMOS image sensor to prevent deterioration of characteristics of a microlens, the method comprising: forming a metal pad in a pad region of a semiconductor substrate divided into a unit pixel region and a pad region; Forming a protective film on an entire surface of the semiconductor substrate including a metal pad and selectively etching the protective film to expose a predetermined portion of the surface of the metal pad; forming a cap oxide film on the entire surface of the semiconductor substrate; Forming a color filter array on an area cap oxide film, forming a planarization layer in a unit pixel area including the color filter array, and forming a microlens pattern on the planarization layer to correspond to the color filter array And selectively etching the cap oxide layer to expose the surface of the metal pad. Forming an open portion and, by reflow of the microlens pattern is characterized in that it is formed by forming a microlens.

Color Filter, Micro Lens, Metal Pad, Cap Oxide

Description

Method for manufacturing CMOS image sensor {Method For Fabricating CMOS Image Sensor}

1 is an equivalent circuit diagram of a typical 3T CMOS image sensor

2 is a layout diagram showing unit pixels of a general 3T CMOS image sensor;

3A to 3D are cross-sectional views illustrating a method of manufacturing a CMOS image sensor according to the prior art.

4A to 4E are cross-sectional views illustrating a method of manufacturing the CMOS image sensor according to the present invention.

Explanation of symbols for the main parts of the drawings

201: semiconductor substrate 202: insulating film

203: metal pad 204: protective film

205: TEOS oxide film 206: color filter array

207: OCM pattern 209: microlens

210: pad opening portion

The present invention relates to a method of manufacturing an image sensor, and more particularly to a method of manufacturing a CMOS image sensor to improve the reliability of the device.

In general, an image sensor is a semiconductor device that converts an optical image into an electrical signal, and is generally a charge coupled device (CCD) and CMOS metal (Complementary Metal Oxide Silicon) image. It is divided into Image Sensor.

In the charge coupled device (CCD), a plurality of photo diodes (PDs) for converting a signal of light into an electrical signal are arranged in a matrix form, and the photo diodes in each vertical direction arranged in the matrix form. A plurality of vertical charge coupled device (VCCD) formed between the plurality of vertical charge coupled devices (VCCD) for vertically transferring charges generated in each photodiode, and horizontally transferring charges transferred by the respective vertical charge transfer regions; A horizontal charge coupled device (HCCD) for transmitting to the sensor and a sense amplifier (Sense Amplifier) for outputting an electrical signal by sensing the charge transmitted in the horizontal direction.

However, such a CCD has a disadvantage in that the manufacturing method is complicated because the driving method is complicated, the power consumption is large, and the multi-step photo process is required.

In addition, the charge coupling device has a disadvantage in that it is difficult to integrate a control circuit, a signal processing circuit, an analog / digital converter (A / D converter), and the like into a charge coupling device chip, which makes it difficult to miniaturize a product.

Recently, CMOS image sensors have attracted attention as next generation image sensors for overcoming the disadvantages of the charge coupling device.

The CMOS image sensor uses CMOS technology that uses a control circuit, a signal processing circuit, and the like as peripheral circuits to form MOS transistors corresponding to the number of unit pixels on a semiconductor substrate, thereby forming the MOS transistors of each unit pixel. The device adopts a switching method that sequentially detects output.

That is, the CMOS image sensor implements an image by sequentially detecting an electrical signal of each unit pixel by a switching method by forming a photodiode and a MOS transistor in the unit pixel.

The CMOS image sensor has advantages, such as a low power consumption, a simple manufacturing process according to a few photoprocess steps, by using CMOS manufacturing technology.

In addition, since the CMOS image sensor can integrate a control circuit, a signal processing circuit, an analog / digital conversion circuit, and the like into the CMOS image sensor chip, the CMOS image sensor has an advantage of easy miniaturization.

Therefore, the CMOS image sensor is currently widely used in various application parts such as a digital still camera, a digital video camera, and the like.

On the other hand, CMOS image sensors are classified into 3T type, 4T type, and 5T type according to the number of transistors. The 3T type consists of one photodiode and three transistors, and the 4T type consists of one photodiode and four transistors. An equivalent circuit and layout of the unit pixels of the 3T-type CMOS image sensor will be described as follows.

FIG. 1 is an equivalent circuit diagram of a general 3T CMOS image sensor, and FIG. 2 is a layout diagram illustrating unit pixels of a general 3T CMOS image sensor.

As shown in FIG. 1, a unit pixel of a general 3T CMOS image sensor includes one photodiode (PD) and three nMOS transistors T1, T2, and T3. The cathode of the photodiode PD is connected to the drain of the first nMOS transistor T1 and the gate of the second nMOS transistor T2.

The sources of the first and second nMOS transistors T1 and T2 are all connected to a power supply line supplied with a reference voltage VR, and the gate of the first nMOS transistor T1 has a reset signal RST. It is connected to the reset line supplied.

Further, the source of the third nMOS transistor T3 is connected to the drain of the second nMOS transistor, the drain of the third nMOS transistor T3 is connected to a read circuit (not shown in the drawing) via a signal line, The gate of the third nMOS transistor T3 is connected to a column select line to which a selection signal SLCT is supplied.

Accordingly, the first nMOS transistor T1 is referred to as a reset transistor Rx, the second nMOS transistor T2 is referred to as a drive transistor Dx, and the third nMOS transistor T3 is referred to as a selection transistor Sx.

As shown in FIG. 2, in the unit pixel of a general 3T CMOS image sensor, an active region 10 is defined so that one photodiode 20 is formed in a wide portion of the active region 10. Gate electrodes 120, 130, and 140 of three transistors that overlap each other in the active region 10 of the remaining portion are formed.

That is, the reset transistor Rx is formed by the gate electrode 120, the drive transistor Dx is formed by the gate electrode 130, and the selection transistor Sx is formed by the gate electrode 140. Is formed.

Here, impurity ions are implanted into the active region 10 of each transistor except for lower portions of the gate electrodes 120, 130, and 140 to form source / drain regions of each transistor.

Therefore, a power supply voltage Vdd is applied to a source / drain region between the reset transistor Rx and the drive transistor Dx, and a source / drain region on one side of the select transistor Sx is shown in a read circuit (not shown). Not used).

Although not illustrated in the drawings, the gate electrodes 120, 130, and 140 described above are connected to respective signal lines, and each of the signal lines has a pad at one end thereof and is connected to an external driving circuit.

In the CMOS image sensor manufacturing process, a protective film is formed to protect the device from external moisture and scratches after the metal wiring is formed, and a color filter array is formed on the protective film after the pad opening process.

However, since the surface of the pad metal is corroded or damaged during the color filter array process, a technique of applying a cap oxide film has been proposed to solve this problem.

Hereinafter, a manufacturing method of a CMOS image sensor according to the prior art will be described with reference to the accompanying drawings.

3A to 3D are cross-sectional views illustrating a method of manufacturing a CMOS image sensor according to the prior art.

First, as shown in FIG. 3A, a semiconductor substrate 101 in which elements forming a CMOS image sensor such as a photodiode and a MOS transistor are formed through a series of processes is prepared.

The semiconductor substrate 101 is defined as a unit pixel region 100 and a pad region 150.

Next, an insulating film 102 is formed on the entire surface of the semiconductor substrate 101, and metal pads 103 of each signal line are formed on the insulating film 102.

 In this case, the metal pad 103 may be formed on the same layer as the same material as each of the gate electrodes 120, 130, and 140 as described with reference to FIG. 2, and may be formed of a different material through a separate contact. It is mostly formed of aluminum (Al).

A protective film 104 is formed on the entire surface of the semiconductor substrate 101 including the metal pads 103.

As shown in FIG. 3B, the protective film 104 is selectively removed to expose a predetermined portion of the surface of the metal pad 103, and a cap is formed on the entire surface of the semiconductor substrate 101 including the protective film 104. ) An oxide film 105 is formed.

Here, the cap oxide film 105 is formed to prevent corrosion of the metal pad 103 due to repeated exposure and development during the photo process.

As shown in FIG. 3C, a blue color material is coated on the cap oxide layer 105, and then selectively exposed and developed using a photo mask to perform unit pixel area ( The color filter array 106 is formed through a series of color array processes, such as forming a blue color filter B only on 100 and forming green and red color filters G and R in the same manner.

At this time, since the cap oxide film 105 is covered on the upper portion of the metal pad 103, the cap oxide layer 105 is not in contact with oxygen or hydrogen in the color filter material or the developing solution, and the metal pad 103 may prevent corrosion or the like.

As shown in FIG. 3D, the planarization layer 107 is formed on the entire surface of the semiconductor substrate 101 including the color filter array 106, and the planarization layer (ie, remains only in the unit pixel region through photo and etching processes). 107) is selectively etched.

Then, a microlens resist layer is coated on the entire surface of the semiconductor substrate 101 including the planarization layer 107, and then exposed and developed to form a microlens pattern corresponding to each of the color filter arrays 106. do.

Subsequently, the microlens pattern is reflowed at a predetermined temperature to form a hemispherical microlens 108.

Subsequently, the cap oxide layer 105 is selectively blank etched to expose the surface of the metal pad 103 to form a pad opening 109.

However, there is a problem in the method of manufacturing the CMOS image sensor according to the prior art as described above.

That is, in order to form the pad opening portion, the surface of the microlens is influenced at the time of blank etching, thereby degrading the characteristics of the microlens.

SUMMARY OF THE INVENTION The present invention has been made to solve the problems of the prior art as described above, and an object thereof is to provide a method of manufacturing a CMOS image sensor to prevent deterioration of characteristics of a microlens.

Method of manufacturing a CMOS image sensor according to the present invention for achieving the above object is to form a metal pad in the pad region of the semiconductor substrate divided into a unit pixel region and the pad region, and a semiconductor substrate including the metal pad Selectively etching the protective film to form a protective film on the entire surface of the metal pad and exposing a portion of the surface of the metal pad, forming a cap oxide film on the front surface of the semiconductor substrate, and forming a color on the unit pixel region cap oxide film Forming a filter array, forming a planarization layer in a unit pixel area including the color filter array, forming a microlens pattern on the planarization layer to correspond to the color filter array, Selectively etching the cap oxide layer to expose a surface thereof to form a pad opening; And reflowing said micro-lens pattern and characterized in that it is formed by forming a microlens.

Hereinafter, a method of manufacturing the CMOS image sensor according to the present invention will be described in detail with reference to the accompanying drawings.

4A to 4E are cross-sectional views illustrating a method of manufacturing a CMOS image sensor according to the present invention.

As shown in FIG. 4A, an insulating film 202 such as a gate insulating film or an interlayer insulating film is formed on a semiconductor substrate 201 on which photodiodes and MOS transistors forming elements are formed in a conventional manner, and on the insulating film 202. Metal pads 203 for each signal line are formed.

In this case, the metal pad 203 may be formed on the same layer as the same material as each of the gate electrodes 120, 130, and 140 as described with reference to FIG. 2, and may be formed of a different material through a separate contact. It is mostly formed of aluminum (Al).

Subsequently, a silicon nitride (Si ₃ N ₄ ) film is formed on the entire surface of the semiconductor substrate 201 including the metal pad 203 to protect the device from external moisture or scratches, and the protective film 204 is formed. ).

The semiconductor substrate 201 is defined as a unit pixel region 200 and a pad region 250.

On the other hand, although the metal wiring such as the metal pad 203 is shown as a single layer only, it may be made of a double metal wiring, it is not shown, but usually includes a barrier metal and anti-reflective layer.

The protective film 204 may also be used in a state where an oxide film and a nitride film are stacked.

As shown in FIG. 4B, the protective layer 204 is selectively removed through a photo and etching process to expose a predetermined portion of the surface of the metal pad 203, and the semiconductor substrate 201 including the protective layer 204. ), A cap oxide film 205 having a thickness of 400 to 1000 mW is formed on the entire surface of the top surface).

The cap oxide film 205 uses a TEOS oxide film.

As shown in FIG. 4C, a blue color material is coated on the cap oxide layer 205 and then selectively exposed and developed using a photo mask to apply only to the unit pixel region. The color filter array 206 is formed through a series of color array processes, such as forming a blue color filter B and forming green and red color filters G and R in the same manner.

At this time, since the cap oxide film 205 is covered by the metal pad 203, the metal pad 203 is not in contact with oxygen or hydrogen in the color filter material or the developing solution, and the surface of the metal pad 203 is protected from oxidation or damage.

Here, the color filter material uses a dyed photoresist.

As shown in FIG. 4D, the planarization layer 207 is formed on the entire surface of the semiconductor substrate 201 for the purpose of reducing the step difference and improving the light transmittance of the color filter array 206.

Here, the planarization layer 207 uses an over coating material (OCM).

Subsequently, the planarization layer 207 is selectively removed to remain only in the unit pixel area through the photo and etching processes.

Then, a microlens resist layer is coated on the entire surface of the semiconductor substrate 201 including the planarization layer 207 and then subjected to an exposure and development process to form a microlens pattern 208a on the color filter array 206. Form.

Subsequently, the exposed cap oxide layer 205 is blank etched so as to expose a predetermined portion of the surface of the metal pad 203 to form a pad opening 209.

As shown in FIG. 4E, the microlens pattern 208a is reflowed in a region of about 150 to 200 ° C. to form a hemispherical microlens 208.

On the other hand, the present invention described above is not limited to the above-described embodiment and the accompanying drawings, it is possible that various substitutions, modifications and changes within the scope without departing from the technical spirit of the present invention. It will be apparent to those of ordinary skill in Esau.

As described above, the method for manufacturing the CMOS image sensor according to the present invention has the following effects.

That is, by forming a microlens pattern, forming a pad opening through a blank etch, and reflowing the microlens pattern to form a microlens, it is possible to prevent profile deformation of the microlens, thereby securing reliability of the microlens. have.

Claims (7)

Forming a metal pad in a pad area of a semiconductor substrate divided into a unit pixel area and a pad area; Forming a protective film on an entire surface of the semiconductor substrate including the metal pad and selectively etching the protective film to expose a predetermined portion of the surface of the metal pad; Forming a cap oxide film on an entire surface of the semiconductor substrate; Forming a color filter array on the unit pixel region cap oxide film; Forming a planarization layer in a unit pixel area including the color filter array; Forming a microlens pattern on the planarization layer to correspond to the color filter array; Selectively etching the cap oxide layer to expose a surface of the metal pad to form a pad opening; And reflowing the microlens pattern to form a microlens.  The method of claim 1, wherein the protective film is any one of a silicon nitride film, an oxide film, and a nitride film.  The method of claim 1, wherein the protective film is formed to a thickness of about 7000 ~ 9000 Å. The method of claim 1, wherein the cap oxide film is a TEOS oxide film. The method of claim 1, wherein the cap oxide film is formed to a thickness of about 400 ~ 1000Å. The method of claim 1, wherein the cap oxide layer is removed through a blank etch. The method of claim 1, wherein the planarization layer is formed of OCM.

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