KR100592321B1 - Plasma display panel - Google Patents

Abstract

According to the present invention, a plasma display panel is disclosed. The plasma display panel is disposed between the upper substrate and the lower substrate, the upper substrate and the lower substrate, which are disposed to face each other, and partitions a plurality of subpixels, and extends over the plurality of subpixels continuously arranged in one direction. A plurality of sets of discharge electrodes arranged to extend in a direction intersecting with the address electrode and arranged to form a pair of the X electrode and the Y electrode paired in parallel with each other, and the M electrode formed between the X electrode and the Y electrode; A red phosphor, a green phosphor, and a blue phosphor, which are applied in the subpixels and divide each row of subpixels extending in the address electrode direction into red light emitting subpixels, green light emitting subpixels, and blue light emitting subpixels. An address electrode formed over the green light emitting subpixels, including a discharge gas filled in the pixels, is formed in a red light emitting diode. Is formed in width wider than a pixel and blue light-emitting sub pixel is formed over the address electrodes. According to the disclosed plasma display panel, a uniform address voltage can be applied across all subpixels, and discharge failures and discharge irregularities are prevented.

Description

Plasma display panel {Plasma display panel}

1 is an exploded perspective view showing a conventional plasma display panel;

FIG. 2 is a cross-sectional view of the plasma display panel shown in FIG. 1;

3 is an exploded perspective view showing a plasma display panel according to a first embodiment of the present invention;

4 is a view schematically showing the structure of the plasma display panel shown in FIG.

5 is a cross-sectional view of the plasma display panel shown in FIG. 3;

6 is a timing diagram illustrating a driving method of the plasma display panel shown in FIG. 4;

7 is an exploded perspective view showing a plasma display panel according to a second embodiment of the present invention;

FIG. 8 is a schematic view illustrating the structure of a plasma display panel of FIG. 7; FIG.

<Description of Symbols for Major Parts of Drawings>

110,210: Upper panel 111,211: Upper board

114,214: first upper dielectric layer 115,215: second upper dielectric layer

116,216 Protective layer 120,220 Lower panel

121,221: Lower substrate 123,223: Lower dielectric layer

125,225: phosphor 125R, 225R: red phosphor

125G, 225G: Green phosphor 125B, 225B: Blue phosphor

140R, 240R: Red-emitting subpixel 140G, 240G: Green-emitting subpixel

140B, 240B: Blue light emitting subpixel X: X electrode

Y: Y electrode M: M electrode

Xa, Ya, Ma: transparent electrode Xb, Yb, Mb: bus electrode

Mb`: base of M electrode Mb ,: extension of M electrode

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a plasma display panel that implements an image using gas discharge. More particularly, an improved address voltage can be applied across all subpixels, and discharge defects and discharge irregularities are prevented. The present invention relates to a plasma display panel having a structure.

Recently, a device employing a plasma display panel as a flat panel display device has a large screen and has excellent characteristics of high definition, ultra-thin, light weight, and wide viewing angle, and is easier to manufacture than other flat panel display devices. It is attracting attention as a large flat panel display device.

1 is a perspective view of a conventional plasma display panel, Figure 2 is a cross-sectional view of the plasma display panel shown in Figure 1, the upper panel 10 is along the line II-II of Figure 1, the lower panel 20 is shown in FIG. This is a cross-sectional view taken along the line II`-Ⅱ`.

In general, the plasma display panel includes an upper panel 10 and a lower panel 20 bonded to the upper panel 10. Referring to the drawings, discharge sustaining electrode pairs 18 are disposed on the lower surface of the upper substrate 11, and the upper dielectric layer 14 and the protective layer 16 covering the upper dielectric layer 14 are sequentially formed. It is. Here, one electrode of the discharge sustaining electrode pair 18 becomes the scan electrode 12, and the other electrode becomes the sustain electrode 13.

On the other hand, an upper surface of the lower substrate 21 is formed with an address electrode 22 extending to intersect with the discharge sustaining electrode pair 18 and a lower dielectric layer 23 embedded therein. The partition wall 24 is formed on the lower dielectric layer 23. As shown in the drawing, the partition wall 24a includes a horizontal partition wall portion 24a extending in one direction and a vertical partition wall portion 24b extending in a direction intersecting with the horizontal partition wall portion 24b. It may be formed in a matrix pattern. The plurality of subpixels 40R, 40G, and 40B are partitioned by the partition wall 24, and a phosphor 25 is coated in each of the subpixels 40R, 40G, and 40B. As a boundary, phosphors 25 of different colors, that is, red phosphor 25R, green phosphor 25G, and blue phosphor 25B are applied. The subpixels 40R, 40G, and 40B may be red light emitting subpixels 40R, green light emitting subpixels 40G, and blue light emitting subpixels 40B, respectively, depending on the type of phosphor 25 applied therein. Since a row of red light emitting subpixels 40R, a row of green light emitting subpixels 40G, and a row of blue light emitting subpixels 40B are disposed based on the horizontal partition wall part 24a.

In such a plasma display panel, when an address voltage is applied between the address electrode 22 and the scan electrode 12, an address discharge occurs, and as a result of this address discharge, a subpixel to generate sustain discharge is selected. Thereafter, when a predetermined AC voltage is applied between the scan electrode 12 and the sustain electrode 13 of the selected subpixel, sustain discharge occurs between the scan electrode 12 and the sustain electrode 13. Here, as the distance L ′ (FIG. 2) between the scan electrode 12 and the sustain electrode 13 becomes longer, the discharge form transitions from a short gap discharge form to a long gap discharge form. The long gap discharge is a discharge that occurs along a long discharge path, and excites as many discharge gases and emits more phosphors, so that the luminous luminance and luminous efficiency are higher than that of the short gap discharge. By the way, when the distance L` between both electrodes is increased in order to induce long gap discharge, there is a problem that the discharge start voltage is increased and power consumption is increased.

Meanwhile, zinc silicate-based phosphors such as Zn ₂ SiO ₄ : Mn, which are used as the green phosphor 25G, have negative charge characteristics in which the surface potential is negative (−), whereas the red phosphor 25R and blue Phosphor 25B has a positive charge characteristic in which the surface potential is positive (+). In the address discharge, since the phosphor having the surface potential of (+) is disposed in the red light emitting subpixel 40R and the blue light emitting subpixel 40B, the address voltage is increased, but the green light emitting subpixel 40G In the case of), the phosphor having the surface potential of (-) is disposed, and the effect of lowering the address voltage occurs. Therefore, a higher address voltage should be applied to the green light emitting subpixel 40G than the red light emitting subpixel 40R or the blue light emitting subpixel 40B. That is, the address voltages of the red light emitting pixel 40R and the blue light emitting subpixel 40B should be about 165 to 190V, while the address voltage of the green light emitting subpixel 40G should be about 175 to 190V higher than this. do. In addition, when the same address voltage is applied, sufficient wall voltage is not formed in the green light emitting subpixel 40G, which affects subsequent sustain discharge, resulting in discharge unevenness or discharge failure.

SUMMARY OF THE INVENTION The present invention provides an improved plasma display panel in which an address voltage can be uniformly applied across all subpixels, and discharge unevenness and discharge failure are prevented to solve the above and other problems. For the purpose of

Another object of the present invention is to provide a plasma display panel in which light emission luminance and light emission efficiency are improved.

In order to achieve the above object and other objects, the plasma display panel according to an aspect of the present invention, the upper substrate and the lower substrate disposed to face each other, disposed between the upper substrate and the lower substrate, a plurality of subpixels Barrier ribs for partitioning the electrodes, address electrodes extending over the subpixels continuously arranged in one direction, extending in a direction crossing the address electrode, and having an X electrode and a Y electrode paired in parallel to each other, and the X electrode A plurality of sets of discharge electrodes arranged to form a set of M electrodes formed between the and Y electrodes, and applied to the subpixels so that the subpixels of each column extending in the direction of the address electrode are red-emitting subpixels and greens. Red phosphor, green phosphor, and blue phosphor subdivided into luminescent subpixels and blue luminescent subpixels; Comprising a discharge gas filled in with, and the green address electrode formed over the light-emitting sub pixel is formed in a width greater than the address electrodes formed over a period of said red light-emitting sub-pixel and blue light-emitting sub-pixel.

On the other hand, the plasma display panel according to another aspect of the present invention, the upper substrate and the lower substrate disposed to face each other, the partition wall disposed between the upper substrate and the lower substrate partitioning a plurality of subpixels, continuously arranged in one direction A plurality of sets of discharge electrodes extending over the subpixels and arranged such that pairs of X and Y electrodes paired in parallel with each other and M electrodes formed between the X and Y electrodes are formed as a set; Address electrodes extending in the direction intersecting with each other, the red phosphors, green phosphors, and blues applied in the subpixels to divide each subpixel into a red light emitting subpixel, a green light emitting subpixel, and a blue light emitting subpixel. And a discharge gas filled in the phosphor and the subpixels, wherein the M electrode has a base extending in one direction and the base But having at least a portion extended portion protruding from one side, the extension portion is formed in a portion corresponding to the green light-emitting sub-pixel.

In the present invention, preferably, the M electrode includes a transparent electrode formed of a transparent conductive material and a bus electrode of a metal material in contact with the transparent electrode, and the base and the extension part form the bus electrode.

Next, a plasma display panel according to exemplary embodiments of the present invention will be described in detail with reference to the accompanying drawings. FIG. 3 is an exploded perspective view of the plasma display panel according to the first embodiment of the present invention, and FIG. 4 is a view schematically showing the plasma display panel shown in FIG. 3, by applying a subscript to each discharge electrode. This is a diagram showing the arrangement order of these. The illustrated plasma display panel includes a top panel 110 and a bottom panel 120 that are bonded to the top panel 110 so as to be opposite to each other. More specifically, the plasma display panel is disposed between the top substrate 111 and the bottom substrate 121. Barrier ribs 124 formed to partition the plurality of subpixels 140R, 140G and 140B, address electrodes A formed over the subpixels 140R, 140G and 140B arranged in a row, and the address A set of discharge electrodes S extend in a direction crossing the electrodes A.

The upper substrate 111 and the lower substrate 121 is generally formed of a glass material. A partition wall 124 is disposed between the upper substrate 111 and the lower substrate 121 to divide the space therebetween into a plurality of subpixels 140R, 140G, and 140B. The partition wall 124 may be formed in a matrix pattern including a horizontal partition wall part 124a extending in one direction and a vertical partition wall part 124b extending in a direction crossing the partition wall. Phosphor 125 is applied in the subpixels 140R, 140G, and 140B, and more specifically, is applied over the side of the partition wall 124 on the lower dielectric layer 123. The phosphor 125 has three tricolor phosphors of the red phosphor 125R, the green phosphor 125G, and the blue phosphor 125B alternated in a predetermined order based on the horizontal partition wall portion 124a. The red phosphor 125R includes Y (V, P) O ₄ : Eu, and the like, and the green phosphor layer 125G includes zinc silicate-based phosphor such as Zn ₂ SiO ₄ : Mn, and the blue phosphor. Layer 125B includes BAM: Eu and the like. The subpixels 140R, 140G, and 140B are red-emitting subpixels 140R, green-emitting subpixels 140G, and blue-emitting subpixels 140B, respectively, depending on the color of the applied phosphors 125R, 125G, and 125B. Since the light emitting subpixels 140R, the green light emitting subpixels 140G, and the blue light emitting subpixels 140B are arranged based on the horizontal partition wall portion 124a.

On the lower substrate 121, a plurality of address electrodes A are formed in a predetermined pattern, for example, a stripe pattern. In the drawing, each of the address electrodes A extends over a row of red subpixels 140R. A _R ), the address electrode A _G extending over one row of green subpixels 140G, and the address electrode A _B extending over one row of blue subpixels 140B are distinguished. The address electrode A performs a function of lowering the discharge start voltage by performing an address discharge together with the M electrode M to be described later, and as a result of the address discharge, the subpixels 140R, 140G, and 140B on which the display discharge is to be performed. Is selected. In the present invention, the address electrode A _G extending over the green light emitting subpixels 140G is the address electrode A extending over the red light emitting subpixels 140R or the blue light emitting subpixels 140B. _R, is formed with a width greater than a _B), i.e., the width (W _G of the address electrode (a _G) in FIG. 4) than the width (W _R, W _B) of the address electrodes (a _R, a _B) It is formed relatively broadly. This will be described later.

Referring to FIG. 3, the address electrode A is embedded by a lower dielectric layer 123 formed on the lower substrate 121, and the dielectric layer 123 is formed of the address electrode A from the impact of charged particles due to discharge. Perform a function to protect it. The dielectric layer 123 may be formed of, for example, PbO, B ₂ O ₃ , SiO _2, or the like.

Meanwhile, a plurality of sets of discharge electrodes S are disposed below the upper substrate 111, and a set of discharge electrodes S are paired with each other by the X electrode X and the Y electrode Y, and the X electrode ( M electrodes M disposed in parallel between X) and Y electrodes Y are included. Each discharge electrode S includes transparent electrodes Xa, Ya, Ma, and bus electrodes Xb, Yb, and Mb, which are in contact with each other. More specifically, the X electrode X and the Y electrode Y have transparent electrodes Xa and Ya formed on the upper side and bus electrodes Xb and Yb formed on the lower side, and the transparent electrodes Xa and Ya are Discharge portions Xa ′ and Ya ′ protruding toward the subpixels 140R, 140G and 140B from the non-discharge portions Xa ′ and Ya ′ extending in one direction and the non-discharge portions Xa ′ and Ya ′. Contains `). The M electrode M also includes a transparent electrode Ma and a bus electrode Mb which are in contact with each other up and down. The transparent electrode Ma is formed to correspond to each of the subpixels 140R, 140G, and 140B. The bus electrode Mb extends in one direction while interconnecting the transparent electrodes Ma. However, as shown in the drawing, the transparent electrodes Ma may not be formed independently of each other, but may be formed in a stripe pattern crossing the subpixels 140R, 140G, and 140B. .

Each of the transparent electrodes Xa, Ya, and Ma provided in each of the discharge electrodes S is formed of a conductive material having a conductivity for communicating a driving signal but having a light transparency that does not interfere with the upward transmission of visible light. Examples of the conductive material include indium tin oxide (ITO) and the like. However, the discharge electrodes S may be formed of only the bus electrodes Xb, Yb, and Mb without the transparent electrodes Xa, Ya, and Ma. The bus electrodes Xb, Yb, and Mb are formed to be in contact with the transparent electrodes Xa, Ya, and Ma in order to supplement the electrical conductivity of the transparent electrodes Xa, Ya, and Ma. The bus electrodes Xb, Yb, and Mb are metal materials having excellent conductivity, for example, a single metal layer such as aluminum (Al), silver (Ag), or a triple of chromium-copper-chromium (Cr-Cu-Cr). It may be formed of a metal layer or the like.

The X electrode X and the Y electrode Y are buried by the first upper dielectric layer 114 formed below the upper substrate 111, and the M electrode M disposed therebetween is the first upper dielectric layer ( 114) is buried by the second upper dielectric layer 115 formed below. The first upper dielectric layer 114 and the second upper dielectric layer 115 function to protect the electrodes X, Y, and M from being damaged by the impact of the charged particles due to discharge, and adjacent X electrodes ( It serves as a function of preventing direct discharge between X) and Y electrode Y. The upper dielectric layers 114 and 115 may be formed of PbO, B ₂ O ₃ , SiO _2, or the like.

A protective layer 116 is formed below the second upper dielectric layer 115 to cover the second upper dielectric layer 115. The protective layer 116 is not an essential component but is preferably formed. The protective layer 116 prevents the charged particles from colliding with the second upper dielectric layer 115 during the discharge to damage the upper dielectric layer 115, and emits a lot of secondary electrons. As the protective layer 116, an MgO film can be used normally.

FIG. 5 is a cross-sectional view of the plasma display panel illustrated in FIG. 3, wherein the upper panel 110 is a cross-sectional view taken along the line VV of FIG. 5, and the lower panel 120 is a line V′-V ′ of FIG. 5. It is a cross section taken along. As shown in FIG. 5, unlike the red phosphor 125R and the blue phosphor 125B whose surfaces are charged to the anode (+), the zinc silicate-based green phosphor 125G has a negative electrode (−). Negative electrode tends to be charged). Therefore, the address voltage decreases relatively in the green light emitting subpixel 140G, and as a result, discharge failure is likely to occur. In the present invention, the width of the address electrode A _G which forms an electric field in the green light emitting subpixels 140G is the address electrode A _R and A passing through the red light emitting subpixel 140R or the blue light emitting subpixel 140B. By forming relatively wider than _B ), the electric field of the green light emitting subpixels 140G is strengthened and address discharge is promoted.

After the address discharge is performed, if a predetermined AC voltage sufficient to cause a discharge is applied between the X electrode X and the Y electrode Y, the sustain discharge P is performed between them (X, Y). At this time, in the present invention, since the M electrode (M) is disposed between the X electrode (X) and the Y electrode (Y), the separation distance (L) between the two electrodes (X, Y) performing the sustain discharge is increased. Can be. That is, in the conventional plasma display panel illustrated in FIG. 2, short gap discharge in which the discharge path is limited is generated, whereas in the present invention, the discharge path is increased to enable long gap discharge. As the discharge is performed along the increased discharge path, as many discharge gases are excited as that, and more phosphors are emitted, the luminance and luminance of the display panel are improved.

FIG. 6 is a diagram illustrating a driving method of the plasma display panel illustrated in FIG. 4, and is a timing diagram illustrating driving signals applied to respective electrodes. The plasma display panel is driven by dividing one frame period into several subfields SF having different emission counts for gray scale expression. One subfield SF is divided into a reset section PR, an address section PA, and a sustain section PS. In the reset period PR, the ground voltage V _G , which is the first voltage, is applied to all the address electrodes A1: An and the Y electrodes Y1: Ym, and a rising ramp signal is applied to the M electrode M. It is applied to reach the highest rising voltage (V _S + V _SET ), which is the second voltage, where the voltage suddenly drops to the sustain discharge voltage (V _S ), which is the third voltage, and then the falling ramp signal is applied to the first voltage. The voltage drops to the ground voltage V _G. Meanwhile, the ground voltage V _G , which is the first voltage, is maintained on the X electrodes X1: Xm, and the highest rising voltage V _S + V _SET applied to the M electrodes M1: Mm is the sustain discharge voltage V. FIG. _While rapidly falling to _S ), a sustain discharge voltage V _S , which is a third voltage, is applied. Through the above-described reset period PR, the state of charge of all subpixels becomes uniform and at the same time, a state suitable for the address discharge described later.

After the reset period PR, the address period PA is continued. In the address period PA, the ground voltage, which is the first voltage, is sequentially applied to the M electrodes M1: Mm biased with the scan voltage V _SCAN . A scanning pulse of (V _G ) is applied and an address signal is applied to each address electrode A1: An. The address signal applied to each of the address electrodes A1: An is applied with the positive address voltage V _A when the subpixel is selected, and the ground voltage V _G otherwise. Accordingly, when the address signal of the positive address voltage V _A is applied while the scan pulse of the ground voltage V _G is applied, wall charges are formed by the address discharge in the corresponding subpixel. Meanwhile, all of the X electrodes X1: Xm are biased to the sustain discharge voltage V _S , which is the third voltage through the address period, and all of the Y electrodes Y1: Ym are the ground voltage V, which is the first voltage. _G ) biased.

In the sustain period PS, the sustain discharge voltage V _S as the third voltage and the ground voltage V _G as the first voltage are alternated to all the X electrodes X1: Xm and the Y electrodes Y1: Ym. By applying a predetermined sustain pulse, the subpixels having the wall voltage in the address period PA cause sustain discharge.

FIG. 7 is an exploded perspective view of a plasma display panel according to a second embodiment of the present invention, and FIG. 8 is a view schematically showing the plasma display panel of FIG. 7. The figure shows the order together. The plasma display panel of this embodiment also includes an upper substrate 211 and a lower substrate 221 opposed to each other, and is disposed between the partitions 211 and 221 to partition the plurality of subpixels 240R, 240G, and 240B. ). The partition wall 224 divides the space between the upper substrate 211 and the lower substrate 221 into a plurality of subpixels 240R, 240G, and 240B, and each of the subpixels 240R, 240G, and 240B. The phosphor 225 is coated on the basis of the horizontal partition wall portion 224a, and the red phosphor 225R, the green phosphor 225G, and the blue phosphor 225B are separately applied.

A plurality of address electrodes A are disposed on the lower substrate 221. The address electrodes A _G formed over one row of the green light emitting subpixels 240G are formed of the red light emitting subpixels 240R and the blue light emitting subpixel. Wider than the address electrodes A _R and A _B formed over the fields 240B, so that the electric field of the green light emitting subpixels 240G is relatively strengthened. This is to prevent discharge failure due to the negative (-) propensity of the green phosphor 225G and to obtain a uniform address discharge effect over the entire display area.

A plurality of sets of discharge electrodes S are formed below the upper substrate 211 and extend in a direction crossing the address electrode A. The sets of discharge electrodes S are paired with each other, the X electrodes X and A Y electrode Y and an M electrode M disposed between both electrodes X and Y are included. Each of the discharge electrodes S includes transparent electrodes Xa, Ya, Ma, and bus electrodes Xb, Yb, and Mb, which are in contact with each other up and down, wherein the M electrodes M each subpixel 240R, 240G. A transparent electrode Ma disposed on the upper side of the 240B and a bus electrode Mb electrically connecting the transparent electrode Ma to each other are provided. However, the transparent electrode Ma may be formed in a stripe shape extending in one direction instead of being independently isolated as shown. The transparent electrode Ma may be formed of, for example, indium tin oxide (ITO), which is a transparent conductive material, and the bus electrode Mb may be formed of a metal material having excellent conductivity. In the present embodiment, the bus electrode Mb of the M electrode has a stripe-shaped base portion Mb` extending in one direction and an extension portion Mb '' protruding from both sides of the base portion Mb`. . The extension part Mb ″ is formed to correspond to the green light emitting subpixel 240G. The extension part Mb ″ is formed to enhance the address discharge of the green light emitting subpixel 240G. Since the extension part Mb ″ is formed, the extension part Mb ″ of the green light emitting subpixel 240G is formed. The electric field is relatively strengthened, and discharge failure due to the negative polarity of the green light emitting subpixel 240G is prevented.

On the other hand, in this embodiment, in order to enhance the electric field of the green light emitting subpixels, the address electrodes extending over the green light emitting subpixels are formed with a relatively wide width, and at the same time, the bus of the M electrode crossing the green light emitting subpixels crosses. An extension part is formed in the electrode part, and this technical matter may be applied separately without being applied at the same time. For example, all of the address electrodes are formed to have the same width, so as to strengthen the electric field of the green light emitting subpixels. An extension portion may be formed in the intersecting bus electrode portion.

Matters related to the upper panel 210 such as the first upper dielectric layer 214, the second upper dielectric layer 215, and the protective layer 216 shown in FIG. 7, and the vertical partition 224b and the lower dielectric layer 223. The back panel 220 is substantially the same as that described in the first embodiment, and a description thereof will be omitted.

 According to the plasma display panel of the present invention, the following effects can be achieved.

First, the address voltage of the plasma display panel can be lowered. According to the present invention, the electric field of the green light emitting subpixels is formed by making the width of the address electrode formed over the green light emitting subpixels relatively wider than that of other address light emitting subpixels or the blue light emitting subpixels. Reinforce relatively. Thus, despite the negative (-) tendency of the green phosphor, a smooth addressing effect can be achieved with a uniform address voltage across all subpixels, resulting in an increase in the margin width of the address voltage.

Second, in the plasma display panel of the present invention, by further disposing an M electrode between the X electrode and the Y electrode for performing the sustain discharge, the discharge path of the sustain discharge is increased, so-called long gap discharge can be performed. The luminous efficiency of the plasma display panel can be improved.

Although the present invention has been described with reference to the embodiments illustrated in the accompanying drawings, it is merely exemplary, and various modifications and equivalent other embodiments are possible from those skilled in the art to which the present invention pertains. You will understand the point. Therefore, the true scope of protection of the present invention should be defined by the appended claims.

Claims (6)

An upper substrate and a lower substrate disposed to face each other; A partition wall disposed between the upper substrate and the lower substrate to partition a plurality of subpixels; Address electrodes extending over the subpixels continuously arranged in one direction; A plurality of sets of discharge electrodes extending in a direction intersecting with the address electrodes and arranged such that pairs of X and Y electrodes paired in parallel with each other and M electrodes formed between the X and Y electrodes are formed in a set; field; A red phosphor, a green phosphor, and a blue phosphor applied in the subpixels to divide each subpixel of each column extending in the address electrode direction into a red light emitting subpixel, a green light emitting subpixel, and a blue light emitting subpixel; And And a discharge gas filled in the subpixels. And an address electrode formed over the green light emitting subpixels is wider than address electrodes formed over the red light emitting subpixels and blue light emitting subpixels. The method of claim 1, The X electrode and the Y electrode are formed under the upper substrate, a first upper dielectric layer filling the X electrode and the Y electrode is formed below the upper substrate, and the M electrode under the first upper dielectric layer. And a second upper dielectric layer formed below the first upper dielectric layer so as to fill the M electrode. The method of claim 1, And a protective layer covering the second upper dielectric layer. An upper substrate and a lower substrate disposed to face each other; A partition wall disposed between the upper substrate and the lower substrate to partition a plurality of subpixels; A plurality of sets of discharge electrodes arranged to extend in series in one direction, the pair of X electrodes and Y electrodes paired in parallel to each other, and a pair of M electrodes formed between the X electrodes and Y electrodes; field; Address electrodes extending in a direction crossing the discharge electrodes; A red phosphor, a green phosphor, and a blue phosphor applied in the subpixels to divide each subpixel into a red light subpixel, a green light subpixel, and a blue light subpixel; And And a discharge gas filled in the subpixels. The M electrode includes a base portion extending in one direction and an extension portion protruding from at least one side of the base portion, wherein the extension portion is formed in a portion corresponding to the green light emitting subpixel. The method of claim 4, wherein The M electrode includes a transparent electrode formed of a transparent conductive material and a bus electrode of a metal material in contact with the transparent electrode, and the base and the extension part constitute the bus electrode. The method of claim 4, wherein  And the X and Y electrodes also include a transparent electrode formed of a transparent conductive material and a bus electrode made of a metal material in contact with the transparent electrode.

Images