KR100588145B1 - Ddc control circuit for channel conflict - Google Patents

Abstract

The present invention relates to a DDC control circuit for data transmission and reception between a monitor circuit unit of a monitor and a graphic control unit of a computer, comprising: a plurality of monitor interfaces provided in the computer for connecting monitor circuit units having different characteristics; A monitor input sensing unit sensing whether the monitor circuit unit is connected to the monitor interface; As a result of the detection from the monitor input detecting unit, if it is detected that the monitor circuit unit is connected to each of the plurality of monitor interfaces, the data request signal is sequentially outputted to the monitor circuit unit through the monitor interface based on a preset priority. And a DDC communication controller for transmitting monitor information input through the monitor interface to the graphic controller in response to the data request signal. As a result, it is possible to provide a DDC control circuit which prevents an error such as data corruption or channel mixing, which may occur by processing each monitor information input to a plurality of monitor interfaces into one DDC circuit.

Description

DDC control circuit to prevent channel mixing {DDC CONTROL CIRCUIT FOR CHANNEL CONFLICT}

1 is a block diagram of a computer system to which the DDC control circuit according to the present invention is applied;

2 is a detailed block diagram of the DDC control circuit of FIG. 1;

3 shows an embodiment of a computer system to which the present DDC control circuit is applied.

* Explanation of symbols for the main parts of the drawings

 1: computer body 3: graphics card

 5: graphic controller 10: DDC control circuit

12: monitor input detection unit 14: data request signal output unit

16: monitor data input unit 18: DDC communication control unit

20: memory 22: monitor data output unit

30: monitor interface 34: DVI connector

36: D-SUB15 Connector 50: Monitor Circuit

52: EEPROM

The present invention relates to a DDC control circuit, and more particularly, to prevent an error such as data corruption or channel mixing, which may occur by processing each monitor information input to a plurality of monitor interfaces into a single DDC circuit. It relates to a DDC control circuit.

Monitors are largely divided into LCD monitors and CRT monitors according to the display method. LCD monitors that display data using liquid crystals use digital signals such as DVI (Digital Video Interface) or DFP (Digital Flat Panel). In contrast, since the CRT monitor processes analog input signals, the CRT monitor has a D-Sub interface for analog signal input. Therefore, the graphics card for applying the video signal to each monitor can also be connected to the corresponding monitor only if it has an interface corresponding to the interface of the monitor.

However, since monitors having such a separate video signal processing method are widely used, a single monitor supports a plurality of interface functions for receiving and processing two or more video signals to increase compatibility, or two graphics cards are provided. It is often manufactured to support more than a kind of video signal processing function. In particular, recently developed LCD monitors are often provided with a D-Sub connector simultaneously with a DVI connector for processing a digital input signal, so as to process a conventional analog input signal. In addition, the graphics card may be equipped with a digital DVI connector and an analog D-Sub connector at the same time so that the monitor can be connected and used according to the user's needs.

On the other hand, most of the monitors currently produced have a DDC (Display Data channel) function, the monitor transmits the information (EDID: Extended Display ID) of the monitor to the computer body side. The monitor information includes the manufacturer ID indicating the manufacturer, the manufacturing ID indicating the product model name, whether the power saving mode is supported, the CRT characteristics, and the like. The graphic card of the computer main body provides a video signal to the monitor based on this information. Optimize the display environment.

By the way, in the case of a graphics card having a plurality of monitor interfaces, there are a plurality of physically installed connectors, but there may be one DDC circuit that receives information from the monitor. Accordingly, when a plurality of monitor inputs are connected to a plurality of connectors provided on one graphics card, all information received from each connector is received and processed through one DDC circuit, so that data is broken or a channel is mixed. Phenomenon may occur.

Accordingly, it is an object of the present invention to provide a DDC communication circuit which prevents errors such as data mixing or corruption, which may occur by processing each monitor information input to a plurality of monitor interfaces into one DDC circuit.

According to the present invention, there is provided a DDC control circuit for data transmission and reception between a monitor circuit unit of a monitor and a graphic control unit of a computer, comprising: a plurality of monitor interfaces provided in the computer for connecting monitor circuit units having different characteristics; A monitor input sensing unit sensing whether the monitor circuit unit is connected to the monitor interface; As a result of the detection from the monitor input detecting unit, if it is detected that the plurality of monitor circuit units are connected to the plurality of monitor interfaces, the data request signal is sequentially outputted to the monitor circuit unit through the monitor interface based on a preset priority. And a DDC communication controller for transmitting monitor information input through the monitor interface to the graphic controller in response to the data request signal.

The apparatus may further include a memory in which a communication priority table according to the type of the monitor circuit unit is stored, and when it is detected that a plurality of monitor circuit units are connected to the plurality of monitor interfaces, as a result of the detection from the monitor input sensing unit. The control unit sequentially outputs a data request signal to the monitor circuit unit through the monitor interface based on the priority table stored in the memory, and displays the monitor information input through the monitor interface in response to the data request signal. It is preferable to transmit to the control unit.

The monitor may include at least two monitor circuits, and the computer may include a plurality of monitor interfaces corresponding to the monitor circuits, and the DDC communication control unit may include a preset priority for each monitor circuit connected to the monitor interface. The data request signal is sequentially output based on the ranking, and the monitor information input through the monitor interface is transmitted to the graphic control unit in response to the data request signal, thereby inputting a monitor having two or more inputs. It is most desirable to allow for selective use.

Here, the monitor interface may be a digital video interface (DIV) and a D-Sub connector.

Hereinafter, the present invention will be described in detail with reference to the accompanying drawings.

1 is a block diagram schematically illustrating a computer system to which a DDC control circuit according to the present invention is applied based on the flow of monitor information. As shown in the figure, the DDC control circuit 10 according to the present invention includes a plurality of monitor circuit units 50A, which support a DDC to a computer main body 1 supporting a plurality of monitor interfaces 30A, 30B ... Applies if 50B ..) is connected.

The graphics card 3 mounted on the computer main body 1 and providing an image signal to the monitor includes a plurality of monitor interfaces 30A and 30B which can be connected according to the type of monitor. For example, an interface such as a digital video interface (DVI) or a digital flat panel (DFP) for input / output of a digital signal, or a D-sub interface for input / output of an analog signal is provided. Therefore, it is possible to simultaneously connect the monitor including the monitor circuit portion 50A for analog signal processing and the monitor having the monitor circuit portion 50B for digital signal processing to the respective monitor interfaces 30A and 30B. In this case, two monitors are connected to one computer main body 1.

Alternatively, it is possible to connect two inputs output from the monitor including both the monitor circuit section 50A, which is an analog circuit, and the monitor circuit section 50B, which is a digital circuit, to the respective monitor interfaces 30A, 30B. In this case, one monitor is connected to one computer main body 1, but two internal image input lines exist.

The monitor supported by the DDC stores the monitor information such as monitor characteristics, performance, power saving mode support, and model ID in the EEPROM 52. The monitor circuit unit 50 provides the monitor information stored in the EEPROM 52 to the computer main body 1 through the monitor interface 30. Therefore, the graphic controller 5 of the computer main body 1 optimizes the display environment by providing an image signal to the monitor based on the monitor information. On the other hand, when one monitor is designed to handle both analog and digital circuits, two or more monitor circuits 50A and 50B exist in one monitor, and each EEPROM 52A and 52B stores corresponding information. Each).

The graphic controller 5 not only applies an image signal to the monitor, but also executes a predetermined driver program to control the monitor according to the signal from the central processing unit. The graphic controller 5 includes both a digital circuit for providing a digital video signal and an analog circuit for providing an analog video signal in order to provide an image signal according to the type of the monitor circuit unit 50 connected to the monitor interface 30. In this way, an appropriate video signal is transmitted to the connected monitor based on the monitor information input from the monitor.

On the other hand, the DDC control circuit 10 detects the monitor circuit unit 50 connected to the plurality of monitor interfaces 30 at the same time, and transmits a data request signal to the EEPROM 52 of the monitor circuit unit 50 according to a preset priority. Output The monitor information stored in the EEPROM 52 of the monitor is sequentially provided to the graphic controller 5 according to the data request signal of the DDC control circuit 10.

Such a detailed block diagram of the DDC control circuit 10 is as shown in FIG. The DDC control circuit 10 has a monitor input sensing unit 12 for sensing the type of monitor circuit unit 50 connected to the monitor interface 30, and a data request signal output for outputting a monitor information request signal to the monitor circuit unit 50. A unit 14 and a monitor data input unit 16 for receiving monitor information input through the monitor interface 30. The DDC communication control unit 18 determines the type of the plurality of monitor circuit units 50 connected to the monitor interface 30 according to the detection result from the monitor input detecting unit 12, and based on the priorities set in advance, the monitor circuit unit ( 50) sequentially output the data request signal. In accordance with the data request signal, the monitor information stored in the EEPROM 52 of the monitor circuit unit 50 is transferred to the graphics card 3. The monitor information input through the monitor data input unit 16 is sequentially provided to the graphic controller 5 through the monitor data output unit 22 under the control of the DDC communication controller 18.

Here, the DDC control circuit 10 further includes a memory 20 for storing the priority for requesting monitor information according to the type of the monitor circuit unit 50, and the DDC communication control unit 18 has a priority set in the memory 20. According to the ranking, the data request signal is sequentially output to the plurality of monitor circuit units 50 to receive monitor information from the monitor. The priority stored in the memory 20 may be set in the production process of the computer system, or may be changed by the user as needed.

With this configuration, even if a plurality of monitor circuit units 50A, 50B are simultaneously connected to the plurality of monitor interfaces 30A, 30B, the monitor information can be sequentially provided under the control of the DDC control circuit 10. Even if there is only one DDC channel of the graphic controller 5, it is possible to prevent the monitor information from being damaged or mixing the channel. In addition, when the plurality of monitor circuit sections 50A and 50B provided in one monitor are connected to the monitor interfaces 30A and 30B, respectively, the monitor information from the monitor circuit section 50 selected under the control of the DDC control circuit 10. It is possible to receive.

3 is a control block diagram when the DDC control circuit according to the present invention is applied to an actual computer system. As shown in the figure, the graphics card 3 is provided with a DVI and D-Sub type monitor interface 30.

The DVI connector 34 is a digital signal interface for connecting an LCD monitor. The DVI connector 34 detects the HOT_PLUG_DETECT signal and the DVI_SYNC signal and provides the same to the DDC control circuit 10 so that the DDC communication controller 18 of the DDC control circuit 10 can determine whether the LCD monitor is connected. . When the DDC communication control unit 18 outputs the data request signal to the LCD monitor through the DVI connector 34, the SCL (serial clock) signal, which is a clock signal, and the SDA (serial data) signal, which is a data signal, are output from the monitor circuit unit 50. Input via the DDC_CLK and DDC_DATA terminals of the DVI connector 34, respectively. That is, the monitor information stored in the EEPROM 52 of the monitor circuit unit 50 is input to the DDC_CLK and DDC_DATA terminals as the SCL signal and the SDA signal, and provides the monitor information to the graphic control unit 5 of the computer main body 1. .

The D-Sub connector 36 is an analog signal interface for connecting a CRT monitor. In the connector using the D-Sub method, signals are inputted and outputted through 15 pins. In the drawing, reference numbers will be given only for the pins necessary for explanation. The D-Sub connector 36 detects the V-SYNC signal transmitted through pin 14 and provides the D-DC control circuit 10 so that the DDC communication controller 18 can determine whether the CRT monitor is connected. . When the DDC communication control unit 18 outputs a data request signal to the CRT monitor, the SDA signal from the CRT monitor circuit unit 50 through pin 12 of the D-Sub connector 36 and the SCL signal through pin 15. Is transmitted, the monitor information is provided to the graphic control unit (5).

In the case of having such a monitor interface 30, a priority table showing a method for controlling monitor information according to a signal input from each connector is shown in Table 1 below.

<Table 1>

As shown in Table 1, the DDC communication control unit 18 detects the HOT_PLUG_DETECT signal and the V_SYNC signal from each connector to determine the connector to which the monitor is connected, and outputs a data request signal to the connected monitor circuit unit 50 from the monitor. Get monitor information.

In addition, when two monitors are connected to each of the two connectors, the data request signal is output to the priority monitor first, the monitor information of the corresponding monitor is received and transmitted to the graphic control unit 5, and then the data is sent to the monitor of the next rank. Output the request signal to receive and transmit the monitor information. Accordingly, the graphic controller 5 may sequentially receive monitor information from two monitors connected at the same time.

For example, if the DVI connector 34 has a priority over the D-Sub connector 36, the DDC control circuit 10 first selects the DVI connector 34 to output a data request signal, and then the D- The sub connector 36 is selected to output a data request signal. Accordingly, the DDC control circuit 10 transmits DATA_1 received first through the DVI connector 34 to the graphic controller 5, and then transmits DATA_2 received through the D-Sub connector 36 to the graphic controller 5. do.

As described above, according to the present invention, by outputting a data request signal in accordance with a preset priority to a monitor connected to a plurality of monitor interfaces at the same time, and having a DDC control circuit which receives monitor information sequentially and delivers it to the graphic controller. Even when communicating with one DDC through a plurality of monitor interfaces, an error such as data being mixed or corrupted can be prevented.

 As described above, according to the present invention, there is provided a DDC control circuit which prevents an error such as data corruption or channel mixing, which may occur by processing each monitor information input to a plurality of monitor interfaces with one DDC circuit. do.

Claims (4)

In the DDC control circuit for data transmission and reception between the monitor circuit portion of the monitor and the graphic control portion of the computer, A plurality of monitor interfaces provided in the computer for connecting monitor circuits having different characteristics; A monitor input sensing unit sensing whether the monitor circuit unit is connected to the monitor interface; As a result of the detection from the monitor input detecting unit, when it is detected that the monitor circuit unit is connected to each of the plurality of monitor interfaces, the data request signal is sequentially outputted to the monitor circuit unit through the monitor interface based on a preset priority. And a DDC communication controller for transmitting monitor information input through the monitor interface to the graphic controller according to the data request signal. The method of claim 1, The apparatus may further include a memory storing a communication priority table according to the type of the monitor circuit. When the detection result from the monitor input detection unit detects that the plurality of monitor circuits are connected to the plurality of monitor interfaces, the DDC communication control unit monitors the monitors through the monitor interface based on the communication priority table stored in the memory. And sequentially outputting a data request signal to a circuit unit and transmitting monitor information input through the monitor interface to the graphic control unit in response to the data request signal. The method of claim 1, The monitor includes at least two monitor circuits, The computer includes a plurality of monitor interfaces corresponding to the monitor circuit, The DDC communication control unit sequentially outputs data request signals to respective monitor circuits connected to the monitor interface based on a preset priority, and monitors the monitor information input through the monitor interface in response to the data request signal. DDC control circuit, characterized in that the transmission to the graphics control unit. The method of claim 3, wherein The monitor interface DDC control circuit, characterized in that it comprises a DVI (Digital Video Interface) and a D-Sub connector.

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