KR100573151B1 - Plasma display panel - Google Patents

Abstract

An object of the present invention is to provide a plasma display panel having a structure that prevents visible light generated in one pixel from leaking to neighboring pixels. To achieve the above object, the present invention provides at least three subpixels. A plasma display panel having pixels, comprising: an upper substrate, a plurality of sustain discharge electrode pairs arranged in parallel with each other below the upper substrate, an upper dielectric layer covering the sustain discharge electrode pairs, and a parallel with the upper substrate A lower substrate disposed so as to intersect the sustain discharge electrode pairs on the lower substrate, a lower dielectric layer covering the address electrode, an outer portion formed on the lower dielectric layer and defining pixels; A plurality of partitions spaced apart from each other with an inner portion partitioning the subpixels, and within the subpixel It provides a plasma display panel having a discharge gas disposed within the phosphor layer, and a sub-pixel.

Description

 Plasma display panel {Plasma display panel}

1 is a perspective view showing a conventional conventional AC plasma display panel,

FIG. 2 is a cross-sectional view taken along the line II-II of FIG. 1,

3 is an exploded perspective view schematically illustrating a plasma display panel according to an embodiment of the present invention;

4 is a cross-sectional view taken along line IV-IV of FIG. 3,

5 is a cross-sectional view taken along the line VV of FIG. 3,

FIG. 6 is a plan view illustrating partition walls provided in the plasma display panel of FIG. 3.

FIG. 7 is a first modification of FIG. 4, and FIG.

8 is a second modified example of FIG. 4.

Explanation of symbols on the main parts of the drawings

100: plasma display panel 122: upper substrate

123: sustain discharge electrode pair 124: X electrode

125: Y electrode 126: upper dielectric layer

128: protective film 132: lower substrate

135: address electrode 136: lower dielectric layer

138: phosphor layer 140: partition wall

141: inner portion 142: outer portion

G: separation space Li: visible light

Lo: Outer light

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a plasma display panel. More particularly, the present invention relates to a plasma display panel, and more particularly, includes an upper dielectric layer having a structure for preventing a halation phenomenon in which visible light leaks into an adjacent pixel. The present invention relates to a plasma display panel.

Plasma display panels, which are recently attracting attention as replacing conventional cathode ray tube display devices, have a discharge voltage applied after discharge gas is filled between two substrates on which a plurality of electrodes are formed. Therefore, the phosphor formed in a predetermined pattern is excited by ultraviolet rays generated from the discharge gas, thereby obtaining a desired image.

The plasma display panel may be classified into a direct current type and an alternating current type according to a discharge type. In the DC plasma display panel, the electrodes are exposed to the discharge space, so that the movement of charged particles is made directly between the corresponding electrodes. In the AC plasma display panel, at least one electrode is covered with a dielectric layer, and the direct charge of the corresponding electrodes The discharge is performed by an electric field of wall charge instead of movement.

In the DC plasma display panel, since there is a problem in that the electrode is severely damaged due to the direct movement of charges between the corresponding electrodes, in recent years, an AC type plasma display having a three-electrode surface discharge structure has been developed. Panels have been generally employed.

The conventional surface discharge plasma display panel 10 including the AC three-electrode surface discharge plasma display panel includes an upper substrate 22 and a lower substrate 32 as shown in FIGS. 1 and 2.

The lower substrate 32 includes address electrodes 35, a lower dielectric layer 35 covering the address electrodes, a partition 40 partitioning discharge cells, and a lower substrate on which both sides of the partition wall and the partition wall are not formed. The phosphor layer 38 applied to is formed.

The upper substrate 22 disposed to face the lower substrate so as to face the lower substrate, the sustain discharge electrode pairs 23 for generating a sustain discharge, an upper dielectric layer 26 covering the sustain discharge electrode pairs 23, and a protective film. 28 is provided.

The sustain discharge electrode pair 23 is usually composed of an X electrode 24 and a Y electrode 25. The X electrode 24 generally includes a transparent X electrode 24a and a bus X electrode 24b disposed on one side of the transparent X electrode, and the Y electrode 25 is usually a transparent Y electrode 25a and the And a bus Y electrode 25b disposed on one side of the transparent Y electrode.

The space formed by the sustain discharge electrode pair 23 composed of a pair of the X electrodes 24 and the Y electrodes 25 and the address electrodes 35 intersected therewith is a unit sub-pixel (SP). ).

In general, the subpixel SP is one of a red light emitting subpixel emitting red visible light, a green light emitting subpixel emitting green visible light, and a blue light emitting subpixel emitting blue visible light. The green light emitting subpixels and the blue light emitting subpixels are combined to form one pixel.

The operation of the plasma display panel having such a structure is as follows. When a predetermined voltage is applied to the address electrode 35 and the Y electrode 25, a subpixel for emitting light is selected, and an address discharge occurs between two electrodes in the selected subpixel, causing wall charge on the upper dielectric layer 26. Is charged. After that, if a predetermined voltage is applied between the X electrode 24 and the Y electrode 25, the wall charge is moved between the X and Y electrodes 24 and 25, and a sustain discharge is generated through the discharge gas. As a result, the discharge gas generates ultraviolet rays, and the generated ultraviolet rays excite the phosphor. As a result, visible light is generated in the phosphor layer, and the visible light is leaked to the outside through the upper substrate 22, thereby displaying an image.

However, in the plasma display panel having the structure as described above, a phenomenon in which the visible light excited by the phosphor layer 38 leaks to another subpixel SP occurs. That is, visible light Li generated in the phosphor layer 38 passes through the upper dielectric layer 26 to reach the upper substrate 22, and the visible light reaching the upper substrate 22 is reflected again to form the partition 40. ), And again reflects from the partition 40 and proceeds toward the upper substrate 22 while leaking to neighboring subpixels and being emitted to the outside.

In addition, the upper substrate 22 and the lower substrate 32 are fixed by an encapsulation member whose peripheral portion is usually made of frit for sealing. In this case, the middle portion of the panel is fixed in a shape in which the upper substrate is pressed against the partition wall by the pressure difference between the atmospheric pressure applied from the outside and the discharge gas of 1 atm or less enclosed between the upper substrate 22 and the lower substrate 32. The shape is maintained. In this case, the pressure of the sealed discharge gas is 300 to 500 torr, which is not largely different from the atmospheric pressure of 760 torr.

Therefore, when a conventional plasma display panel is mounted in a low pressure state, for example, an airplane, a situation arises between the upper substrate and the partition wall instantaneously in a state where the air pressure inside the airplane is unexpectedly lowered compared to the normal atmospheric pressure. At this time, visible light Li is leaked to the neighboring subpixel SP between the upper substrate 22 and the partition 40.

Due to this phenomenon, an image of an unwanted color is realized in the surrounding subpixel, which is called a halation phenomenon. Such a halation phenomenon has a problem in that the performance of the panel is degraded, especially when occurring between adjacent pixels P.

That is, the pixel P is one light emitting unit as is known, and one unit color is formed as a combination of colors of the subpixels SP in the pixel. Therefore, when the visible light Li leaks between the pixels P, the image quality is not clearly seen in one pixel, so that the image quality is degraded, and the contrast contrast is reduced when the video is implemented.

In addition, when the partition 40 is in the form of a matrix to prevent electrical and optical crosstalk between neighboring subpixels SP, as shown in FIG. 1, each of the subpixels SP is partitioned 40. Due to the left and right being blocked by the upper and lower sides, the ventilation resistance is increased inside the plasma display panel, the smooth flow of the exhaust gas is blocked, the exhaust is extremely difficult, the time required for the exhaust is very long, and the exhaust is incomplete.

When the remaining gas is present in the subpixel due to incomplete exhaust gas, the remaining gas acts as a cause of erroneous discharge by changing the driving conditions in the discharge cell.

SUMMARY OF THE INVENTION The present invention has been made to solve various problems including the above problems, and an object of the present invention is to provide a plasma display panel having a structure that prevents visible light generated in one pixel from leaking to neighboring pixels.

It is still another object of the present invention to provide a plasma display panel having a partition having a ventilation structure that prevents cross talk between charged particles through adjacent partitions between partitions and at the same time facilitates exhaust.

In order to achieve the above object, a plasma display panel according to an embodiment of the present invention is:

A plasma display panel having pixels with at least three subpixels,

Upper substrate;

A plurality of sustain discharge electrode pairs arranged in parallel with each other below the upper substrate;

An upper dielectric layer covering the sustain discharge electrode pairs;

A lower substrate disposed to be parallel to the upper substrate;

A plurality of address electrodes disposed on the lower substrate so as to intersect the sustain discharge electrode pairs;

A lower dielectric layer covering the address electrode;

A plurality of partition walls formed on the lower dielectric layer and having an outer portion defining the pixels and an inner portion partitioning the subpixels and spaced apart from each other;

A phosphor layer disposed in the subpixel; And

And a discharge gas in the subpixel.

Here, it is preferable that the partition wall has a dark color.

In this case, the separation space between the partition walls is formed of a dielectric containing a pigment component of the lower dielectric layer is dark, the pigment component is CdSe, CdS, CoO, Al ₂ O ₃ , ZnO, Fe ₂ O ₃ , Cr It is preferable to include at least one selected from the group consisting of ₂ O ₃ , MnO ₂ , CuO, NiO.

In contrast, a light absorption layer having a dark color may be formed in the spaced space between the partition walls of the upper side of the lower dielectric layer.

On the other hand, the sustain discharge electrode pairs extend across the subpixels in one direction, and the address electrode extends across the subpixels so as to cross the sustain discharge electrode pairs.

In addition, a protective film is preferably formed on the lower surface of the upper dielectric layer.

Next, embodiments of the present invention will be described in detail with reference to the accompanying drawings. 3 to 6, a plasma display panel 100 according to an exemplary embodiment of the present invention includes an upper substrate 122, a lower substrate 132, a pair of sustain discharge electrodes 123, and an upper dielectric layer 126. And a phosphor layer 138, an address electrode 135, a lower dielectric layer 136, a partition wall 140, and a discharge gas (not shown).

The plasma display panel has pixels P with at least three subpixels SP. In this case, one pixel P is typically composed of three subpixels SP of a red light emitting subpixel, a green light emitting subpixel, and a blue light emitting subpixel.

The transparent upper substrate 122 is disposed in parallel with the lower substrate 132 so that visible light Li in the subpixel passes through to project an image. The upper substrate 122 is made of a material having good light transmittance such as glass, through which visible light Li is emitted to the outside. The lower substrate 132 is also usually made of a material mainly composed of glass.

On the lower side of the upper substrate 122, a pair of sustain discharge electrodes 123 in which the X electrode 124 and the Y electrode 125 are arranged in pairs is formed, and the sustain discharge electrode pair 123 of the upper substrate 122 is formed. The address electrodes 135 are disposed on an upper side of the lower substrate 132 opposite to the disposed surface. In this case, the sustain discharge electrode pairs 123 extend across the subpixels in one direction, and the address electrodes 135 cross the subpixels SP to intersect the sustain discharge electrode pairs 123. It is preferred to extend.

The X electrode 124 is usually composed of a transparent X electrode 124a and a bus X electrode 124b, and the Y electrode 125 is usually composed of a transparent Y electrode 125a and a bus Y electrode 125b. The transparent X electrode 124a and the transparent Y electrode 125a are transparent electrodes made of indium tin oxide (ITO), and the bus X electrode 124b and the bus Y electrode 125b are the transparent X electrode 124a and the transparent Y. It is formed on the lower surface of the electrode 125a and made of a metal material, for example, to reduce the electrode line resistance of the transparent X electrode 124a and the transparent Y electrode 125a.

The upper substrate 122 having the sustain discharge electrode pairs 123 and the lower substrate 132 on which the address electrode 135 is formed, respectively, have an upper dielectric layer 126 and a lower dielectric layer (filled with electrodes). 136 is formed.

Each of the upper dielectric layer 126 and the lower dielectric layer 136 may induce charge while preventing cations or electrons from colliding with the sustain discharge electrode pair 123 and the address electrode 135 to damage the electrodes. It is formed as a dielectric.

A protective film 128 is preferably formed on the lower surface of the upper dielectric layer 126. The protective film 128 serves to prevent damage to the dielectric layer due to the sputtering of plasma particles and to lower the discharge voltage and the sustain voltage due to secondary electron emission. In general, an MgO thin film by vapor deposition is used.

The partition wall 140 is formed on the lower dielectric layer 136. The partition wall 140 prevents mis-discharge between one of the red light emitting pixel, the green light emitting subpixel, and the blue light emitting subpixel constituting the unit pixel.

In the subpixel SP, a phosphor layer 138 for generating visible light of red, green, and blue colors is usually disposed.

The phosphor layer 138 includes a component that emits visible light by receiving ultraviolet rays emitted by the sustain discharge. In general, the red phosphor layer formed on the red light emitting subpixel includes phosphors such as Y (V, P) O4: Eu. And the green phosphor layer formed on the green light emitting subpixel includes phosphors such as Zn ₂ SiO ₄ : Mn, YBO ₃ : Tb, and the like, and the blue phosphor layer formed on the blue light emitting subpixel includes phosphors such as BAM: Eu and the like. .

As the discharge gas (not shown) filled in the subpixel SP, penning mixtures such as Xe-Ne, Xe-He, and Xe-Ne-He are generally used.

The reason why Xe is used as the main discharge gas is that because Xe is a chemically stable inert gas, it is not dissociated due to discharge, but because the atomic number is large, the excitation voltage is lowered and the wavelength of light emitted is increased. to be. The reason for using He or Ne as a buffer gas is because the voltage reduction effect due to the panning effect due to Xe and the sputtering effect due to the high pressure are reduced.

In the driving method of the plasma display panel 100 having the above configuration, an address discharge occurs by first applying an address voltage between the address electrode 135 and the Y electrode 125, and a sustain discharge occurs as a result of the address discharge. The subpixel SP is selected.

Thereafter, when a sustain discharge voltage, which is an alternating current, is applied between the Y electrode 125 and the X electrode 124 in the selected subpixel, a sustain discharge occurs between the X electrode 124 and the Y electrode 125, and by this sustain discharge. As the energy level of the excited discharge gas is lowered, ultraviolet rays are emitted. The ultraviolet rays excite the phosphor layer 138 coated in the discharge cell. As the energy level of the excited phosphor layer decreases, visible light is emitted, and the emitted visible light expresses an image.

The partition wall 140 provided in the plasma display panel adopted in the present invention includes an outer portion 142 and an inner portion 141. The outer portion 142 defines the pixels P, and the inner portion 141 partitions the subpixels SP within the pixel. Therefore, one partition wall 140 is formed for each pixel P.

In this case, the adjacent partition walls 140 are formed to be spaced apart from each other.

Accordingly, visible light Li generated in the one pixel P and passing through the upper dielectric layer 126 strikes the upper substrate 122 and the partition wall 140 and is reflected therebetween. G) is inserted. In addition, visible light Li inserted between the upper dielectric layer 126 and the upper substrate 122 is also inserted into the separation space G between the adjacent partition walls.

As a result, a halation phenomenon in which visible light Li leaks from one pixel P to another adjacent pixel is prevented from occurring, thereby making the image visible in one pixel, thereby improving the image quality. Real-time contrast is increased in the video implementation.

Here, it is preferable that the partition wall has a dark color (140u) of the upper surface, which is because external light (Lo) flowing from the outside through the upper substrate 122 is absorbed at the upper surface of the dark partition wall, thereby further increasing the clear room contrast. Because it can improve. Here, dark means a color having a number of 5 or less in the Munsell color system.

In addition, as shown in FIG. 6, the spaces 140 are formed to be spaced apart from each other, so that a space G is generated between the pixels, and the exhaust gas remaining in the sub-pixel SP through the space is spaced. The gas flows smoothly and flows out, and the time required for exhaust is shortened.

Meanwhile, as shown in FIG. 7, the lower dielectric layer 136b positioned in the spaced space G between the partition walls of the lower dielectric layer 136 is preferably formed of a dielectric including a pigment component having a dark color. That is, the lower dielectric layer 136 has a discharge lower dielectric layer 136a formed of a normal dielectric in a region corresponding to one partition wall 140 and a non-discharge lower dielectric layer formed in a space G between the partition walls 140. Divided by 136b, it is preferable that the non-discharge lower dielectric layer 136b is formed of a dark dielectric.

Since the non-discharge region is a non-discharge region in which no discharge occurs, the regions spaced between the partition walls 140 are dark, so that external light Lo from the outside is absorbed by the dark lower dielectric layer 136. This is because the contrast can be increased. That is, the non-discharge lower dielectric layer 136b serves as a black stripe.

In this case, the pigment component preferably contains at least one selected from the group consisting of CdSe, CdS, CoO, Al ₂ O ₃ , ZnO, Fe ₂ O ₃ , Cr ₂ O ₃ , MnO ₂ , CuO, NiO.

Unlike this, as illustrated in FIG. 8, a light absorption layer 137 having a dark color may be formed in the spaced space G between the partition walls of the upper dielectric layer 136u of the lower dielectric layer. The light absorption layer 137 plays the same role as the non-discharge lower dielectric layer 136b having a dark color, and the method of manufacturing the light absorption layer 137 is simple. That is, after the partitions 140 are formed on the lower substrate 132 on which the address electrode 135 and the lower dielectric layer 136 are formed, the light absorption layer 137 is easily inserted by inserting the light absorption layer material between the partitions 140. Can be produced.

According to the present invention having the structure as described above, visible light generated in one pixel is inserted into the space between the partition walls, so that the visible light does not leak to the neighboring pixels, so that the image is clearly visible at one pixel, the emotional quality is improved. It is improved, and in particular, the contrast contrast is increased in video implementation.

In addition, since the exhaust gas flows smoothly and flows to the outside, the time required for exhausting is shortened, and since the exhaust gas can be completely exhausted, residual gas does not exist in the subpixel, thereby preventing mis-discharge. .

In addition, since the non-discharge area between the subpixels and the subpixels and between the pixels and the pixel becomes dark, the clear room contrast is increased.                     

Although the present invention has been described with reference to the embodiments shown in the drawings, this is merely exemplary, and any person skilled in the art to which the present invention pertains may have various modifications and equivalent other embodiments. Will understand. Therefore, the true technical protection scope of the present invention will be defined by the technical spirit of the appended claims.

Claims (6)

A plasma display panel having pixels with at least three subpixels, Upper substrate; A plurality of sustain discharge electrode pairs arranged in parallel with each other below the upper substrate; An upper dielectric layer covering the sustain discharge electrode pairs; A lower substrate disposed to be parallel to the upper substrate; A plurality of address electrodes disposed on the lower substrate so as to intersect the sustain discharge electrode pairs; A lower dielectric layer covering the address electrode; A plurality of barrier ribs having an outer portion formed to define the pixels on the lower dielectric layer and an inner portion formed to define the subpixels of the pixel in the outer portion inner space, wherein the adjacent barrier ribs have a predetermined distance from each other. A plurality of partitions spaced apart from each other and having at least a top surface darkened; A phosphor layer disposed in the subpixel; And And a discharge gas in the subpixel. delete The method of claim 1, The separation space between the barrier ribs is formed of a dielectric including a pigment component in which the lower dielectric layer has a dark color. The pigment component CdSe, CdS, CoO, Al ₂ O ₃ , ZnO, Fe ₂ O ₃ , Cr ₂ O ₃ , MnO ₂ , CuO, NiO The plasma display panel comprising at least one selected from the group consisting of. The method of claim 1, And a light absorbing layer having a dark color is formed in the space between the partition walls of the upper side of the lower dielectric layer. The method of claim 1, The sustain discharge electrode pairs extend across the subpixel in one direction, And the address electrode extends across the subpixel to intersect the pair of sustain discharge electrodes. The method of claim 1, And a protective film formed on a lower surface of the upper dielectric layer.

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