KR100570965B1 - Energy recovery circuit and its driving method - Google Patents

Abstract

The present invention relates to an energy recovery circuit of a plasma display panel capable of integrating an energy recovery circuit on one board, and minimizing a loss current while reducing the number of components used.

An energy recovery circuit according to the present invention includes a sustain voltage source, a panel capacitor equivalently formed in a discharge cell, a sustain capacitor for recovering a voltage charged in the panel capacitor and resupplying the recovered voltage to the panel capacitor. An inductor for forming the panel capacitor and a resonant circuit, a first switch for forming a first path between the inductor and the panel capacitor when the voltage of the sustain capacitor is supplied to one side of the panel capacitor, A second switch for forming a second path between the inductor and the panel capacitor when the voltage of the sustain capacitor is supplied to the other side of the panel capacitor, and the first switch when the voltage of the sustain voltage source is supplied to the panel capacitor. Blocking Current Leakage Through One Path and Second Path And a third switch.

Description

Energy Recovery Circuit and Driving Method Thereof

1 is a view showing a conventional energy recovery circuit.

FIG. 2 is a drive waveform diagram of the energy recovery circuit shown in FIG.

3 is a waveform diagram showing a voltage applied to a panel capacitor by the energy recovery circuit shown in FIG.

4 shows an energy recovery circuit according to a first embodiment of the present invention.

5 shows an energy recovery circuit according to a second embodiment of the present invention.

6 is a view showing an energy recovery circuit according to a third embodiment of the present invention.

FIG. 7 is a drive waveform diagram of the energy recovery circuit shown in FIG. 6; FIG.

FIG. 8 is a circuit diagram showing a current path in a period T1 shown in FIG.

9 is a circuit diagram showing a current path in a period T2 shown in FIG.

10 is a circuit diagram showing a current path in a period T3 shown in FIG.

FIG. 11 is a circuit diagram showing a current path in a period T4 shown in FIG.

12 is a circuit diagram showing a current path in a period T5 shown in FIG.

FIG. 13 is a circuit diagram showing a current path in a period T6 shown in FIG.

FIG. 14 is a circuit diagram showing a current path in a period T7 shown in FIG.

FIG. 15 is a circuit diagram showing a current path in a period T8 shown in FIG.

FIG. 16 is a circuit diagram showing a current path in a period T9 shown in FIG.

FIG. 17 is a circuit diagram showing a current path in a period T10 shown in FIG.

<Explanation of symbols for the main parts of the drawings>

10: first energy recovery circuit 20: second energy recovery circuit

22, 32, 42: power supply 26, 36, 46: charge / discharge

28, 38, 48: path forming portion Y: scanning electrode

Z: sustain electrode N1: first node

N2: second node N3: third node

N4: fourth node

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to an energy recovery circuit of a plasma display panel (hereinafter referred to as "PDP"), in particular, integrating the energy recovery circuit on one board, reducing the number of components used, and the loss current. The energy recovery circuit of the plasma display panel can be minimized.

The biggest disadvantage of PDP is the high power consumption. That is, in order to reduce power consumption, it is necessary to increase luminous efficiency and minimize unnecessary energy consumption generated in the driving process without being directly related to discharge.

The AC PDP utilizes surface discharge occurring on the surface of the dielectric by applying an electrode to the dielectric. In this AC type PDP, the drive pulse has a high voltage of tens to hundreds [V] in order to sustain discharge from tens of thousands to millions of cells, and the frequency is more than several hundreds [k]. When such a driving pulse is applied in the cell, high capacitance charge / discharge occurs.

In this case, the capacitive load of the panel alone does not consume energy when charging / discharging occurs in the PDP. However, since a driving pulse is generated by using a DC power source, much energy loss occurs in the PDP. In particular, if an excessive current flows in the cell during discharge, the energy loss is greater. This energy loss results in an increase in the temperature of the switch elements, which in the worst case may destroy the switch element. The energy recovery circuit is included in the driving circuit of the PDP in order to recover energy generated unnecessarily in the panel.

1 is a view showing a conventional energy recovery circuit.

Referring to FIG. 1, the conventional energy recovery circuits 10 and 20 are symmetrically installed with each other with the panel capacitor Cp interposed therebetween. Here, the panel capacitor Cp equivalently represents the capacitance formed between the scan electrode Y and the sustain electrode Z. FIG. The first energy recovery circuit 10 supplies a sustain pulse to the scan electrode (Y). The second energy recovery circuit 20 supplies sustain pulses to the sustain electrodes Z while operating alternately with the first energy recovery circuit 10.

The configuration of the conventional energy recovery circuits 10 and 20 will be described with reference to the first energy recovery circuit 10. The first energy recovery circuit 10 includes the inductor L connected between the panel capacitor Cp and the sustain capacitor Cs, and the first and the first connected in parallel between the sustain capacitor Cs and the inductor L. Three switches S1 and S3 and second and fourth switches S2 and S4 connected in parallel between the panel capacitor Cp and the inductor L are provided.

The second switch S2 is connected to the sustain voltage source Vs, and the fourth switch S4 is connected to the ground voltage source GND. The sustain capacitor Cs recovers and charges the voltage charged to the panel capacitor Cp during the sustain discharge, and supplies the charged voltage to the panel capacitor Cp again. The sustain capacitor Cs is charged with a voltage of Vs / 2 corresponding to half of the sustain voltage source Vs. The inductor L forms a resonance circuit together with the panel capacitor Cp. The first to fourth switches S1 to S4 control the flow of current.

Meanwhile, the fifth and sixth diodes D5 and D6 disposed between the first and second switches S1 and S2 and the inductor L respectively prevent current from flowing in the reverse direction. In addition, the first to fourth diodes D1 to D4, which are internal diodes of the first to fourth switches S1 to S4, prevent current from flowing in the reverse direction.

2 is a timing diagram and waveform diagrams illustrating on / off timing of the first energy recovery circuit switches and an output waveform of the panel capacitor.

The operation process will be described in detail with the assumption that the panel capacitor Cp is charged with a voltage of 0 volts and the sustain capacitor Cs is charged with a voltage of Vs / 2 before the period T1.

In the T1 period, the first switch S1 is turned on to form a current path from the sustain capacitor Cs to the first switch S1, the inductor L, and the panel capacitor Cp. When the path is formed, the voltage of Vs / 2 charged in the sustain capacitor Cs is supplied to the panel capacitor Cp. At this time, since the inductor L and the panel capacitor Cp form a series resonant circuit, the panel capacitor Cp is charged with the voltage Vs which is twice the voltage of the sustain capacitor Cs.

In the T2 period, the second switch S2 is turned on. When the second switch S2 is turned on, the voltage of the sustain voltage source Vs is supplied to the scan electrode Y. The voltage of the sustain voltage source Vs supplied to the scan electrode Y prevents the voltage of the panel capacitor Cp from falling below the sustain voltage source Vs so that sustain discharge occurs normally. On the other hand, since the voltage of the panel capacitor Cp has risen to Vs in the period T1, the driving power supplied from the outside to cause the sustain discharge is minimized.

In the T3 period, the first switch S1 is turned off. At this time, the scan electrode Y of the panel capacitor Cp maintains the voltage of the sustain voltage source Vs for the period of T3.

In the T4 period, the second switch S2 is turned off and the third switch S3 is turned on. When the third switch S3 is turned on, a current path is formed from the panel capacitor Cp to the sustain capacitor Cs through the inductor L and the third switch S3 to form a panel capacitor ( The voltage charged in Cp) is recovered to the sustain capacitor Cs. At this time, the sustain capacitor Cs is charged with a voltage of Vs / 2.

In the T5 period, the third switch S3 is turned off and the fourth switch S4 is turned on. When the fourth switch S4 is turned on, a path is formed between the panel capacitor Cp and the base voltage source GND so that the voltage of the panel capacitor Cp drops to 0 volts. In the T6 period, the state of T5 is maintained for a certain time. In fact, the AC drive pulses supplied to the scan electrode Y and the sustain electrode Z are obtained by periodically repeating the periods T1 to T6.

Meanwhile, as shown in FIG. 4, the second energy recovery circuit 20 alternately operates with the first energy recovery circuit 10 to supply a driving voltage to the panel capacitor Cp. Therefore, as shown in FIG. 4, the sustain capacitor voltage Vs having opposite polarities are supplied to the panel capacitor Cp. As such, sustain pulse voltages Vs having opposite polarities are supplied to the panel capacitor Cp so that sustain discharge occurs in the discharge cells.

However, such a conventional energy recovery circuit uses many circuit components (switch elements, diodes, etc.) by manufacturing and operating each of the first and second energy recovery circuits 10 and 20 on different boards. There is a problem that the cost is increased.

Accordingly, an object of the present invention is to provide an energy recovery circuit that can reduce the number of components used and reduce the manufacturing cost of the plasma display panel by installing the energy recovery circuit on one board.
An object of the present invention is to provide an energy recovery circuit which can increase driving efficiency by preventing a current loss generated when a sustain voltage is charged to a panel capacitor using a single switch.
An object of the present invention is to provide an energy recovery circuit that can reduce the power consumed in the driving circuit by reducing the heat generated during the switching operation by using one switch.

In order to achieve the above object, the energy recovery circuit according to an embodiment of the present invention, the sustain voltage source, a panel capacitor equivalently formed in the discharge cell, and recovers the voltage charged in the panel capacitor and the recovered voltage A sustain path for resupplying to the panel capacitor, an inductor for forming a resonance circuit with the panel capacitor, and a first path between the inductor and the panel capacitor when a voltage of the sustain capacitor is supplied to one side of the panel capacitor. A first switch for forming a second switch, a second switch for forming a second path between the inductor and the panel capacitor when a voltage of the sustain capacitor is supplied to the other side of the panel capacitor, and a voltage of the sustain voltage source The first path and the second when it is supplied to the panel capacitor And a third switch for interrupting the current that leaks through to the.

The third switch of the energy recovery circuit according to an embodiment of the present invention is installed in series between the inductor and the sustain capacitor.

In the energy recovery circuit according to an embodiment of the present invention, the internal diodes of the third switch may be opposite to the internal diodes of the first switch and the second switch.

A method of driving an energy recovery circuit according to an embodiment of the present invention includes supplying a voltage of a sustain capacitor through a first path formed by a first switch to charge one side of a panel capacitor, and a second formed by a second switch. Supplying a voltage of the sustain capacitor through a path to charge the other side of the panel capacitor; and supplying a voltage of a sustain voltage source through the first and second paths to charge the panel capacitor, wherein the current leaks during charging. Blocking the using a third switch.
Other objects and features of the present invention in addition to the above objects will become apparent from the description of the embodiments with reference to the accompanying drawings.

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Hereinafter, exemplary embodiments of the present invention will be described with reference to FIGS. 4 to 17.

4 is a view showing an energy recovery circuit according to a first embodiment of the present invention.

Referring to FIG. 4, the energy recovery circuit according to the first embodiment of the present invention includes a power supply unit 22 for supplying a sustain voltage Vs and a panel capacitor Cp equivalently representing capacitance formed on the panel. And a charge / discharge unit 26 installed to be connected between the panel capacitor Cp and the power supply unit 22 and a panel capacitor Cp and the power supply unit 22 to supply voltage to the panel capacitor Cp. It has a path forming portion 28 to form a path so that it can be.

The power supply unit 22 is connected in series between the sustain voltage source Vs, the sustain voltage source Vs, and the base voltage source, so as to distribute the sustain voltage Vs to the half sustain voltage Vs / 2. And two sustain capacitors Cs1 and Cs2, and a seventh diode D7 connected between the sustain voltage source Vs and the first sustain capacitor Cs1. At this time, by setting the capacitance values of the first and second sustain capacitors Cs1 and Cs2 to be equal, the sustain voltage Vs is divided into two, so that the 1/2 sustain voltage Vs / 2 is applied to the second sustain capacitor Cs2. Keep it constant Here, the first sustain capacitor Cs1 divides the sustain voltage Vs so that the 1/2 sustain voltage Vs / 2 is maintained at the second sustain capacitor Cs2. The seventh diode D7 prevents current from flowing in the reverse direction.

The charge / discharge unit 26 includes an inductor L and a fifth switch S5 connected between the power supply unit 22 and the first node N1, and between the fourth node N4 and the second node N2. The 6th switch S6 connected to is provided. The inductor L and the fifth switch S5 have a half sustain voltage Vs / 2 charged in the second sustain capacitor Cs at the first node N1 which is the scan electrode Y of the panel capacitor Cp. ) Provides a charge path when the voltage is supplied, and provides a discharge path when the voltage charged to the first node N1, which is the scan electrode Y of the panel capacitor Cp, is supplied to the second sustain capacitor Cs2. . In addition, the inductor L and the sixth switch S6 have the 1/2 sustain voltage Vs charged in the second sustain capacitor Cs at the second node N2 which is the sustain electrode Z of the panel capacitor Cp. / 2) provides a charging path and when the voltage charged to the second node (N2), the sustain electrode (Z) of the panel capacitor (Cp) is supplied to the second sustain capacitor (Cs2) to provide.

The path forming unit 28 supplies the sustain voltage Vs and the ground voltage to the panel capacitor Cp. To this end, the path forming unit 28 includes the first switch S1 connected between the power supply unit 22 and the first node N1, which is the scan electrode Y of the panel capacitor, and the power supply unit 22 and the panel capacitor. A second switch S2 connected between the second node N2, which is the sustain electrode Z, and a third switch connected between the base voltage source and the first node N1, which is the scan electrode Y of the panel capacitor, S4) and a fourth switch S2 connected between the base voltage source and the second node N2, which is the sustain electrode Z of the panel capacitor. The sustain voltage Vs is supplied to the first node N1, which is the scan electrode Y of the panel capacitor Cp, by the first switch S1, and the sustain voltage Vs of the panel capacitor Cp is supplied by the second switch S2. The sustain voltage Vs is supplied to the second node N2 which is the sustain electrode Z. The ground voltage is supplied to the first node N1 which is the scan electrode Y of the panel capacitor Cp by the third switch S3, and the sustain electrode of the panel capacitor Cp is supplied by the fourth switch S2. The base voltage is supplied to the second node N2, which is Z). At this time, each of the first to fourth switches S1 to S4 is provided with internal diodes D1 to D4 for controlling the flow of current.

As described above, the energy recovery circuit according to the first embodiment of the present invention has the fifth switch S5 when the sustain voltage Vs is supplied to the first node N1 which is the scan electrode Y of the panel capacitor Cp. Due to the internal diode D5 of the first node N1, which is the scan electrode Y of the panel capacitor Cp, the internal diode D5 of the fifth switch S5, the inductor L and the third node N3. A current path leading to) is formed to cause a current loss from the first node N1 to the third node N3. In addition, the second node N2, which is the sustain electrode Z of the panel capacitor Cp, connected to the base voltage source, also has an internal diode D6, an inductor L, and a third node N3 of the sixth switch S5. A current path leading to) is formed to cause a current loss from the second node N2 to the third node N3. In order to solve this problem, an energy recovery circuit according to a second embodiment of the present invention as shown in FIG. 5 is proposed.

The energy recovery circuit according to the second embodiment of the present invention has a seventh switch S7 provided between the fourth node N4 and the fifth switch S5 as compared with the energy recovery circuit according to the first embodiment of the present invention. And, except for the eighth switch (S8) provided between the fourth node (N4) and the sixth switch (S6) has the same components and performs the same operation. Therefore, only the description of the seventh and eighth switches S7 and S8 will be briefly described.

The seventh switch S7 is an inductor L and a fifth switch from the first node N1 when the sustain voltage Vs is supplied to the first node N1 which is the scan electrode Y of the panel capacitor Cp. An internal diode D7 formed in a direction opposite to the internal diode D5 of the fifth switch S5 to prevent the formation of a first path leading to the S5, the seventh switch S7, and the third node N3. Has In addition, the eighth switch S8 is the inductor L, the sixth switch S6, the eighth switch S8, and the third node from the second node N2, which is the sustain electrode Z of the panel capacitor Cp. In order to prevent the formation of the second path leading to N3, the internal diode D8 is formed in the opposite direction to the internal diode D6 of the sixth switch S6.

As described above, the energy recovery circuit according to the second embodiment of the present invention has an advantage of reducing current loss generated when the sustain voltage Vs is charged to the panel capacitor Cp. There is a problem that the manufacturing cost increases because of use. In addition, the heat generated by the two additional switches adds additional power consumption. In order to solve this problem, an energy recovery circuit according to a third embodiment of the present invention as shown in FIG. 6 is proposed.

Referring to FIG. 6, the energy recovery circuit according to the third embodiment of the present invention includes a power supply unit 42 for supplying a sustain voltage Vs, and a panel capacitor Cp equivalently representing capacitance formed on the panel. And a charge / discharge unit 46 which is installed to be connected between the panel capacitor Cp and the power supply unit 42, and is connected between the panel capacitor Cp and the power supply unit 42 to maintain a sustain voltage (a) in the panel capacitor Cp. Vs) and a path forming portion 48 for forming a path so that the base voltage can be supplied.

The power supply unit 42 is connected in series between the sustain voltage source Vs, the sustain voltage source Vs, and the base voltage source, so as to distribute the sustain voltage Vs to the half sustain voltage Vs / 2. Two sustain capacitors Cs1 and Cs2, and an eighth diode D8 connected between the sustain voltage source Vs and the first sustain capacitor Cs1. At this time, by setting the capacitance values of the first and second sustain capacitors Cs1 and Cs2 to be equal, the sustain voltage Vs is divided into two, so that the 1/2 sustain voltage Vs / 2 is applied to the second sustain capacitor Cs2. The first sustain capacitor Cs1 serves to divide the sustain voltage Vs so that the 1/2 sustain voltage Vs / 2 is maintained at the second sustain capacitor Cs2. The eighth diode D8 prevents current from flowing in the reverse direction.

The charge / discharge unit 46 includes a seventh switch S7, an inductor L and a fifth switch S5 connected between the power supply 42 and the first node N1, and the fourth node N4. The sixth switch S6 connected between the second nodes N2 is provided. The seventh switch S7, the inductor L, and the fifth switch S5 have the 1/2 sustain voltage Vs / 2 charged in the second sustain capacitor Cs2 to be the scan electrode Y of the panel capacitor Cp. The charging path is provided when supplied to the first node N1, and the voltage charged to the first node N1, which is the scan electrode Y of the panel capacitor Cp, is supplied to the second sustain capacitor Cs2. Provide a discharge path. In addition, the seventh switch S7, the inductor L, and the sixth switch S6 have a half sustain voltage Vs / 2 charged in the second sustain capacitor Cs2 to maintain the electrode of the panel capacitor Cp. The charging path is provided when supplied to the second node N2, which is Z, and the voltage charged at the second node N2, which is the sustain electrode Z of the panel capacitor Cp, is applied to the second sustain capacitor Cs2. Provides a discharge path when supplied to The internal diode D7 of the seventh switch S7 has the scan electrode of the panel capacitor Cp when the sustain voltage Vs is supplied to the first node N1 which is the scan electrode Y of the panel capacitor Cp. A first path from the first node N1, which is Y), to the third node N3 via the fifth switch S5, the inductor L, and the seventh switch S7, and the panel capacitor Cp. Prevents formation of a second path from the second node N2, which is the sustain electrode Z, to the third node N3 via the sixth switch S5, the inductor L, and the seventh switch S7. To this end, the internal switches D5 and D6 of the fifth switch S5 and the sixth switch S6 are configured in opposite directions.

The path forming unit 48 supplies the sustain voltage Vs and the ground voltage to the panel capacitor Cp. To this end, the path forming unit 48 includes the first switch S1 connected between the power supply 42 and the first node N1, which is the scan electrode Y of the panel capacitor, and the power supply 42 and the panel capacitor. The second switch S2 connected between the second node N2 as the sustain electrode Z, and the third switch connected between the base voltage source and the first node N1 as the scan electrode Y of the panel capacitor. And a fourth switch S2 connected between the base voltage source and the second node N2, which is the sustain electrode Z of the panel capacitor. The sustain voltage Vs is supplied to the first node N1, which is the scan electrode Y of the panel capacitor Cp, by the first switch S1, and the sustain voltage Vs of the panel capacitor Cp is supplied by the second switch S2. The sustain voltage Vs is supplied to the second node N2 which is the sustain electrode Z. The ground voltage is supplied to the first node N1 which is the scan electrode Y of the panel capacitor Cp by the third switch S3, and the sustain electrode of the panel capacitor Cp is supplied by the fourth switch S2. The base voltage is supplied to the second node N2, which is Z). At this time, each of the first to fourth switches S1 to S4 is provided with internal diodes D1 to D4 for controlling the flow of current.

Here, the switches S1 to S7 use a semiconductor switch element, for example, implemented as a MOSFET element.

FIG. 7 is a view showing a driving waveform diagram of the energy recovery circuit shown in FIG. 6.

Here, the first node N1, which is the scan electrode Y of the panel capacitor Cp, is set to the positive polarity (+), and the second node N2, which is the sustain electrode Z of the panel capacitor Cp, is negative. The operation process will be described in detail with reference to FIGS. 8 to 17 by setting the polarity (−).

The T0 period is divided into first and second periods T01 and T02 according to the states of the switches. First, the fourth switch S4 is turned on while the third switch S3 is turned on during the first period T01. Accordingly, as illustrated in FIG. 8, a closed loop that leads to the third switch S3, the panel capacitor Cp, and the fourth switch S4 is formed. In this case, the panel capacitor Cp maintains the base voltage. The third, fifth and seventh switches S3, S5, and S7 are turned on during the second period T01. When the third, fifth and seventh switches S3, S5, and S7 are turned on, as illustrated in FIG. 9, the second sustain capacitor Cs2, the seventh switch S7, the inductor L, and the fifth switch are turned on. A closed loop is formed that leads to the fifth switch S5 and the third switch S3. At this time, a predetermined current (or voltage) is charged to the inductor L by the 1/2 sustain voltage Vs / 2 charged in the second sustain capacitor Cs2. Here, the period T1 is set until the inductor L is charged with a voltage (or current) corresponding to approximately the sustain voltage Vs.

In the T1 period, the fourth switch S4 is turned on while the fifth and seventh switches S5 and S7 remain turned on. At this time, the third switch S3 is turned off. Accordingly, as shown in FIG. 10, the second sustain capacitor Cs2, the seventh switch S7, the inductor L, the fifth switch S5, the panel capacitor Cp, and the fourth switch S4. A subsequent closed loop is formed. At this time, the reverse voltage is induced in the inductor L and the reverse voltage is supplied to the first node N1 which is the scan electrode Y of the panel capacitor Cp, and the panel capacitor Cp is inverted of the inductor L. Quickly charges (boosts up) by energy.

In the T2 period, the first switch S1 is turned on while the fourth switch S4 is kept turned on. At this time, the fifth and seventh switches S5 and S7 are turned off. Accordingly, as illustrated in FIG. 11, a closed loop that leads to the sustain voltage source Vs, the eighth diode D8, the first switch S1, the panel capacitor Cp, and the fourth switch S4 is formed. When the sustain voltage Vs is supplied to the first node N1 which is the scan electrode Y of the panel capacitor Cp via the first switch S1, the panel capacitor Cp maintains the sustain voltage Vs. Cause sustain discharge. In this case, the panel capacitor Cp is charged with a positive sustain voltage as shown in FIG. 4. In this case, since the internal diodes D5 and D7 of the fifth and seventh switches S5 and S7 are configured in opposite directions, the first and second current paths may be prevented from being formed.

In the T3 period, the fourth switch S4 is turned on while the fifth and seventh switches S5 and S7 are turned on. At this time, the first switch S1 is turned off. Accordingly, as shown in FIG. 12, the fourth switch S4, the panel capacitor Cp, the fifth switch S5, the inductor L, the seventh switch S7, and the second sustain capacitor Cs2 are provided. A subsequent closed loop is formed. When the closed loop is formed, the voltage charged in the panel capacitor Cp is discharged to the second sustain capacitor Cs2 through the first current path. At this time, the inductor L is charged with a predetermined current (or voltage) by the voltage (or current) discharged from the panel capacitor Cp as shown in FIG. 7.

The T4 period is divided into first and second sections T41 and T42 according to the states of the switches. First, the third switch S3 is turned on while the fourth switch S4 is turned on during the first period T41. At this time, the fifth and seventh switches S5 and S7 are turned off. Accordingly, as shown in FIG. 13, a closed loop that leads to the fourth switch S4, the panel capacitor Cp, and the third switch S3 is formed. At this time, the panel capacitor Cp maintains the base potential. During the second period T42, the fourth switch S4 is turned on while the sixth and seventh switches S6 and S7 are turned on. At this time, the third switch S3 is turned off. Accordingly, as shown in FIG. 14, a closed loop is formed that leads to the second sustain capacitor Cs2, the seventh switch S7, the inductor L, the sixth switch S6, and the fourth switch S4. . At this time, a predetermined current (or voltage) is charged to the inductor L by the 1/2 sustain voltage Vs / 2 charged in the second sustain capacitor Cs2. Here, the period T6 is set until the inductor L is charged with a voltage (or current) corresponding to approximately the sustain voltage Vs.

In the T5 period, the third switch S3 is turned on while the sixth and seventh switches S6 and S7 remain turned on. At this time, the fourth switch S4 is turned off. Accordingly, as shown in FIG. 15, the second sustain capacitor Cs2, the seventh switch S7, the inductor L, the sixth switch S6, the panel capacitor Cp, and the third switch S3 are connected to each other. A subsequent closed loop is formed. At this time, a reverse voltage is induced in the inductor L and the reverse voltage is supplied to the second node N2, which is the sustain electrode Z of the panel capacitor Cp, and the panel capacitor Cp is inverted of the inductor L. Quickly charges (boosts up) by energy.

In the T6 period, the second switch S2 is turned on while the third switch S3 is turned on. At this time, the sixth and seventh switches S6 and S7 are turned off. As a result, as shown in FIG. 16, a closed loop is formed that leads to the sustain voltage source Vs, the eighth diode D8, the second switch S2, the panel capacitor Cp, and the third switch S3. When the sustain voltage Vs is supplied to the second node N2, which is the sustain electrode Z of the panel capacitor Cp, via the second switch S2, the panel capacitor Cp maintains the sustain voltage Vs. Cause sustain discharge. At this time, the panel capacitor Cp is charged with a negative sustain voltage as shown in FIG. 7. In this case, since the internal diodes D5 and D6 of the fifth and sixth switches S5 and S6 and the internal diode D7 of the seventh switch S7 are configured in opposite directions as in the T3 period, It is possible to prevent the first and second current paths from being formed.

In the T7 period, the sixth and seventh switches S6 and S7 are turned on while the third switch S3 is turned on. At this time, the second switch S2 is turned off. Accordingly, as shown in FIG. 17, the third switch S3, the panel capacitor Cp, the sixth switch S6, the inductor L, the seventh switch S7, and the second sustain capacitor Cs2. A subsequent closed loop is formed. When the closed loop is formed, the voltage charged in the panel capacitor Cp is discharged to the second sustain capacitor Cs2 through the second current path. At this time, the inductor L is charged with a predetermined current (or voltage) by the voltage (or current) discharged from the panel capacitor Cp. In the energy recovery circuit shown in FIG. 6, the panel capacitor Cp is charged / discharged while repeating the periods of T0 to T7.

As described above, the energy recovery circuit according to the embodiment of the present invention can reduce the manufacturing cost by integrating into one board and reducing the number of parts used. In addition, current loss generated when the sustain voltage is charged to the panel capacitor can be prevented by using a single switch, thereby increasing driving efficiency. In addition, by using one switch, heat generated during the switching operation may be reduced to reduce power consumption of the driving circuit.

Those skilled in the art will appreciate that various changes and modifications can be made without departing from the technical spirit of the present invention. Therefore, the technical scope of the present invention should not be limited to the contents described in the detailed description of the specification but should be defined by the claims.

Claims (4)

With a sustain voltage source, A panel capacitor equivalently formed in the discharge cell, A sustain capacitor for recovering the voltage charged in the panel capacitor and resupplying the recovered voltage to the panel capacitor; An inductor for forming a resonance circuit with the panel capacitor; A first switch for forming a first path between the inductor and the panel capacitor when the voltage of the sustain capacitor is supplied to one side of the panel capacitor; A second switch for forming a second path between the inductor and the panel capacitor when the voltage of the sustain capacitor is supplied to the other side of the panel capacitor; And a third switch for blocking current leaking through the first path and the second path when the voltage of the sustain voltage source is supplied to the panel capacitor. The method of claim 1, And the third switch is installed in series between the inductor and the sustain capacitor. The method of claim 1, And the internal diodes of the third switch are opposite to the internal diodes of the first switch and the second switch. Charging one side of the panel capacitor by supplying a voltage of the sustain capacitor through a first path formed by the first switch; Charging the other side of the panel capacitor by supplying a voltage of the sustain capacitor through a second path formed by a second switch; And supplying a voltage of a sustain voltage source through the first and second paths to charge the panel capacitor, and blocking current leaked during charging by using a third switch.

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