KR100570886B1 - A video muting method of A/V system - Google Patents
A video muting method of A/V system Download PDFInfo
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- KR100570886B1 KR100570886B1 KR1019990022390A KR19990022390A KR100570886B1 KR 100570886 B1 KR100570886 B1 KR 100570886B1 KR 1019990022390 A KR1019990022390 A KR 1019990022390A KR 19990022390 A KR19990022390 A KR 19990022390A KR 100570886 B1 KR100570886 B1 KR 100570886B1
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- video
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- mute
- muting
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- G—PHYSICS
- G11—INFORMATION STORAGE
- G11B—INFORMATION STORAGE BASED ON RELATIVE MOVEMENT BETWEEN RECORD CARRIER AND TRANSDUCER
- G11B20/00—Signal processing not specific to the method of recording or reproducing; Circuits therefor
- G11B20/10—Digital recording or reproducing
- G11B20/10527—Audio or video recording; Data buffering arrangements
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- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04N—PICTORIAL COMMUNICATION, e.g. TELEVISION
- H04N21/00—Selective content distribution, e.g. interactive television or video on demand [VOD]
- H04N21/40—Client devices specifically adapted for the reception of or interaction with content, e.g. set-top-box [STB]; Operations thereof
- H04N21/45—Management operations performed by the client for facilitating the reception of or the interaction with the content or administrating data related to the end-user or to the client device itself, e.g. learning user preferences for recommending movies, resolving scheduling conflicts
- H04N21/454—Content or additional data filtering, e.g. blocking advertisements
- H04N21/4542—Blocking scenes or portions of the received content, e.g. censoring scenes
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- G—PHYSICS
- G11—INFORMATION STORAGE
- G11B—INFORMATION STORAGE BASED ON RELATIVE MOVEMENT BETWEEN RECORD CARRIER AND TRANSDUCER
- G11B20/00—Signal processing not specific to the method of recording or reproducing; Circuits therefor
- G11B20/10—Digital recording or reproducing
- G11B20/10527—Audio or video recording; Data buffering arrangements
- G11B2020/10537—Audio or video recording
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- Engineering & Computer Science (AREA)
- Multimedia (AREA)
- Signal Processing (AREA)
- Databases & Information Systems (AREA)
- Controls And Circuits For Display Device (AREA)
- Picture Signal Circuits (AREA)
Abstract
비디오 뮤트 제어신호를 인식하는 과정과, 비디오 컨트롤러에 내장된 레지스터의 비트값을 변경하는 과정을 포함하는 자동차의 A/V 시스템의 비디오 뮤팅방법.A video muting method for an A / V system of a vehicle, comprising: recognizing a video mute control signal and changing a bit value of a register embedded in a video controller.
비디오, 뮤트, 레지스터Video, mute, register
Description
도 1은 종래 기술에 따른 비디오 뮤팅 신호 처리를 위한 회로의 구성도,1 is a configuration diagram of a circuit for video muting signal processing according to the prior art;
도 2는 본 발명의 일 실시에 따른 비디오 뮤팅방법을 나타내는 흐름도이다.2 is a flowchart illustrating a video muting method according to an embodiment of the present invention.
도 3은 본 발명의 다른 실시에 따른 비디오 뮤팅방법을 나타내는 흐름도이다.3 is a flowchart illustrating a video muting method according to another embodiment of the present invention.
본 발명은 자동차의 A/V 시스템에 적용되는 기술로서, 보다 상세하게는 비디오 뮤팅신호에 따라 화상을 뮤팅시키는 방법에 관한 것이다.BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention is a technique applied to A / V systems of automobiles, and more particularly, to a method of muting an image according to a video muting signal.
자동차 A/V 시스템에서 운전석에 구비된 프론트(Front) 모니터의 뮤팅제어는 VDP(Video Display Processor)에서 제어하고, 백시트(Back Seat)에 구비된 레어(Rear)모니터의 뮤팅제어는 메인(Main) 마이컴에서 제어하였다. 따라서, 비디오 뮤팅신호에 타이밍 문제가 발생하고 있다.In car A / V system, muting control of front monitor provided in driver's seat is controlled by VDP (Video Display Processor), and muting control of rear monitor provided in back seat is main. ) Controlled by the microcomputer. Therefore, a timing problem occurs in the video muting signal.
또한, 비디오 뮤팅을 제어하기 위하여 2개의 포트(Port)를 할당해야만 했다. 즉, 도 1에서 보는 바와 같이 노아게이트(U1)에 인가되는 두 개의 입력신호(S1, S2)의 조합에 따라 뮤팅신호가 출력되도록 구성하였으며, 각 입력신호와 출력신호의 상관관계는 [표 1]과 같다.In addition, two ports had to be allocated to control video muting. That is, as shown in FIG. 1, a muting signal is output according to a combination of two input signals S1 and S2 applied to the noah gate U1. The correlation between each input signal and the output signal is shown in [Table 1]. ] Is the same.
본 발명은 소프트웨어적인 방법으로 비디오 뮤팅시키는 것을 목적으로 한다.The present invention aims at video muting in a software way.
본 발명의 다른 목적은 비디오 뮤팅을 위한 별도의 포트의 설정을 제거하는 것이다.Another object of the present invention is to eliminate the configuration of a separate port for video muting.
위와 같은 목적을 달성하기 위한 본 발명의 특징은 비디오 뮤트 제어신호를 인식하는 과정과, 비디오 컨트롤러에 내장된 레지스터의 비트값을 변경하는 과정을 포함하는 것을 특징으로 한다.A feature of the present invention for achieving the above object is characterized in that it comprises a process of recognizing the video mute control signal, and changing the bit value of the register embedded in the video controller.
이러한 발명의 세부적 특징은 상기 레지스터의 비트값 변경과정이 뮤트 온 신호가 입력될 때, BME 비트값을 디스에이블(Disable)시키는 과정과, 뮤트 오프 신호가 입력될 때, BME 비트값을 인에이블(Enable)시키는 과정으로 이루어지는 점이다.The detailed feature of the present invention is that the process of changing the bit value of the register disables the BME bit value when the mute on signal is input, and enables the BME bit value when the mute off signal is input. Enable).
본 발명의 다른 특징은 비디오 뮤트 제어신호를 인식하는 과정과, 비디오 메모리 영역에 저장된 블랙이미지의 디스플레이 좌표를 변경하는 과정으로 이루어 지는 것이다. Another feature of the present invention is a process of recognizing the video mute control signal, and the process of changing the display coordinates of the black image stored in the video memory area.
본 발명의 또 다른 세부적 특징은 상기 디스플레이 좌표 변경과정이 뮤트 온 신호가 입력될 때, 비디오 메모리영역에 저장된 블랙이미지의 좌표를 디스플레이 영역으로 설정하는 과정과, 뮤트 오프 신호가 입력될 때, 좌표값 설정 레지스터의 비트값을 복원시키는 과정으로 구성됨에 있다.
Another detailed feature of the present invention is a process of changing the display coordinates, when a mute on signal is input, setting a coordinate of a black image stored in a video memory area as a display area, and when a mute off signal is input, a coordinate value It consists of restoring the bit value of the setting register.
이하 첨부된 도면을 참조로하여 본 발명의 구성 및 그 동작과정을 살펴보기로 한다. 도 2는 본 발명의 일 실시에 따른 비디오 뮤팅방법의 진행과정을 나타내는 흐름도이다. 비디오 뮤팅 신호를 인식(S21 과정)하게 되면, 비디오 컨트롤러에 내장된 레지스터의 BME 비트 값을 클리어시킨다(S22 과정). 비디오 뮤팅을 위해 설정된 시간에 이를 때까지(S23 과정) 카운터를 증가시킨다 (S24 과정). 비디오 뮤팅설정시간이 경과되면 레지스터의 BME 비트값을 인에이블(Enable) 상태로 복귀시키므로써 비디오 뮤트를 해지하는 과정(S25 과정)으로 진행된다.Hereinafter, the configuration and operation of the present invention will be described with reference to the accompanying drawings. 2 is a flowchart illustrating a process of a video muting method according to an embodiment of the present invention. When the video muting signal is recognized (S21), the BME bit value of the register embedded in the video controller is cleared (S22). The counter is incremented until the time set for video muting is reached (step S23). When the video muting setup time elapses, the video muting is terminated by returning the register BME bit value to the enabled state (S25 process).
도 3은 본 발명의 다른 실시에 따른 비디오 뮤팅방법의 진행과정을 나타내는 흐름도이다. 비디오 뮤팅 신호를 인식(S31 과정)하게 되면, 별도의 비디오 램에 저장되어 있는 블랙이미지 데이터를 읽어들여 디스플레이 영역의 좌표값에 디스플레이 시킨다.(S32 과정). 비디오 뮤팅을 위해 설정된 시간에 이를 때까지(S33 과정) 카운터를 증가시킨다 (S34 과정). 비디오 뮤팅설정시간이 경과되면 디스플레이 좌표값을 원래값으로 복원시켜 비디오 뮤트를 해지하는 과정(S35 과정)으로 진행된다.3 is a flowchart illustrating a process of a video muting method according to another embodiment of the present invention. When the video muting signal is recognized (S31), the black image data stored in the separate video RAM is read and displayed on the coordinate value of the display area (S32). The counter is incremented until the time set for video muting is reached (step S33). When the video muting setup time elapses, the process proceeds to a process of canceling video muting by restoring the display coordinate value to the original value (step S35).
이상에서 설명한 바와 같이, 본 발명은 별도의 포트를 구성하지 않고 소프트웨어적인 방법으로 비디오 뮤팅과정을 수행하므로써 비디오 뮤팅 타이밍이 어긋나는 것을 해결할 수 있다. As described above, the present invention can solve a video muting timing deviation by performing a video muting process by a software method without configuring a separate port.
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KR1019990022390A KR100570886B1 (en) | 1999-06-15 | 1999-06-15 | A video muting method of A/V system |
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Citations (5)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
KR900001400U (en) * | 1988-06-02 | 1990-01-18 | 삼성전자 주식회사 | Video program mode mute circuit |
KR950025692A (en) * | 1994-02-28 | 1995-09-18 | 배순훈 | Video Mute Circuit on Monitor |
JPH09180295A (en) * | 1995-12-28 | 1997-07-11 | Sony Corp | Recording device and controlling method |
KR970063097A (en) * | 1996-02-13 | 1997-09-12 | 구자홍 | Video / audio muting device of SVR (SVR) |
KR19980060785U (en) * | 1997-03-17 | 1998-11-05 | 배순훈 | VSI system with video muting |
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1999
- 1999-06-15 KR KR1019990022390A patent/KR100570886B1/en not_active IP Right Cessation
Patent Citations (5)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
KR900001400U (en) * | 1988-06-02 | 1990-01-18 | 삼성전자 주식회사 | Video program mode mute circuit |
KR950025692A (en) * | 1994-02-28 | 1995-09-18 | 배순훈 | Video Mute Circuit on Monitor |
JPH09180295A (en) * | 1995-12-28 | 1997-07-11 | Sony Corp | Recording device and controlling method |
KR970063097A (en) * | 1996-02-13 | 1997-09-12 | 구자홍 | Video / audio muting device of SVR (SVR) |
KR19980060785U (en) * | 1997-03-17 | 1998-11-05 | 배순훈 | VSI system with video muting |
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