KR100557565B1 - A method for manufacturing of a semiconductor device - Google Patents

A method for manufacturing of a semiconductor device Download PDF

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KR100557565B1
KR100557565B1 KR1019990066310A KR19990066310A KR100557565B1 KR 100557565 B1 KR100557565 B1 KR 100557565B1 KR 1019990066310 A KR1019990066310 A KR 1019990066310A KR 19990066310 A KR19990066310 A KR 19990066310A KR 100557565 B1 KR100557565 B1 KR 100557565B1
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insulating film
film
semiconductor device
forming
conductor
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KR1019990066310A
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KR20010058934A (en
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이현우
손동주
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주식회사 하이닉스반도체
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    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00—Details of semiconductor or other solid state devices
    • H01L23/552—Protection against radiation, e.g. light or electromagnetic waves
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/70—Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
    • H01L21/71—Manufacture of specific parts of devices defined in group H01L21/70
    • H01L21/768—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics
    • H01L21/76801—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics characterised by the formation and the after-treatment of the dielectrics, e.g. smoothing
    • H01L21/76829—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics characterised by the formation and the after-treatment of the dielectrics, e.g. smoothing characterised by the formation of thin functional dielectric layers, e.g. dielectric etch-stop, barrier, capping or liner layers
    • H01L21/76834—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics characterised by the formation and the after-treatment of the dielectrics, e.g. smoothing characterised by the formation of thin functional dielectric layers, e.g. dielectric etch-stop, barrier, capping or liner layers formation of thin insulating films on the sidewalls or on top of conductors
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/02104—Forming layers
    • H01L21/02107—Forming insulating materials on a substrate
    • H01L21/02225—Forming insulating materials on a substrate characterised by the process for the formation of the insulating layer
    • H01L21/0226—Forming insulating materials on a substrate characterised by the process for the formation of the insulating layer formation by a deposition process
    • H01L21/02282—Forming insulating materials on a substrate characterised by the process for the formation of the insulating layer formation by a deposition process liquid deposition, e.g. spin-coating, sol-gel techniques, spray coating
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00—Details of semiconductor or other solid state devices
    • H01L23/52—Arrangements for conducting electric current within the device in operation from one component to another, i.e. interconnections, e.g. wires, lead frames
    • H01L23/522—Arrangements for conducting electric current within the device in operation from one component to another, i.e. interconnections, e.g. wires, lead frames including external interconnections consisting of a multilayer structure of conductive and insulating layers inseparably formed on the semiconductor body
    • H01L23/532—Arrangements for conducting electric current within the device in operation from one component to another, i.e. interconnections, e.g. wires, lead frames including external interconnections consisting of a multilayer structure of conductive and insulating layers inseparably formed on the semiconductor body characterised by the materials
    • H01L23/53204—Conductive materials
    • H01L23/53209—Conductive materials based on metals, e.g. alloys, metal silicides

Abstract

본 발명은 반도체소자의 제조방법에 관한 것으로, 소정의 구조물이 형성된 제1절연막을 반도체기판 상부에 형성하고 상기 반도체기판 상부에 제2절연막으로 절연된 패드를 형성한 다음, 상기 전체표면상부에 도전체 및 제3절연막을 적층하는 형성하되, 상기 도전체와 상기 제1절연막 내의 가아드링과 접속시켜 형성하고 상기 패드 및 상기 가아드링을 노출시키는 마스크를 이용하여 상기 도전체 및 제3절연막을 패터닝함으로써 보호막을 형성한 다음, 상기 보호막 및 가아드링의 외부에 제4절연막 스페이서를 형성하여 상기 보호막의 절연특성을 향상시키는 공정으로 외부의 전자파로 부터 반도체소자를 보호하여 반도체소자의 특성 열화를 방지하고 그에 따른 반도체소자의 특성 및 신뢰성을 향상시킬 수 있는 기술이다. BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a method for manufacturing a semiconductor device, wherein a first insulating film having a predetermined structure is formed on a semiconductor substrate, a pad insulated with a second insulating film is formed on the semiconductor substrate, and then conductive is formed on the entire surface. Forming a sieve and a third insulating film, wherein the conductor and the third insulating film are patterned by using a mask for connecting the conductor and the guard ring in the first insulating film and exposing the pad and the guard ring. After forming a passivation layer, a fourth insulating layer spacer is formed outside the passivation layer and the guard ring to improve insulation characteristics of the passivation layer, thereby protecting the semiconductor element from external electromagnetic waves to prevent deterioration of characteristics of the semiconductor element. This is a technology that can improve the characteristics and reliability of the semiconductor device.

Description

반도체소자의 제조방법{A method for manufacturing of a semiconductor device}A method for manufacturing of a semiconductor device

도 1 는 종래기술에 따른 반도체소자의 제조방법을 도시한 단면도.1 is a cross-sectional view showing a method for manufacturing a semiconductor device according to the prior art.

도 2 는 본 발명의 원리를 도시한 개략도.2 is a schematic diagram illustrating the principles of the present invention.

도 3a 내지 도 3c 는 본 발명의 실시예에 따른 반도체소자의 제조방법을 도시한 단면도.3A to 3C are cross-sectional views illustrating a method of manufacturing a semiconductor device in accordance with an embodiment of the present invention.

도 4 는 본 발명에 따라 형성된 반도체소자의 전자파 흐름을 도시한 단면도.4 is a cross-sectional view showing the electromagnetic wave flow of the semiconductor device formed in accordance with the present invention.

<도면의 주요부분에 대한 부호 설명><Description of Signs of Major Parts of Drawings>

11,31,41 : 반도체기판 13,33,43 : 트랜지스터11,31,41: semiconductor substrate 13,33,43: transistor

15,45 : 제1절연막 17,47 : 가아드링 15,45: first insulating film 17,47: guard ring

19,49 : 패드 21,51 : 제2절연막 19, 49: pad 21, 51: second insulating film

53 : 도전체 55 : 제3절연막 53: conductor 55: third insulating film

57 : 제4절연막 57: fourth insulating film

본 발명은 반도체소자의 제조방법에 관한 것으로, 특히 외부의 전자파장애 ( electro magnetic interference, 이하에서 EMI 라 함 ) 특성을 향상시켜 반도체소자의 오동작을 방지하는 기술에 관한 것이다.BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a method for manufacturing a semiconductor device, and more particularly, to a technology for preventing malfunction of a semiconductor device by improving an external electromagnetic interference (hereinafter referred to as EMI) characteristic.

현재 EMI 에 대한 문제가 대두되고 있다. At present, EMI problems are on the rise.

상기 EMI 는, 외부에서 전자파를 발생하고 있는 것으로 부터 전자기학적으로 장애를 받게 되는 것을 말한다.The EMI refers to electromagnetic interference caused by external electromagnetic waves.

현재 우리는 전자파의 공간에 살고 있다. 상기 전자파는 방송국에서 나오는 각종장치와 같은 무선통신장비 등으로 부터 인한 것과, 전기배선을 통하여 들어오는 간섭으로 인한 것으로 크게 두가지로 나누고 있다. Currently we live in the space of electromagnetic waves. The electromagnetic waves are largely classified into two types due to radio communication equipment such as various devices coming from broadcasting stations, and due to interference coming through electrical wiring.

그리고 최근 관심을 받고 있는 자동차의 급발진과 같은 것이 전자파 장애로 부터 오는 것으로 연구결과가 발표되고 있다. 그리고 병원에서 휴대폰의 사용이 금지된 것도 이런 전자파 문제이며 항공기와 같은 정밀전자장치가 있는 곳 또한 휴대폰이 이러한 문제로 사용이 금지되고 있다. In addition, research results are reported to be coming from electromagnetic interference, such as the rapid start-up of automobiles that are recently attracting attention. In addition, the use of mobile phones in hospitals is also a problem of electromagnetic waves, and where there are precision electronic devices such as aircrafts, mobile phones are also prohibited from using these problems.

이렇듯이 우리들에게 전자파의 장애에 대한 문제가 깊숙히 파고들고 있으나 집적회로의 제작에 있어서는 현재 아무런 장치를 만들고 있지 않는 상태이다. As such, we are deeply into the problem of electromagnetic interference, but we are not making any devices in the manufacture of integrated circuits.

상기한 바와같이 종래에는 반도체소자에 EMI 를 방지하기 위한 별도의 처리공정이나 장치가 거의 없는 상태로서, EMI 에 대한 보호가 어려운 문제점이 있다. As described above, there is almost no separate processing process or device for preventing EMI in a semiconductor device, and there is a problem in that protection against EMI is difficult.

도 1 은 종래기술에 따른 형성된 반도체소자를 도시한 단면도로서, 외부의 전자파로 인하여 반도체소자를 오동작 시키는 경우를 도시한 것이다. 1 is a cross-sectional view illustrating a semiconductor device formed according to the prior art, and illustrates a case in which a semiconductor device is malfunctioned due to external electromagnetic waves.

먼저, 반도체기판(11) 상부에 트랜지스터(13)를 형성하고 후속공정으로 그 상부에 비트라인, 캐패시터, 금속배선 및 가아드링(17) 등의 구조물이 형성된 제1절연막(15)을 형성한다.First, a transistor 13 is formed on the semiconductor substrate 11, and a first insulating layer 15 having a structure such as a bit line, a capacitor, a metal wiring, and a guard ring 17 is formed on the semiconductor substrate 11.

그리고, 상기 반도체소자를 동작시키기 위하여 외부와 연결하기 위한 패드(19)를 형성한다. In addition, a pad 19 for connecting to the outside is formed to operate the semiconductor device.

이때, 상기 패드(19)와 패드(19) 사이는 제2절연막(21)으로 절연되어 형성된다.At this time, the pad 19 and the pad 19 are insulated from the second insulating film 21.

그리고, 반도체소자의 제조후 외부로 부터 전자파가 침투하여 상기 트랜지스터(13)를 오동작시킴으로써 반도체소자의 특성 및 신뢰성을 저하시킬 수 있는 문제점이 있다. In addition, after fabrication of the semiconductor device, electromagnetic waves penetrate from outside and malfunction of the transistor 13, thereby degrading characteristics and reliability of the semiconductor device.

본 발명은 상기한 종래기술의 문제점을 해결하기 위하여, 패드가 형성되지않는 영역에 도전체와 절연막의 적층구조로 보호막을 형성하되, 가아드링과 연결시켜 형성하여 외부의 전자파가 이들을 통하여 접지시킬 수 있도록 형성함으로써 반도체소자의 동작특성을 향상시키며 반도체소자의 신뢰성을 향상시킬 수 있는 반도체소자의 제조방법을 제공하는데 그 목적이 있다. In order to solve the above problems of the prior art, a protective film is formed in a laminated structure of a conductor and an insulating film in a region where a pad is not formed, and is formed by connecting to a guard ring to allow external electromagnetic waves to ground through them. It is an object of the present invention to provide a method for manufacturing a semiconductor device that can improve the operation characteristics of the semiconductor device and improve the reliability of the semiconductor device.

이상의 목적을 달성하기 위하여 본 발명에 따른 반도체소자의 제조방법은,
소정의 구조물이 형성된 제1절연막을 반도체기판 상부에 형성하는 공정과,
상기 제1절연막 상부에 패드를 형성하고 그 사이에 제2절연막을 형성하는 공정과,
전체표면상부에 도전체 및 제3절연막을 적층하는 형성하되, 상기 도전체와 상기 제1절연막 내의 가아드링을 접속시키는 공정과,
소정 부분의 상기 패드를 노출시키도록 상기 도전체 및 제3절연막 적층구조로 패터닝된 보호막을 형성하는 공정과,In order to achieve the above object, a method of manufacturing a semiconductor device according to the present invention,
Forming a first insulating film having a predetermined structure on the semiconductor substrate;
Forming a pad over the first insulating film and forming a second insulating film therebetween;
Forming a conductor and a third insulating film over the entire surface, and connecting the conductor and the guard ring in the first insulating film;
Forming a protective film patterned with the conductor and the third insulating film stack structure to expose the pad of a predetermined portion;

상기 보호막 및 가아드링의 외부에 제4절연막 스페이서를 형성하여 상기 보호막의 절연특성을 향상시키는 공정을 포함하는 것을 특징으로 한다. And forming a fourth insulating film spacer outside the protective film and the guard ring to improve the insulating property of the protective film.

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한편, 이상의 목적을 달성하기 위한 본 발명의 원리는 다음과 같다.On the other hand, the principle of the present invention for achieving the above object is as follows.

본 발명은 집적회로의 제작에 있어서 EMI 를 방지하기 위하여 보호막을 형성하고 이를 가아드링과 연결하여 접지시킴으로써 전자파로 인한 특성 열화를 사전에 방지하는 것이다. The present invention is to prevent the deterioration of characteristics due to electromagnetic waves by forming a protective film in order to prevent EMI in the manufacture of integrated circuits and connecting it with the guard ring to ground.

도 2 는 본 발명의 원리를 도시한 개략도로서, 전자파가 입사하는 방향의 반도체소자(31) 외측에 보호막(33)을 형성하고 이를 반도체소자와 연결시키고 이들을 접지시킨 것을 도시한다.FIG. 2 is a schematic diagram showing the principle of the present invention, showing that the protective film 33 is formed outside the semiconductor element 31 in the direction in which electromagnetic waves are incident, connected to the semiconductor element, and grounded.

이하, 첨부된 도면을 참고로 하여 본 발명을 상세히 설명하기로 한다.Hereinafter, the present invention will be described in detail with reference to the accompanying drawings.

도 3a 내지 도 3c 는 본 발명의 실시예에 따른 반도체소자의 제조방법을 도시한 단면도이다. 3A to 3C are cross-sectional views illustrating a method of manufacturing a semiconductor device in accordance with an embodiment of the present invention.

먼저, 반도체기판(41) 상부에 트랜지스터(43), 비트라인, 캐패시터, 금속배선 및 가아드링(47) 등이 형성된 제1절연막(45)을 형성한다. First, a first insulating layer 45 having a transistor 43, a bit line, a capacitor, a metal wiring, a guard ring 47, and the like is formed on the semiconductor substrate 41.

그리고, 상기 반도체소자를 동작시키기 위하여 외부와 연결하기 위한 패드(49)를 형성한다.
이때, 상기 패드(49)와 패드(49) 사이는 제2절연막(51)으로 절연되어 형성된다.In addition, a pad 49 for connecting to the outside is formed to operate the semiconductor device.
In this case, the pad 49 and the pad 49 are insulated from each other by the second insulating layer 51.

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여기서, 상기 제2절연막(51)은 산화막, 질화막, 산화질화막 또는 에스.오.지. ( spin on glass, 이하에서 SOG 라 함 ) 로 형성한다. The second insulating layer 51 may be an oxide film, a nitride film, an oxynitride film, or an S.O. (spin on glass, hereinafter referred to as SOG).

그 다음, 전체표면상부에 도전체(53)와 제3절연막(55)을 각각 일정두께 형성한다.Then, a conductor 53 and a third insulating film 55 are formed on the entire surface at a constant thickness, respectively.

이때, 상기 제3절연막(55)은 산화막, 질화막, 산화질화막 또는 SOG 로 형성한다.(도 3a)At this time, the third insulating film 55 is formed of an oxide film, a nitride film, an oxynitride film, or SOG (FIG. 3A).

그 다음, 사진식각공정으로 소정부분의 상기 패드(49)를 노출시키도록 상기 제3절연막(55)과 도전체(53)를 패터닝하여 적층구조의 보호막을 형성한다.
이때, 상기 가아드링(47) 부분은 그 상부에 구비되는 상기 패드(49)를 통하여 상기 도전체(53)에 접속된 형태로 구비된다.(도 3b)Next, the third insulating layer 55 and the conductor 53 are patterned to expose the pad 49 at a predetermined portion by a photolithography process to form a protective film having a laminated structure.
At this time, the guard ring 47 portion is provided in the form of being connected to the conductor 53 through the pad 49 provided on the upper portion thereof (FIG. 3B).

그리고, 전체표면상부에 제4절연막(57)을 일정두께 형성하고 이를 이방성식각하여 상기 도전체(53)와 가아드링(47)의 측벽에 제4절연막(57) 스페이서를 형성한다. A fourth insulating film 57 is formed on the entire surface and anisotropically etched to form a fourth insulating film 57 spacer on the sidewalls of the conductor 53 and the guard ring 47.

이때, 상기 제4절연막(57)은 산화막, 질화막, 산화질화막 또는 SOG 로 형성한다. (도 3c)In this case, the fourth insulating layer 57 is formed of an oxide film, a nitride film, an oxynitride film, or SOG. (FIG. 3C)

도 4 는 상기 도 3 의 공정으로 형성된 반도체소자에 외부의 전자파가 침투하는 경우를 도시한 단면도로서, 상기 전자파가 상기 보호막(53,55) 및 가아드링(47)을 통하여 접지된 반도체기판(41)을 통하여 소멸됨을 도시한다.FIG. 4 is a cross-sectional view illustrating external electromagnetic waves penetrating into the semiconductor device formed by the process of FIG. 3, wherein the electromagnetic substrates are grounded through the passivation layers 53 and 55 and the guard ring 47. Extinction through).

이상에서 설명한 바와 같이 본 발명에 따른 반도체소자의 제조방법은, 반도체소자 상부에서 패드가 형성되지않는 영역 상측에 보호막을 형성하되, 가아드링과 연결되도록 형성하여 외부의 전자파 침투시 이를 접지된 반도체기판을 통하여 소멸시킬 수 있는 통로를 형성함으로써 전자파에 안정된 특성을 갖는 소자를 형성하여 반도체소자의 특성 및 신뢰성을 향상시킬 수 있는 효과를 제공한다.As described above, in the method of manufacturing a semiconductor device according to the present invention, a protective film is formed on a region where a pad is not formed on the semiconductor device, and is formed to be connected to a guard ring so that the semiconductor substrate is grounded when external electromagnetic waves penetrate. By forming a passage that can be extinguished through to form a device having a stable characteristic to the electromagnetic wave provides an effect that can improve the characteristics and reliability of the semiconductor device.

Claims (5)

소정의 구조물이 형성된 제1절연막을 반도체기판 상부에 형성하는 공정과,Forming a first insulating film having a predetermined structure on the semiconductor substrate; 상기 제1절연막 상부에 패드를 형성하고 그 사이에 제2절연막을 형성하는 공정과,Forming a pad over the first insulating film and forming a second insulating film therebetween; 전체표면상부에 도전체 및 제3절연막을 적층하는 형성하되, 상기 도전체와 상기 제1절연막 내의 가아드링을 접속시키는 공정과,Forming a conductor and a third insulating film over the entire surface, and connecting the conductor and the guard ring in the first insulating film; 소정 부분의 상기 패드를 노출시키도록 상기 도전체 및 제3절연막 적층구조로 패터닝된 보호막을 형성하는 공정과,Forming a protective film patterned with the conductor and the third insulating film stack structure to expose the pad of a predetermined portion; 상기 보호막 및 가아드링의 외부에 제4절연막 스페이서를 형성하여 상기 보호막의 절연특성을 향상시키는 공정을 포함하는 반도체소자의 제조방법.And forming a fourth insulating film spacer outside the protective film and the guard ring to improve insulating properties of the protective film. 제 1 항에 있어서, The method of claim 1, 상기 제2절연막은 산화막, 질화막, 산화질화막 또는 SOG 로 형성하는 것을 특징으로 하는 반도체소자의 제조방법.And the second insulating film is formed of an oxide film, a nitride film, an oxynitride film, or an SOG. 제 1 항에 있어서,The method of claim 1, 상기 도전체는 텅스텐이나 알루미늄으로 형성하는 것을 특징으로 하는 반도체소자의 제조방법.The conductor is a method of manufacturing a semiconductor device, characterized in that formed of tungsten or aluminum. 제 1 항에 있어서,The method of claim 1, 상기 제3절연막은 산화막, 질화막, 산화질화막 또는 SOG 로 형성하는 것을 특징으로 하는 반도체소자의 제조방법.And the third insulating film is formed of an oxide film, a nitride film, an oxynitride film, or an SOG. 제 1 항에 있어서,The method of claim 1, 상기 제4절연막은 산화막, 질화막, 산화질화막 또는 SOG 로 형성하는 것을 특징으로 하는 반도체소자의 제조방법.And the fourth insulating film is formed of an oxide film, a nitride film, an oxynitride film, or an SOG.
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Citations (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
KR970030674A (en) * 1995-11-20 1997-06-26 김광호 Layout to remove noise in chip
JPH09326468A (en) * 1996-06-03 1997-12-16 Nec Corp Semiconductor device and its manufacturing method
KR19980084130A (en) * 1997-05-21 1998-12-05 윤종용 Semiconductor device with electromagnetic shielding and manufacturing method
KR19990073868A (en) * 1998-03-04 1999-10-05 윤종용 Semiconductor device and manufacturing method thereof

Patent Citations (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
KR970030674A (en) * 1995-11-20 1997-06-26 김광호 Layout to remove noise in chip
JPH09326468A (en) * 1996-06-03 1997-12-16 Nec Corp Semiconductor device and its manufacturing method
KR19980084130A (en) * 1997-05-21 1998-12-05 윤종용 Semiconductor device with electromagnetic shielding and manufacturing method
KR19990073868A (en) * 1998-03-04 1999-10-05 윤종용 Semiconductor device and manufacturing method thereof

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