KR100549068B1 - Video processing signal supplier and control method thereof - Google Patents

Abstract

The present invention relates to an image processing signal supply device for supplying a plurality of signals for processing an image signal having a horizontal and vertical blanking section and a back porch pedestal level section and a control method thereof. The image processing signal supply apparatus includes: a resolution selection signal input unit for inputting a corresponding resolution selection signal at the time of resolution selection from a user; A clock signal input unit for inputting a clock signal of a predetermined period; A horizontal and vertical synchronous signal input unit for inputting horizontal and vertical synchronous signals; Horizontal and vertical blanking signal output units for outputting horizontal and vertical blanking signals; A clamp signal output unit for outputting a clamp signal; Horizontal and vertical blanking of the video signal corresponding to the selected resolution according to the resolution selection signal from the resolution selection signal input unit, the clock signal from the clock signal input unit, and the horizontal and vertical synchronization signal from the horizontal and vertical synchronization signal input unit. Determine a section and a back porch pedestal level section of the video signal, and determine the horizontal and vertical blanking signals and the clamp signal in the determined horizontal and vertical blanking sections and the back porch pedestal level sections, respectively. And a control unit outputting the signal output unit and the clamp signal output unit. Accordingly, it is possible to provide an image processing signal supply device and a control method thereof capable of supplying a plurality of signals necessary for processing image signals for each resolution simply and inexpensively.

Description

Image processing signal supply device and its control method {VIDEO PROCESSING SIGNAL SUPPLIER AND CONTROL METHOD THEREOF}

1 is a control block diagram of an image processing signal supply apparatus according to the present invention;

2 is a timing diagram of a horizontal section of a video signal, a horizontal synchronization signal, and a plurality of video processing signals;

3 is a timing diagram of a vertical section, a vertical synchronization signal, and a vertical blanking signal of a video signal;

4 is a control flowchart of the image processing signal supply apparatus according to the present invention.

* Explanation of symbols for the main parts of the drawings

10: reset signal input unit 12: resolution selection signal input unit

14: clock signal input unit 16: horizontal synchronous signal input unit

18: vertical synchronous signal input unit 20: horizontal blanking signal output unit

22: vertical blanking signal output unit 24: clamp signal output unit

30: control unit 40: sand castle pulse generation unit

42a, 42b, 42c: first resistor 44a, 44b, 44c: diode

46: second resistance

The present invention relates to an image processing signal supply apparatus and a control method thereof, and more particularly, to an image processing signal supply apparatus capable of simply and inexpensively supplying a plurality of signals required for processing an image signal for each resolution and its It relates to a control method.

In general, in a video display device such as a television receiver, a return line is a flyback line drawn by an electron beam when an electron beam is moved from one scan line to the next scan line or from one end of a field to the first position of the next field in a cathode ray tube. Also called.

In addition, the blanking is to reduce the pulse level of the image pulse or suppress the emission of the electron beam from the cathode ray tube during the blanking period so that no blanking appears on the screen. This period is referred to as the blanking period or the blanking period. .

In this regard, the blanking pulse refers to a pulse used for the purpose of erasing the blank, which is also referred to as a blanking pulse and has a horizontal blanking pulse and a vertical blanking pulse since it is in the form of a pulse coinciding with the blanking period.

On the other hand, in order to faithfully reproduce and display the R, G and B color signals of the video signal received by the video display device, the potential of the cutoff control terminal of the video preamplifier is automatically adjusted. Clamp pulses are used to maintain the pedestal level at a constant potential.

Sand Castle Pulse (SCP), which is a combination signal of horizontal and vertical blanking pulses and clamp pulses, is used as an image processing signal.

However, signals for image processing such as horizontal blanking pulses, vertical blanking pulses, clamp pulses, and sandcastle pulses in conventional image display apparatuses are provided by separate signal supply ICs, that is, horizontal blanking pulse supply ICs, vertical blanking pulse supply ICs, and clamp pulses. It was supplied through the supply IC and the sandcastle pulse supply IC, respectively.

However, these signal supply ICs are also difficult to find and expensive, which is inconvenient in circuit design.

Accordingly, an object of the present invention is to provide an image processing signal supply device and a control method thereof, which can supply a plurality of signals necessary for processing image signals for each resolution simply and inexpensively.

The above object is, according to the present invention, in the image processing signal supply apparatus for supplying a plurality of signals for processing the image signal having a horizontal and vertical blanking section and the back porch pedestal level section, the corresponding at the time of resolution selection from the user A resolution selection signal input unit for inputting a resolution selection signal; A clock signal input unit for inputting a clock signal of a predetermined period; A horizontal and vertical synchronous signal input unit for inputting horizontal and vertical synchronous signals; Horizontal and vertical blanking signal output units for outputting horizontal and vertical blanking signals; A clamp signal output unit for outputting a clamp signal; The horizontal and vertical of the image signal corresponding to the selected resolution according to the resolution selection signal from the resolution selection signal input unit, the clock signal from the clock signal input unit, and the horizontal and vertical synchronization signal from the horizontal and vertical synchronization signal input unit. Determine a blanking section and a back porch pedestal level section of the video signal, and determine the horizontal and vertical blanking signals and the clamp signal in the determined horizontal and vertical blanking sections and the back porch pedestal level sections, respectively. And a control unit for outputting the blanking signal output unit and the clamp signal output unit.

And a reset signal input unit for inputting a reset signal; The control unit may reset the horizontal and vertical blanking signals and the clamp signal when the reset signal is input through the reset signal input unit.

The apparatus may further include a sandcastle pulse generator configured to output sandcastle pulses by combining the horizontal and vertical blanking signals and the clamp signals respectively output from the horizontal and vertical blanking signal output units and the clamp signal output unit.

The sand castle pulse generating unit includes a plurality of first resistors having one end connected to each of the horizontal and vertical blanking signal output units and the clamp signal output unit, and a plurality of diodes having an anode end connected to the other end of each of the first resistors; And a second resistor, one end of which is simultaneously connected to the cathode of the diode and the other end of which is connected to ground, wherein the sandcastle pulse is output through one end of the second resistor.

The control unit may further include predetermined vertical blanking section end point data, horizontal blanking section start point data, horizontal blanking section end point data, back porch pedestal level section start point data, and back porch pedestal corresponding to the resolution selected when the resolution selection signal is input. Preferably, the plurality of video signal section reference data including the level section end point data are stored in different variables.

The vertical blanking interval end point data includes the number of inputs of the horizontal synchronization signal from the vertical synchronization signal to the vertical blanking interval end point, and the horizontal blanking interval start point data and the horizontal blanking interval end point data are the horizontal synchronization. And a number of inputs of the clock signal from the horizontal blanking interval start point and the end point after the signal is input, wherein the back porch pedestal level interval start point data and the back porch pedestal level interval end point data are inputted by the horizontal synchronization signal. And the number of inputs of the clock signal to the start point and end point of the back porch pedestal level section.

The controller compares the number of inputs of the clock signal counted after the horizontal synchronization signal is input with the stored horizontal blanking interval start point data and the horizontal blanking interval end point data to determine the horizontal blanking interval. It is preferable to output the horizontal blanking signal.

The controller may further compare the number of inputs of the clock signal counted after the horizontal synchronization signal is input with the stored back porch pedestal level section start point data and the back porch pedestal level section end point data. The clamp signal may be output when it is determined that the stabil level is a section.

The control unit outputs the vertical blanking signal during the interval from the input of the vertical synchronization signal until the input number of the counted horizontal synchronization signal is equal to the stored vertical blanking interval end point data. It is desirable to.

The controller may be implemented by VHDL.

On the other hand, according to another aspect of the present invention, in the control method of the image processing signal supply apparatus for supplying a plurality of signals for processing the image signal having a horizontal and vertical blanking section and the back porch pedestal level section, Receiving a corresponding resolution selection signal, a clock signal of a predetermined period, and horizontal and vertical synchronization signals when selecting a resolution from a user; Determining horizontal and vertical blanking sections of the video signal corresponding to the selected resolution and back porch pedestal level sections of the video signal according to the resolution selection signal, the clock signal, and the horizontal and vertical synchronization signals received; ; And outputting the horizontal and vertical blanking signals and the clamp signal to the determined horizontal and vertical blanking sections and the back porch pedestal level sections, respectively. do.

Here, the step of receiving a reset signal; The method may further include resetting the horizontal and vertical blanking signals and the clamp signal according to the input reset signal.

The method may further include synthesizing the horizontal and vertical blanking signals and the clamp signals to output sandcastle pulses.

In addition, the predetermined vertical blanking section end point data, the horizontal blanking section start point data, the horizontal blanking section end point data, the back porch pedestal level section start point data, and the back porch pedestal level section end point data corresponding to the selected resolution when the resolution selection signal is input. The method may further include storing the plurality of video signal section reference data including different data in different variables.

The vertical blanking interval end point data includes the number of inputs of the horizontal synchronization signal from the vertical synchronization signal to the vertical blanking interval end point, and the horizontal blanking interval start point data and the horizontal blanking interval end point data are the horizontal synchronization. And a number of inputs of the clock signal from the horizontal blanking interval start point and the end point after the signal is input, wherein the back porch pedestal level interval start point data and the back porch pedestal level interval end point data are inputted by the horizontal synchronization signal. And the number of inputs of the clock signal to the start point and end point of the back porch pedestal level section.

The horizontal blanking signal is determined when the horizontal synchronization signal is input and the number of clock signals counted after the horizontal synchronization signal is input is compared with the stored horizontal blanking interval start point data and the horizontal blanking interval end point data. It is preferable to further include the step of outputting.

In addition, the number of inputs of the clock signal counted after the horizontal synchronization signal is input is compared with the stored back porch pedestal level section start point data and the back porch pedestal level section end point data, and the back porch pedestal level section If it is determined that it is preferable to further include the step of outputting the clamp signal.

And outputting the vertical blanking signal for a period from the time of inputting the vertical synchronous signal until the number of input of the horizontal synchronous signal counted after the input of the vertical synchronous signal is equal to the stored end point of the vertical blanking period. It is preferable to further include.

Hereinafter, the present invention will be described in detail with reference to the accompanying drawings.

1 is a control block diagram of an image processing signal supply apparatus according to the present invention. As shown in this figure, the image processing signal supply apparatus includes a reset signal input unit 10 for inputting a reset signal and a resolution selection signal input unit 12 for inputting a resolution selection signal generated when a resolution is selected by a user. ), A clock signal input unit 14 for inputting a clock signal of a predetermined period, a horizontal synchronous signal input unit 16 and a vertical synchronous signal input unit 18 for inputting a horizontal synchronous signal and a vertical synchronous signal, and horizontal blanking A horizontal blanking signal output section 20 and a vertical blanking signal output section 22 for outputting a signal and a vertical blanking signal, a clamp signal output section 24 for outputting a clamp signal, a reset signal input section 10, The horizontal blanking signal output unit 20 and the vertical unit according to a plurality of input signals inputted through the resolution selection signal input unit 12, the clock signal input unit 14, the horizontal synchronous signal input unit 16, and the vertical synchronous signal input unit 18. Blanking signal output Through 22 and the clamp signal output section 24, a controller 30 for controlling the image processing signal which are respectively output.

In addition, the image processing signal supply apparatus outputs sandcastle pulses by combining horizontal and vertical blanking signals and clamp signals output from the horizontal and vertical blanking signal output units 20 and 22 and the clamp signal output unit 24, respectively. Sand castle pulse generating unit 40 further comprises.

Here, the control unit 30 is a resolution selection signal input through the resolution selection signal input unit 12, the clock signal input unit 14, horizontal and vertical synchronous signal input unit 16, 18, clock signal, horizontal and vertical synchronous signal, respectively The horizontal and vertical blanking sections and the back porch pedestal level sections of the video signal corresponding to the selected resolution are determined. The horizontal and vertical blanking signals and the clamp signals are output through the horizontal and vertical blanking signal output units 20 and 22 and the clamp signal output unit 24 in the horizontal and vertical blanking sections and the back porch pedestal level sections, respectively.

In addition, the controller 30 resets the horizontal blanking signal, the vertical blanking signal, and the clamp signal when the reset signal is input through the reset signal input unit 10.

The controller 30 may be implemented in a VHDL (Very High Speed Integrated Circuit Hardware Description Language), and Table 1 shows an example of the VHDL code of the controller 30.

TABLE 1

  library IEEE; use IEEE.std_logic_1164.all; use IEEE.std_logic_arith.all; use IEEE.std_logic_unsigned.all; entity Sync_tip1 is port (Hsync: in STD_LOGIC;-H SYNC Vsync: in STD_LOGIC;-V SYNC (vertical sync signal) rst: in STD_LOGIC;-negative reset signal clk: in STD_LOGIC;- clock (20.25Mhz) sel: in STD_LOGIC_VECTOR (1 downto 0);-Resolution select signal H_b: out STD_LOGIC;-Horizontal blanking signal H_c: out STD_LOGIC;-Clamp signal V_b: out STD_LOGIC-Vertical blanking signal); end Sync_tip1; architecture Sync_tip of Sync_tip1 is signal vcount: std_logic_vector (4 downto 0); signal V_var: std_logic_vector (4 downto 0); signal h_var_bs, h_var_be: std_logic_vector (10 downto 0); signal h_var_cs, h_var_ce: std_logic_vector (10 downto 0); signal hcount: std_logic_vector (10 downto 0); signal hsync_1d, hsync_2d, vsync_1d, vsync_2d: std_logic; begin

     Process (clk, rst, Hsync, Vsync, sel)                                                    variable hsync_start, vsync_start: std_logic; begin case (sel) is when "00" => V_var <= conv_std_logic_vector (17,5); Resolution 480p for ntsc, pal, secam h_var_bs <= conv_std_logic_vector (2,11); --blank start point h_var_be <= conv_std_logic_vector (97,11); blank end point h_var_cs <= conv_std_logic_vector (37,11); -clamp start point h_var_ce <= conv_std_logic_vector (64,11);-clamp end point                                                       when "01" => V_var <= conv_std_logic_vector (31,5); -Resolution sd 480p h_var_bs <= conv_std_logic_vector (618, 11); --blank start point h_var_be <= conv_std_logic_vector (87,11); blank end point h_var_cs <= conv_std_logic_vector (56, 11); --clamp start point h_var_ce <= conv_std_logic_vector (77,11); --clamp end point                                                       when "10" => V_var <= conv_std_logic_vector (20,5);-resolution 720p h_var_bs <= conv_std_logic_vector (426,11); --blank start point h_var_be <= conv_std_logic_vector (76,11); --blank end point h_var_cs <= conv_std_logic_vector (32,11); --clamp start point h_var_ce <= conv_std_logic_vector (66,11); --clamp end point when others => V_var <= conv_std_logic_vector (17,5);-Resolution 1080i h_var_bs <= conv_std_logic_vector (578,11);-blank start point h_var_be <= conv_std_logic_vector (61,11);- blank end point h_var_cs <= conv_std_logic_vector (30,11);-clamp start point h_var_ce <= conv_std_logic_vector (50,11); --clamp end point end case;                                                    if rst = '0' then H_b <= '0'; H_c <= '0'; V_b <= '0';                                                                      hsync_1d <= '0'; hsync_2d <= '0'; hcount <= (others => '0'); vcount <= (others => '0'); vsync_1d <= '0'; vsync_2d <= '0';                                              elsif (clk'event and clk = '1') then

 ------ hsync regeneration part hsync_1d <= hsync; hsync_2d <= hsync_1d; hsync_start: = hsync_1d AND NOT hsync_2d; --H sync start point if hsync_start = '1' then hcount <= (others => '0'); else hcount <= hcount + '1'; end if; -----------One. h blanking making part if (hcount = h_var_be) then H_b <= '0'; elsif (hcount = h_var_bs) then H_b <= '1'; end if; ----------2. clamp making part if hcount = h_var_cs then H_c <= '1'; elsif hcount = h_var_ce then H_c <= '0'; end if; ------ vsync regeneration part vsync_1d <= vsync; vsync_2d <= vsync_1d; vsync_start: = vsync_1d AND NOT vsync_2d; --v sync start point if vsync_start = '1' then vcount <= (others => '0'); elsif hsync_start = '1' then vcount <= vcount + '1'; end if; -------------- 3. v blanking making part if Vsync_start = '1' then V_b <= '1'; elsif vcount = v_var then V_b <= '0'; end if; end if; end process; end Sync_tip;

As shown in Table 1, the control unit 30 adjusts the value of any one of 00, 01, 10, 11 through the resolution selection signal input unit 12 (see 'sel' in Table 1) according to the user's resolution selection. It receives the input, and determines the resolution of NTSC, PAL, SECAM, 480p, SD 480p, 720p, 1080i and the like.

The control unit 30 is vertical blanking section end point data, horizontal blanking section start point data, horizontal blanking section end point data, back porch pedestal level section start point data, and back porch pedestal as preset image signal section reference data according to the determined resolution. The level section endpoint data is stored in different variables V_var, h_var_bs, h_var_be, h_var_cs, and h_var_ce.

Here, the vertical blanking section end point data includes the number of inputs of the horizontal synchronous signal from the vertical synchronous signal input to the vertical blanking section end point, and the horizontal blanking section start point data and the horizontal blanking section end point data are inputted after the horizontal synchronous signal is inputted. The number of clock signals input to the horizontal blanking section start point and the end point is included, and the back porch pedestal level section start point data and the back porch pedestal level section end point data include the back porch pedestal level section start point and the horizontal synchronization signal. It includes the number of inputs of the clock signal to the end point.

The controller 30 operates based on a rising edge of the clock signal and has a hsync_start value of 1 for one clock at the moment when the horizontal synchronization signal is received.

The controller 30 initializes the hcount value to 0 when the hsync_start value is 1, and counts the number of inputs of the clock signal by increasing the value by 1 for each rising edge of the next clock signal. That is, after the horizontal synchronization signal is input, the number of inputs of the clock signal is counted.

The controller 30 outputs 0 to the horizontal blanking signal output unit 20 when the number of inputs of the counted clock signal is equal to the horizontal blanking period end point data, and the horizontal blanking signal output unit 20 when the counted clock signal is equal to the horizontal blanking start point data. Outputs 1 As a result, the controller 30 outputs a horizontal blanking signal in the horizontal blanking section (see FIGS. 2A and 2C).

In addition, the controller 30 outputs 1 to the clamp signal output unit 24 when the number of input clock signals counted after the horizontal synchronization signal is equal to the back porch pedestal level section start point data, and the back porch pedestal level. If equal to the section end point data, zero is output to the clamp signal output section 24, and a clamp signal is output to the back porch pedestal level section (FIGS. 2A and 2D).

The controller 30 initializes the vcount value to 0 by setting the vsync_start value to 1 for one clock at the moment the vertical synchronization signal is input, and counts each time the horizontal synchronization signal is input. That is, the number of inputs of the horizontal synchronous signal is counted after the vertical synchronous signal is input.

The controller 30 outputs 1 to the vertical blanking signal output unit 22 when the vertical synchronous signal is input, and the vertical blanking signal output unit 22 when the number of counted horizontal synchronous signals equals the end point data of the vertical blanking section. ) To output 0 to output a vertical blanking signal during the vertical blanking period (see FIGS. 3A and 3C).

Here, the controller 30 counts the number of inputs of the horizontal synchronous signal after the vertical synchronous signal is input, but may also count the clock signal after the vertical synchronous signal is input. However, in this case, since a large number of clocks must be counted, it would be more desirable to count the number of inputs of the horizontal synchronization signal as in this embodiment.

According to the design using the VHDL of Table 1, the image processing signal supply device includes a reset signal input unit 10, a resolution selection signal input unit 12, a clock signal input unit 14, horizontal and vertical synchronous signal input units 16, 18, A programmable logic device (PLD) having horizontal and vertical blanking signal outputs 20 and 22 and a clamp signal output 24 is included. Thus, horizontal and vertical blanking signals and clamp signals can be supplied simply and inexpensively.

The sand castle pulse generator 40 includes a plurality of first resistors 42a, 42b, and 42c having one end connected to each of the horizontal and vertical blanking signal output units 20 and 22 and the clamp signal output unit 24. A plurality of diodes 44a, 44b, 44c having an anode terminal connected to the other end of one resistor 42a, 42b, 42c, and one end thereof are simultaneously connected to the cathode terminals of the plurality of diodes 44a, 44b, 44c, and the other end is grounded. And a second resistor 46 connected to it.

By this circuit configuration, horizontal and vertical blanking signals and clamp signals are synthesized to generate sandcastle pulses, and the generated sandcastle pulses are output through one end of the second resistor 46 in the form as shown in FIG. .

The control flow of the image processing signal supply apparatus according to the present invention having such a configuration is as shown in FIG.

First, the control unit 30 uses the resolution selection signal input unit 12, the clock signal input unit 14, and the horizontal and vertical synchronous signal input units 16 and 18 to select a corresponding resolution selection signal when the user selects a resolution, and a clock of a predetermined period. Receive a signal, horizontal and vertical synchronization signal (S10).

Then, the controller 30 according to the input resolution selection signal, the vertical blanking section end data, the horizontal blanking section start point data, the horizontal blanking section end point data, the back porch pedestal level section as the image signal section reference data corresponding to the selected resolution The starting point data and the back porch pedestal level section ending point data are stored in different variables (S12).

The controller 30 determines the horizontal blanking section by comparing the number of inputs of the clock signal counted after the horizontal synchronization signal is input with the stored horizontal blanking section start point data and the horizontal blanking section end point data (S14).

When it is determined that the horizontal blanking section is performed, a horizontal blanking signal is output (S20).

Meanwhile, the controller 30 compares the input number of the clock signal counted after the horizontal synchronization signal is input with the stored back porch pedestal level section start point data and the back porch pedestal level section end point data, and the back porch pedestal level section. Determine (S16).

Then, when it is determined that the back porch pedestal level section, the clamp signal is output (S22).

In addition, the controller 30 detects the vertical synchronous signal input and compares whether the number of input of the horizontal synchronous signal counted after the vertical synchronous signal is equal to the end point data of the stored vertical blanking interval determines the vertical blanking interval ( S18).

If it is determined that the vertical blanking section is performed, a vertical blanking signal is output (S24).

The horizontal and vertical blanking signals and the clamp signals thus output are synthesized through the sandcastle pulse generator 40 (S26) and output as sandcastle pulses (S28).

In addition, although not shown, the controller 30 resets the horizontal and vertical blanking signals and the clamp signals when the reset signal is input through the reset signal input unit 10.

As described above, the present invention can easily and inexpensively provide horizontal and vertical blanking signals, clamp signals, and sandcastle pulses required for each resolution in video signal processing.

The present invention is not limited to the above-described embodiment and can be modified by those skilled in the art within the spirit of the invention.

As described above, according to the present invention, there is provided an image processing signal supply device and a method of controlling the same, which can supply a plurality of signals necessary for processing image signals for each resolution simply and inexpensively.

Claims (18)

An image processing signal supply apparatus for supplying a plurality of signals for processing an image signal having a horizontal and vertical blanking section and a back porch pedestal level section, A resolution selection signal input unit for inputting a corresponding resolution selection signal at the time of resolution selection by the user; A clock signal input unit for inputting a clock signal of a predetermined period; A horizontal and vertical synchronous signal input unit for inputting horizontal and vertical synchronous signals; Horizontal and vertical blanking signal output units for outputting horizontal and vertical blanking signals; A clamp signal output unit for outputting a clamp signal; Horizontal and vertical blanking of the video signal corresponding to the selected resolution according to the resolution selection signal from the resolution selection signal input unit, the clock signal from the clock signal input unit, and the horizontal and vertical synchronization signal from the horizontal and vertical synchronization signal input unit. Determine a section and a back porch pedestal level section of the video signal, and determine the horizontal and vertical blanking signals and the clamp signal in the determined horizontal and vertical blanking sections and the back porch pedestal level sections, respectively. And a control unit outputting the signal output unit and the clamp signal output unit. The method of claim 1, A reset signal input section for inputting a reset signal; And the control unit resets the horizontal and vertical blanking signals and the clamp signal when the reset signal is input through the reset signal input unit. The method of claim 1, And a sandcastle pulse generator for synthesizing the horizontal and vertical blanking signal and the clamp signal output from the horizontal and vertical blanking signal output unit and the clamp signal output unit, respectively, and outputting sandcastle pulses. Feeder. The method of claim 3, The sand castle pulse generating unit includes a plurality of first resistors having one end connected to each of the horizontal and vertical blanking signal output units and the clamp signal output unit, and a plurality of diodes having an anode end connected to the other end of each of the first resistors; And a second resistor, one end of which is simultaneously connected to the cathode end of the diode and the other end of which is connected to ground, wherein the sandcastle pulse is output through one end of the second resistor. The method of claim 4, wherein The control unit may include predetermined vertical blanking section end point data, horizontal blanking section start point data, horizontal blanking section end point data, back porch pedestal level section start point data, and back porch pedestal level section corresponding to the resolution selected when the resolution selection signal is input. And a plurality of image signal section reference data including end point data are stored in different variables. The method of claim 5, The vertical blanking interval end point data includes the number of inputs of the horizontal synchronization signal from the vertical synchronization signal to the vertical blanking interval end point, and the horizontal blanking interval start point data and the horizontal blanking interval end point data are the horizontal synchronization. And a number of inputs of the clock signal from the horizontal blanking interval start point and the end point after the signal is input, wherein the back porch pedestal level interval start point data and the back porch pedestal level interval end point data are inputted by the horizontal synchronization signal. And a number of inputs of the clock signal to a start point and an end point of the back porch pedestal level section after being input. The method of claim 6, The control unit compares the number of inputs of the clock signal counted after the horizontal synchronization signal is input with the stored horizontal blanking section start point data and the horizontal blanking section end point data, and determines that the horizontal blanking section is the horizontal blanking section. And an image processing signal supply device for outputting a ranking signal. The method of claim 7, wherein The controller compares the number of inputs of the clock signal counted after the horizontal synchronization signal is input with the stored back porch pedestal level section start point data and the back porch pedestal level section end point data, and the back porch pedistal level. And outputting the clamp signal when it is determined to be a section. The method of claim 8, The control unit outputs the vertical blanking signal during the interval from the input of the vertical synchronization signal until the number of input of the horizontal synchronization signal counted after the input of the vertical synchronization signal is equal to the stored end data of the vertical blanking interval. An image processing signal supply device. The method according to any one of claims 1 to 9, The control unit is an image processing signal supply device, characterized in that implemented by VHDL. In the control method of the image processing signal supply device for supplying a plurality of signals for processing the image signal having a horizontal and vertical blanking section and a back porch pedestal level section, Receiving a corresponding resolution selection signal, a clock signal of a predetermined period, and horizontal and vertical synchronization signals when selecting a resolution from a user; Determining horizontal and vertical blanking sections of the video signal corresponding to the selected resolution and back porch pedestal level sections of the video signal according to the resolution selection signal, the clock signal, and the horizontal and vertical synchronization signals received; ; And outputting the horizontal and vertical blanking signals and the clamp signal to the determined horizontal and vertical blanking sections and the back porch pedestal level sections, respectively. The method of claim 11, Receiving a reset signal; And resetting the horizontal and vertical blanking signals and the clamp signal according to the input reset signal. The method of claim 11, And synthesizing the horizontal and vertical blanking signals and the clamp signal to output sandcastle pulses. The method of claim 13, The predetermined vertical blanking section end point data, the horizontal blanking section start point data, the horizontal blanking section end point data, the back porch pedestal level section start point data, and the back porch pedestal level section end point data corresponding to the selected resolution when the resolution selection signal is input. And storing the plurality of image signal section reference data in different variables. The method of claim 14, The vertical blanking interval end point data includes the number of inputs of the horizontal synchronization signal from the vertical synchronization signal to the vertical blanking interval end point, and the horizontal blanking interval start point data and the horizontal blanking interval end point data are the horizontal synchronization. And a number of inputs of the clock signal from the horizontal blanking interval start point and the end point after the signal is input, wherein the back porch pedestal level interval start point data and the back porch pedestal level interval end point data are inputted by the horizontal synchronization signal. And a number of inputs of the clock signal to a start point and an end point of the back porch pedestal level section after being input. The method of claim 15, The horizontal blanking signal is output when the horizontal synchronization signal is determined to be the horizontal blanking section by comparing the input number of the clock signal counted after the horizontal synchronization signal is input with the stored horizontal blanking section start point data and the horizontal blanking section end point data. The control method of the image processing signal supply device further comprising the step of. The method of claim 16, The number of clock signals counted after the horizontal synchronization signal is input is compared with the stored back porch pedestal level section start point data and the back porch pedestal level section end point data, and determined to be the back porch pedestal level section. And outputting the clamp signal when the image processing signal is supplied. The method of claim 17, Outputting the vertical blanking signal for a period from the time of inputting the vertical synchronous signal until the number of input of the horizontal synchronous signal counted after the input of the vertical synchronous signal is equal to the stored end point of the vertical blanking period; The control method of the image processing signal supply device, characterized in that.

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