KR100542210B1 - Method for driving plasma display panel and apparatus thereof, initiating method on the same - Google Patents

Abstract

The present invention relates to a method of driving a plasma display panel and an apparatus thereof, and an initialization method of the apparatus. In particular, the method of driving a plasma display panel includes a vertical frequency of an input video signal, where the vertical frequency is a vertical synchronization signal of the video signal. Frequency of-detects a change. When the vertical frequency change of the input video signal is detected, the vertical frequency change is checked for a specific period, and it is determined whether the generation of the subfield corresponding to the input video signal is completed after the specific period has elapsed. If it is determined that subfield generation is completed, initialization is performed corresponding to the vertical frequency at which the change is detected, and the corresponding image is displayed by driving the plasma display panel according to the vertical frequency at which the change is detected. According to the present invention, an abnormal reset initialization due to aperiodic vertical synchronizing signal input when switching to a mode corresponding to a new vertical frequency can be prevented, thereby preventing destruction of the driving circuit element. In addition, when the subfield is generated, excessive displacement current is generated in the switches of the driving circuits that perform the respective functions, thereby eliminating the stress of the driving circuit due to the transient phenomenon in which the switch breakage occurs.

Plasma display panel, PDP, PAL, NTSC, subfield, pause, vertical sync, vsync

Description

A method of driving a plasma display panel, a device thereof, and an initialization method in the device {METHOD FOR DRIVING PLASMA DISPLAY PANEL AND APPARATUS THEREOF, INITIATING METHOD ON THE SAME}

FIG. 1 is a diagram illustrating a logic process when a vertical frequency of an input video signal is changed from 60 Hz to 50 Hz in a conventional PDP.

2 is a diagram illustrating a logic process in a case where a vertical frequency of an input video signal is changed from 50 Hz to 60 Hz in a conventional PDP.

FIG. 3 is a diagram illustrating subfield generation when a vertical frequency of an input video signal is changed from 60 Hz to 50 Hz in a conventional PDP.

FIG. 4 is a diagram illustrating subfield generation when a vertical frequency of an input video signal is changed from 50 Hz to 60 Hz in a conventional PDP.

FIG. 5 is a diagram illustrating a logic process due to generation of an aperiodic vertical synchronization signal during mode conversion because the vertical frequency of an input video signal is changed from 60 Hz to 50 Hz in a conventional PDP.

FIG. 6 is a diagram illustrating an abnormal subfield generation due to generation of an aperiodic vertical synchronization signal during initialization due to a vertical frequency change of an input image signal in a conventional PDP.

FIG. 7 illustrates that subfield generation is started again in the middle of a reset pulse by aperiodic vertical synchronizing signal input in a reset pulse generation step of a subfield generation step during initialization due to a vertical frequency change of an input video signal in a conventional PDP. Drawing.

FIG. 8 is a diagram illustrating a logic process when a vertical frequency of an input image signal is changed from 60 Hz to 50 Hz in the method of driving a plasma display panel according to an exemplary embodiment of the present invention.

FIG. 9 is a diagram illustrating a logic process when a vertical frequency of an input image signal is changed from 50 Hz to 60 Hz in the method of driving a plasma display panel according to an exemplary embodiment of the present invention.

10 is a block diagram of a PDP driving apparatus according to an embodiment of the present invention.

11 is a flowchart of a PDP driving method according to an embodiment of the present invention.

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to the driving of a plasma display panel (hereinafter referred to as a 'PDP'), in particular a 50 Hz phase alternating by line (PAL) video signal and a 60 Hz National Television Standard Committee (NTSC) video signal. The present invention relates to a method of driving a PDP that can be received and displayed as an image, and a device thereof and an initialization method in the device.

A PDP is a type of display element which recovers image data input as an electric signal by arranging a plurality of discharge cells in a matrix shape and selectively emitting them.

In order to show performance as a color display element in such a PDP, gray scale display should be possible. As a method of implementing the gray scale display, a gray scale implementation method of dividing one field into a plurality of subfields and controlling the time division is used.

On the other hand, when designing such a PDP, not only an NTSC video signal but also a PAL video signal can be driven so that a corresponding image can be displayed.

In general, since the period of the vertical synchronization signal of NTSC is 58Hz to 62Hz, and the period of the vertical synchronization signal of PAL is 48Hz to 52Hz, the driving of NTSC is called 60Hz driving, and the driving of PAL is 50Hz driving.

In the driving of a conventional PDP, designing to enable 50 Hz driving and 60 Hz driving typically takes a 50 Hz / 60 Hz video signal input and makes a driving signal in the driving circuit to enable 50 Hz driving and 60 Hz driving. It is mainly handled by logic circuits.

Accordingly, the PDP logic circuit performs 50Hz logic processing when a 50Hz video signal is input according to the vertical frequency of the input video signal, and performs 60Hz logic processing when a 60Hz video signal is input.

In order to select the 50Hz / 60hz logic processing as described above, the logic processing is determined based on the vertical frequency of the input video signal. Therefore, the logic circuit needs an input signal mode determination block capable of determining the vertical frequency of the input video signal.

In the input signal mode determination block, the frequency of the vertical sync signal Vsync of the input video signal, that is, the vertical frequency, is counted and counted every frame to select 50Hz / 60Hz driving. At this time, the vertical frequency is determined by counting the period of the vertical synchronization signal every frame, and if it is determined that the determined period is different from the previous period, the signal for converting the mode is output.

At this time, since the mode conversion signal and the initialization signal are output when the count value of the changed period is not more than a predetermined frame without immediately outputting the mode conversion signal, a predetermined mode determination period exists. During this mode determination period, the logic process maintains the logic process before conversion, and after the mode determination period, the logic process is reset to switch to the new mode. At this time, the aperiodic vertical synchronizing signal may be input at the time when the mode conversion signal changes, and if the aperiodic vertical synchronizing signal is input before the subfield generation by the previous vertical synchronizing signal is finished, the driving switch is operated. There is a problem that the reset (initialization) occurs in the drive switch breakdown due to the instantaneous discharge of the charged charge.

1 is a diagram illustrating a logic process when the vertical frequency of an input video signal is changed from 60 Hz to 50 Hz in a conventional PDP, and FIG. 2 is a case where the vertical frequency of an input video signal is changed from 50 Hz to 60 Hz in a conventional PDP. A diagram illustrating the logic process.

As shown in FIG. 1, when the vertical frequency of the input image signal is changed from 60 Hz to 50 Hz, the mode conversion signal and the initialization signal are generated in synchronization with the vertical synchronization signal generated at least fifteenth after the change. At this time, the at least 15th generated vertical synchronization signal is set to a period in which the reliability of the change in the vertical frequency can be secured, but may vary depending on the design of the PDP. As such, there is a mode determination period in which the mode conversion signal and the initialization signal are not generated during the period in which at least 15 vertical synchronization signals are generated. Meanwhile, even though the vertical frequency of the input video signal is changed to 50 Hz even during the mode determination period, the subfields during the mode determination period are shown as shown in FIG. The structure also retains the previous subfield structure.

Similarly, as shown in FIG. 2, when the vertical frequency of the input video signal is changed from 50 Hz to 60 Hz, the mode conversion signal and the initialization signal are generated in synchronization with the vertical synchronization signal generated at least fifteenth after the change. As such, there is a mode determination period in which the mode conversion signal and the initialization signal are not generated during the period in which 15 vertical synchronization signals are generated. Meanwhile, even though the vertical frequency of the input video signal is changed to 60 Hz even during the mode determination period, the subfields during the mode determination period are shown in FIG. The structure also retains the previous subfield structure.

FIG. 5 is a diagram illustrating a logic process due to generation of an aperiodic vertical synchronization signal during mode conversion because the vertical frequency of an input video signal is changed from 60 Hz to 50 Hz in a conventional PDP.

As shown in FIG. 5, when the vertical frequency of the input video signal is changed from 60 Hz to 50 Hz, n-1 vertical sync signals are counted after the change, and mode conversion to 50 Hz when one vertical sync signal is input. At the time when a mode conversion signal and an initialization signal are generated, even when a non-periodic vertical synchronization signal is generated, which is not a normal 50 Hz vertical synchronization signal, the aperiodic vertical synchronization signal is counted to generate a mode conversion signal and an initialization signal. .

As such, when the aperiodic vertical synchronizing signal is input at the time of mode switching, destruction of the driving circuit may occur due to the state of the subfield generation step. For example, as shown in FIG. 6, the logic process is initialized due to the reset of the logic process due to the above cause during the reset pulse generation step or the sustain discharge pulse generation step during the subfield generation step. When the step is restarted, there is a problem that excessive switch current is generated in the switches of the driving circuits serving the respective functions, so that switch breakage occurs. For example, as shown in FIG. 7, when the subfield generation is started again in the middle of the reset pulse by the aperiodic vertical synchronization signal input in the reset pulse generation step of the subfield generation step, the ramp of the reset pulse is generated. At peak voltage (approximately 400 V), the panel displacement current flows excessively to Yp, Ysp and Yg, which can break some of the Yp switches with a small withstand current capacity per switch. This problem occurs similarly when the vertical frequency is switched from 50Hz to 60Hz to switch modes.

 Therefore, the technical problem of the present invention is to solve the above problems, and when switching to a new mode after the subfield generation is completed when the vertical frequency of the input video signal is changed to a new mode, Disclosed are a driving method and apparatus for a plasma display panel for preventing abnormal reset initialization due to a periodic vertical synchronization signal input and preventing destruction of a driving circuit element, and an initialization method in the apparatus.

Method of driving a plasma display panel according to an aspect of the present invention for achieving the above object,

A driving method of a plasma display panel in which an image of each field displayed on a plasma display panel corresponding to an input image signal is divided into a plurality of subfields having different specific gravity, and the gray level is displayed by combining the specific gravity values of the subfields.

a) detecting a change in the vertical frequency of the input video signal, wherein the vertical frequency is the frequency of the vertical synchronization signal of the video signal; b) when the vertical frequency change of the input video signal is detected in step a), checking the vertical frequency change for a specific period; c) determining whether the generation of the subfield corresponding to the input video signal is completed after a specific period of time in step b); d) when it is determined in step c) that subfield generation is completed, performing initialization corresponding to the vertical frequency at which the change is detected; And e) driving the plasma display panel according to the vertical frequency at which the change is detected to display a corresponding image.

Here, whether or not the subfield generation is completed in step c) is preferably determined by whether the step of generating the subfield is an idle period step.

Further, in the step b), the specific period is preferably determined by the number of inputs of the vertical synchronization signal of the input video signal.

In addition, the vertical frequency change is preferably a change from 50 Hz, which is a Phase Alternating by Line (PAL) signal, to 60 Hz, which is a National Television Standard Committee (NTSC) signal.

In addition, the vertical frequency change is preferably a change from NTSC signal 60Hz to PAL signal 50Hz.

The initialization method of the plasma display panel driving apparatus according to another aspect of the present invention,

An initialization method in a driving apparatus of a plasma display panel in which an image of each field displayed on the plasma display panel in response to an input image signal is divided into a plurality of subfields having different specific gravity, and a gray level is displayed by combining the specific gravity values of the subfields. As

The vertical frequency of the input video signal, wherein the vertical frequency is the frequency of the vertical synchronization signal of the video signal, is performed when a change is detected. If there is an ongoing subfield generation process, the vertical subfield is performed after the ongoing subfield generation process is completed. It is characterized by.

In this case, the initialization is preferably performed after a certain number of vertical synchronization signals are input from the time when the vertical frequency change of the input image signal is detected.

A driving device of a plasma display panel according to another aspect of the present invention,

A driving apparatus of a plasma display panel for dividing an image of each field displayed on a plasma display panel in response to an input video signal into a plurality of subfields having different specific gravity, and displaying gray levels by combining the specific gravity values of the subfields.

And generating digital image data by digitizing the input image signal, and determining a change in the vertical frequency of the input image signal, wherein the vertical frequency is the frequency of the vertical synchronization signal of the image signal, and outputting a corresponding signal. A signal processor; A memory controller generating subfield data corresponding to the digital image data output from the image signal processor and applying the same to the plasma display panel; And a sustain / scan pulse driving controller which generates a subfield array structure corresponding to the digital image data output from the image signal processor, generates a control signal based on the generated subfield array, and applies the generated control signal to the plasma display panel. If the change in the vertical frequency of the input video signal is determined by the image signal processor, the signal corresponding to the change in the vertical frequency is output after the subfield generation process performed by the sustain / scan pulse driving controller is completed. It is characterized by.

The video signal processor may include a vertical frequency change determiner configured to determine a change in a vertical frequency of the input video signal; And a corresponding signal output unit configured to output a corresponding signal to the memory controller and the sustain / scan pulse drive controller according to a result of the determination of the change of the vertical frequency by the vertical frequency change determiner. When the change in the vertical frequency is determined by the frequency change determining unit, it is preferable to output a signal corresponding to the change in the vertical frequency after the subfield generation process performed by the sustain / scan pulse driving controller is completed.

The plasma display panel driving apparatus may further include a memory configured to store data used to process the image signal in the image signal processor and to store data set to drive the plasma display panel according to a vertical frequency of the image signal. Include.

DETAILED DESCRIPTION Hereinafter, exemplary embodiments of the present invention will be described in detail with reference to the accompanying drawings so that those skilled in the art may easily implement the present invention. As those skilled in the art would realize, the described embodiments may be modified in various different ways, all without departing from the spirit or scope of the present invention. In the drawings, parts irrelevant to the description are omitted in order to clearly describe the present invention. Like parts are designated by like reference numerals throughout the specification.

First, a driving method of a plasma display panel according to an exemplary embodiment of the present invention will be described with reference to the accompanying drawings.

8 is a diagram illustrating a logic process when the vertical frequency of an input image signal is changed from 60 Hz to 50 Hz in the method of driving a plasma display panel according to an embodiment of the present invention. The logic process in the case of changing from 50Hz to 60Hz is shown.

8 and 9, in the PDP driving method according to an exemplary embodiment of the present invention, when a mode determination period elapses after the vertical frequency change of the input image signal is detected, that is, n vertical synchronization signals are detected. When the subfield generation step is in progress, it is determined whether the subfield generation step is in progress at this point without performing the mode conversion signal generation and the initialization by the system reset immediately. After the process is completed, initialization by mode switching signal switching and system reset is performed after the subfield generation step is completed. In this manner, when the mode determination period has elapsed and there is no ongoing subfield generation step, initialization by mode conversion signal switching and system reset is performed, so that the breakdown phenomenon of the drive circuit element as in the prior art does not occur and is excessive. Since the stress of the driving circuit due to the phenomenon can be eliminated, the driving circuit can be protected.

As described above, when the subfield generation step is in progress at the time when the mode determination period elapses, there may be various ways to prevent the initialization by the mode conversion signal switching and system reset. However, in the present embodiment, the mode determination is performed. Mode switching signal switching after or after the period elapses, i.e., when the nth vertical synchronization signal indicating the elapse of the mode determination period occurs, or until the subfield generation step becomes the idle period step unless the subfield generation step is the idle period step. And a method of preventing initialization by system reset from being performed.

8 and 9, the mode determination period is completed when the aperiodic vertical synchronization signal is generated at the point A in FIG. 8 and the point C in FIG. 9, but at this time, the subfield generation step is in progress. The system initialization is not performed because the mode conversion signal is not switched and therefore no initialization signal by the system reset is generated.

However, since the subfield generation step is completed after the mode determination period has elapsed, that is, the subfield generation step at the point B in FIG. 8 and the point D in FIG. 9 becomes the rest period step, the mode conversion signal is switched. Since the initialization signal generated by the system reset is generated, system initialization can be performed.

After such system initialization, the system data according to the changed vertical frequency is downloaded and the subfield generation step corresponding to the new vertical frequency is continued to display the corresponding image on the PDP.

10 is a block diagram of a PDP driving apparatus according to an embodiment of the present invention.

As shown in FIG. 10, the PDP driving apparatus according to an exemplary embodiment of the present invention includes a video signal processor 100, a memory controller 200, an address driver 300, a sustain / scan pulse drive controller 400, a sustain / The scan pulse driver 500 and the EEPROM (Electrically Erasable Programmable Read Only Memory) 700 are included.

The image signal processing unit 100 performs basic signal processing, for example, gamma correction processing and error diffusion processing, on the video signal input from the outside to output corresponding RGB image data, and simultaneously outputs the vertical synchronization signal from the video signal. (Vsync) is detected to determine whether the video signal is a 50Hz PAL signal or a 60Hz NTSC signal and outputs a signal related to the mode. Therefore, the image signal processing unit 100 not only detects the frequency change of the first vertical sync signal, but also determines that the number of the vertical sync signals that can confirm the vertical frequency change after the detection is input, and determines that the vertical frequency has changed. .

The 50Hz / 60Hz discrimination unit 110 included in the video signal processing unit 100 detects a vertical synchronization signal from the video signal, determines whether it is a PAL signal of 50Hz or an NTSC signal of 60Hz, and determines a corresponding mode. The mode-related signal output unit 120 is a mode determined by the 50Hz / 60Hz determination unit 110, that is, whether the PAL mode of 50Hz or NTSC mode of 60Hz and the sub-transmitted from the sustain / scan pulse drive control unit 400. The relevant signal is output according to the state of the field generation step.

This mode-related signal has a logically high value in the PAL mode of 50 Hz and a logically low value in the NTSC mode of 60 Hz, and a value corresponding to the new mode after a mode determination period. There is an initialization signal for performing initialization by resetting. At this time, the mode conversion signal and the initialization signal is the time when the mode determination period has elapsed or when the subfield generation step determined by the state of the subfield generation step transmitted from the sustain / scan pulse drive control unit 400 is an idle period. Is controlled to occur only.

The EEPROM 700 stores various data used to process an image signal in the image signal processing unit 100, and in particular, NTSC mode used in the case of PAL mode data used in the case of 50 Hz PAL mode and 60 Hz NTSC mode. The data is stored. Such PAL mode data and NTSC mode data are downloaded and used during the initialization period after the mode is converted.

The memory controller 200 generates subfield data corresponding to the RGB image data output from the image signal processor 100.

The address driver 300 generates address data corresponding to the subfield data output from the memory controller 200 and applies the address data to the address electrodes A1, A2, ..., Am of the PDP 600.

The sustain / scan pulse drive control unit 400 generates a subfield array structure corresponding to the RGB image data output from the video signal processor 100, and generates a control signal based on the generated subfield array to maintain and scan the pulse. Outputs to the driver 500 and transmits a signal indicating the state of the subfield generation step performed by the sustain / scan pulse driver 500 to the image signal processor 100 to switch and initialize the mode conversion signal during subfield generation. Ensure that no signal is performed.

The sustain / scan pulse driver 500 generates sustain pulses and scan pulses corresponding to the control signals output from the sustain / scan pulse drive control unit 400 to scan electrodes X1, X2,..., Xn of the PDP 600. ) And sustain electrodes Y1, Y2, ..., Yn.

Hereinafter, a PDP driving method according to an exemplary embodiment of the present invention will be described with reference to FIG. 11.

First, the 50 Hz / 60 Hz determination unit 110 of the image signal processing unit 100 continuously detects the vertical synchronization signal from the input image signal, and determines whether the frequency of the vertical synchronization signal is changed from 50 Hz to 60 Hz or from 60 Hz to 50 Hz. Determine (S10).

If it is determined in step S10 that the frequency of the vertical synchronization signal input is changed, the 50Hz / 60Hz discrimination unit 110 is a period during which the reliability of the vertical frequency is changed to the number of the vertical synchronization signal input thereafter changed It is determined whether n persons set to (S20).

When the number of input vertical synchronization signals is normally input and becomes n, after the subfield generation step is completed, the mode-related signal output unit 120 is switched to correspond to the changed vertical frequency so that an initialization signal is generated. The system initializes normally by resetting.

However, even when the non-periodic vertical synchronization signal is input as shown in FIGS. 8 and 9 when the number of vertical synchronization signals to be input is n, the 50 Hz / 60 Hz discrimination unit 110 changes the vertical synchronization signal after the vertical frequency is changed. The number of inputs is determined to be n, and the mode-related signal output unit 120 is notified that the mode determination period has elapsed.

Next, after the mode-related signal output unit 120 is notified by the 50 Hz / 60 Hz determination unit 110 that the mode determination period has elapsed, the subfield generation step transmitted from the sustain / scan pulse drive control unit 400 is idle. If it is not a step, a mode related signal, i.e., a mode conversion signal and an initialization signal, should not be switched or generated, and thus the switching or generation of the mode related signal is deferred until the subfield generation step becomes the idle period step ( S30).

Therefore, the mode-related signal output unit 120 converts the mode conversion signal to a level corresponding to the changed vertical frequency when the subfield generation step transmitted from the sustain / scan pulse drive control unit 400 becomes the rest period step. In other words, the previous level is inverted and output (S40).

In addition, the mode-related signal output unit 120 enables the initialization signal to enable initialization by a system reset (S50).

After that, the data corresponding to the converted vertical frequency is transferred from the EEPROM 700 to the image signal processor 100, the memory controller 200, the address driver 300, the sustain / scan pulse drive controller 400, and the sustain / scan pulse driver. After being downloaded and set to 500, subfield data and address data are generated in a new mode and output to the PDP 600 so that a stable image is displayed on the PDP 600 (S60).

Although the preferred embodiment of the present invention has been described in detail above, the present invention is not limited thereto, and various other changes and modifications are possible.

According to the present invention, an abnormal reset initialization due to aperiodic vertical synchronizing signal input when switching to a mode corresponding to a new vertical frequency can be prevented, thereby preventing destruction of the driving circuit element.

In addition, when the subfields are generated, excessive displacement current is generated in the switches of the driving circuits responsible for each function, thereby eliminating the stress of the driving circuit due to the transient phenomenon in which the switch breakage occurs.

Claims (13)

A method of driving a plasma display panel in which an image of each field displayed on a plasma display panel in response to an input video signal is divided into a plurality of subfields having different specific gravity, and a gray level is displayed by combining the specific gravity values of the subfields. a) detecting a change in the vertical frequency of the input video signal, wherein the vertical frequency is the frequency of the vertical synchronization signal of the video signal; b) when the vertical frequency change of the input video signal is detected in step a), checking the vertical frequency change for a specific period; c) determining whether the generation of the subfield corresponding to the input video signal is completed after a specific period of time in step b); d) when it is determined in step c) that subfield generation is completed, performing initialization corresponding to the vertical frequency at which the change is detected; And e) driving the plasma display panel according to the vertical frequency at which the change is detected to display a corresponding image; Method of driving a plasma display panel comprising a. The method of claim 1, And whether or not the generation of the subfield is completed in step c) is determined by whether the generation step of the subfield is an idle period step. The method of claim 1, And in the b), the specific period is determined by the number of inputs of the vertical synchronization signal of the input image signal. The method according to any one of claims 1 to 3, And the vertical frequency change is a change from a 50 Hz (Phase Alternating by Line) signal to a 60 Hz (NTSC) National Television Standard Committee (NTSC) signal. The method according to any one of claims 1 to 3, Wherein the vertical frequency change is a change from an NTSC signal of 60 Hz to a PAL signal of 50 Hz. An initialization method in a driving apparatus of a plasma display panel in which an image of each field displayed on the plasma display panel in response to an input image signal is divided into a plurality of subfields having different specific gravity, and a gray level is displayed by combining the specific gravity values of the subfields. To When a vertical frequency of the input video signal, where the vertical frequency is a frequency of the vertical synchronization signal of the video signal, is detected, initialization is performed, and if there is an ongoing subfield generation process, after the ongoing subfield generation process is completed. Is performed, And the initialization is performed after a certain number of vertical synchronization signals are input from a time point at which a vertical frequency change of the input image signal is detected. delete The method of claim 6, The method of initializing the plasma display panel according to claim 1, wherein the generation of the subfield is determined by whether the generation of the subfield is an idle period step. A driving apparatus of a plasma display panel in which an image of each field displayed on a plasma display panel in response to an input video signal is divided into a plurality of subfields having different specific gravity, and a gray level is displayed by combining the specific gravity values of the subfields. And generating digital image data by digitizing the input image signal, and determining a change in the vertical frequency of the input image signal, wherein the vertical frequency is the frequency of the vertical synchronization signal of the image signal, and outputting a corresponding signal. A signal processor; A memory controller generating subfield data corresponding to the digital image data output from the image signal processor and applying the same to the plasma display panel; And A sustain / scan pulse driving control unit generating a subfield array structure corresponding to the digital image data output from the image signal processor, and generating and applying a control signal based on the generated subfield array to the plasma display panel; Including; When the change in the vertical frequency of the input image signal is determined by the image signal processor, the signal corresponding to the change in the vertical frequency is output after the subfield generation process performed by the sustain / scan pulse driving controller is completed. A drive device for a plasma display panel. The method of claim 9, The video signal processor, A vertical frequency change discrimination unit which determines a change in vertical frequency of the input video signal; And A corresponding signal output section for outputting a corresponding signal to the memory control section and the sustain / scan pulse driving control section according to a result of the vertical frequency change determination section; Including; When the change of the vertical frequency is determined by the vertical frequency change determining unit, the corresponding signal output unit may output a signal corresponding to the change of the vertical frequency after the subfield generation process performed by the sustain / scan pulse driving controller is completed. Output A drive device for a plasma display panel. The method of claim 10, The determination of the vertical frequency is performed after a specific number of vertical synchronization signals are input from the time when the vertical frequency change of the input image signal is first detected. The method of claim 9, And a signal for initializing the image signal processor, the memory controller, and the sustain / scan pulse driving controller. The method according to any one of claims 9 to 12, And a memory configured to store data used to process the image signal in the image signal processor and to store data set to drive the plasma display panel according to a vertical frequency of the image signal.

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