KR100525433B1 - Apparatus for coding channel in Time Division Duplex Mode - Google Patents

Abstract

The present invention relates to a next generation mobile communication system, and more particularly, to a channel coding apparatus in a time division duplex (TDD) mode having a low chip rate of 1.28 Mcps. The channel coding apparatus in the time division duplex mode according to the present invention is a serial-parallel for dividing a predetermined number of bits of control information bits to be transmitted in response to an arbitrary access attempt of a specific user into an even-numbered bit string and an odd-numbered bit string. A plurality of first multipliers for multiplying the different bit streams with codes assigned to a specific user, a second multiplier for multiplying any one bit string with a complex component, a first multiplier, and a second multiplier An adder for synthesizing and outputting bit streams, a code multiplexer for multiplexing the synthesized bit streams with synthesized bit streams of other users, a third multiplier for multiplying the code multiplexed bit streams with a channelization code, Time multiplexing the bit stream output from the third multiplier and the midamble bit stream Heavy and is composed of the fourth multiplier to said time-multiplexed bit stream a predetermined number of channels multiplied by the identification code of the control information cell to be bit to be transmitted. Therefore, the present invention enables the realization of the operation required for the fast physical access channel (FPACH) by using the spreading factor and the channel structure available at 1.28 Mcps, as well as leaving room for other data information later. And coding.

Description

Apparatus for coding channel in Time Division Duplex Mode

The present invention relates to a next generation mobile communication system, and more particularly, to a channel coding method and a system therefor in a time division duplex (TDD) mode having a low chip rate of 1.28 Mcps.

The ITU suggested that Time Division Duplex (TDD) mode with low chip rate (1.28 Mcps) should be supported even in indoor, walking and transport environments (120 km / h). One of the TDD options, the low chip rate option, must support basic service (bearer service), support 2Mbps data service in indoor environments and IMT-2000 compliant systems that meet ITU requirements, and in outdoor walking environments. The data service should support up to 384 kbps and above, and the data rate for the moving user (at least 120 km / h of vehicle speed) should support 384 kbps or more.

In the physical layer in the TDD mode having the low chip rate, the power control operation, the cell search operation, and the uplink control for the closed power control in the TDD mode having the low chip rate in both uplink and downlink Synchronization, random access, beamforming (optional), etc. are different or additionally required procedures from TDD mode with high chip rate (3.84 Mbps or more).

In particular, the sub frame structure in the TDD mode having a low chip rate has technical considerations for beamforming or uplink synchronization described above.

The radio frame in the TDD having the low chip rate is 10ms long, and the radio frame is composed of two subframes 5ms (6400 chips) long. In addition, the subframe is divided into seven standard traffic time slots and three timeslots of special functions. In the TDD mode having a low chip rate, the subframe structure is appropriately configured as an uplink or a downlink time slot. They can be divided into symmetrical or asymmetrical structures.

In this case, each of the seven slots is given a slot number (TsN; N is an integer increasing from 0 to 6), wherein the Ts0 time slot is a downlink and a Ts1 time slot is allocated uplink. In addition, three time slots with special functions are located between the time slots of Ts0 and Ts1. A guard period (GP) and a downlink pilot time slot (DwPTS) are located in a subframe. It is fixedly located after the Ts0 time slot so that the user does not lose synchronization, and the base station Node B performs the synchronization procedure (via the DwPTS channel). It also prevents users transmitting Uplink Pilot Time Slots (UpPTSs) from disturbing users transmitting DwPTS of other users.

As described above, in the TDD mode having a low chip rate, transmission of DwPTS, GP, or UpPTS in a subframe is important for synchronization of a transmitting / receiving terminal, and standardization work is ongoing.

However, in the method of using the downlink fast physical access channel (FPACH) by the base station Node B receiving the UpPTS, the response signal for the UpPTS is not a state that has been proposed. .

Accordingly, an object of the present invention is to provide a channel coding apparatus in a time division duplex mode for a high speed physical access channel used for performing a synchronization procedure between a user and a base station. will be.

According to a method feature of the present invention for achieving the above object, to output a predetermined number of bits of control information bits to be transmitted in response to any access attempt of a particular user divided into an even-numbered bit string and an odd-numbered bit string A serial-to-parallel converter, a plurality of first multipliers for respectively multiplying the codes assigned to a particular user to the different bit streams, a second multiplier for multiplying any one bit string with a complex component, the first multiplier, and a second multiplier An adder for synthesizing and outputting the output bit streams, a code multiplexer for multiplexing the synthesized bit streams with synthesized bit streams of other users, a third multiplier for multiplying the code multiplexed bit streams with a channelization code; Time multiplexing the bit stream output from the third multiplier and the midamble bit stream by time multiplexing and outputting the same; Group, and to the time when the multiplexed bit stream being comprised of a fourth multiplier for a predetermined number of channels multiplied by the identification code of the control information cell to be bit to be transmitted.

Preferably, the control information bits include information on whether a specific user accesses a base station, adjustment command information on an uplink signal transmission timing, adjustment command information on an uplink transmission power, and any access attempt. The control information bits are divided into 10 bits and input to the serial-to-parallel converter.

In addition, bits including the same type of control information for each user are included in the burst symbol unit of any one of the predetermined channels, and a symbol after any one of the bits of the control information bits is modulated is FIS. , For integers greater than 0, x, y, m, n, FISx, y represents the x-th control information symbol for the y-th user, Hm, n is the n-th bit in the m-th specific code sequence of the predetermined code sequence When [x] represents a maximum integer not exceeding x, the burst symbol of any one of the predetermined channels is " Is obtained by relationship.

Hereinafter, a configuration and an operation according to an exemplary embodiment of the present invention will be described with reference to the accompanying drawings.

1 is a diagram illustrating a radio frame structure in a general 1.28 Mcps time division duplex (TDD) mode.

Referring to FIG. 1, a radio frame in a TDD mode having a low chip rate has a length of 10 ms, and the radio frame includes two sub frames having a length of 5 ms (6400 chips). The subframe is divided into seven traffic slots and three time slots with special functions. In the TDD mode having a low chip rate, the frame structure is appropriately divided into uplink or downlink time slots so that a symmetrical or asymmetrical structure is provided. Can be operated. In this case, each of the seven slots is given a slot number (TsN; N is an integer increasing from 0 to 6), wherein the Ts0 time slot is a downlink and a Ts1 time slot is allocated uplink. In addition, three time slots with special functions are located between the time slots of Ts0 and Ts1. A guard period (GP) and a downlink pilot time slot (DwPTS) are located in a subframe. It is fixedly located after the Ts0 time slot so that the user does not lose synchronization, and the base station Node B performs the synchronization procedure (via the DwPTS channel). It also prevents users transmitting Uplink Pilot Time Slots (UpPTSs) from disturbing users transmitting DwPTS of other users.

FIG. 2 is a diagram illustrating a structure of an UpPTS among time slots constituting the radio frame shown in FIG. 1.

Referring to FIG. 2, the UpPTS includes a SYNC1 field (128 chips) and a GP field (32 chips). The UpPTS is a time slot having a total length of 125us, and a user may send the UpPTS once every 5ms subframe. Here, SYNC1 is composed of an orthogonal gold sequence of 128 chips, and eight orthogonal gold codes having a code length of 8 per base station (or cell) are allocated.

After measuring transmission timing and power level of the UpPTS, the base station Node B issues transmission timing adjustment and power adjustment command through a downlink fast physical access channel (FPACH). This information allows the user to signal at the correct transmission timing and power over the physical random access channel (PRACH) in uplink.

Similarly, in the frequency division duplex (FDD) mode, there are 16 preambles in each cell, so that a preamble can be arbitrarily selected in a selected access slot and then acquired through an acquired indicator channel (AICH). Receive ACK and NACK information for the preamble, and if the ACK is sent an access message. In addition, in the case of 1.28 Mcps, there are 8 SYNC1 codes per cell, so the user knows the available SYNC1 code among the information on the current cell through broadcast information, and randomly selects one of them and then uses the UpPTS to perform the base station (Node B). To transmit.

In summary, when a user selects a SYNC1 code available in a cell through broadcast information and transmits it to UpPTS and transmits it to a base station Node B, the base station Node B checks the SYNC1 code of the UpPTS and then the user selects the SYNC1 code. A code is used to determine whether data can be transmitted.

If the user can use the SYNC1 code transmitted through the UpPTS, the Node B transmits ACK information about the UpPTS and information necessary for random access of the user to the user through the FPACH.

That is, the FPACH includes information on uplink transmission timing adjustment and power adjustment in addition to ACK or NACK information about UpPTS of a randomly accessed user, and information on how many subframes before the upPTS.

The FPACH is assigned to downlink slots in subframes as is known. Therefore, using the same burst type as the dedicated physical channel (DPCH) and reverse access channel (RACH), as described above, the FPACH should carry at least the following five pieces of information. That is, acknowledgment information about the SYNC1 code of the UpPTS transmitted by the users for random access, ACK or NACK information including whether access to the user who attempted the random access, and adjustment of the transmission timing of the user during uplink Command information, information on the coordination command for uplink power, and information about which UpPTS the FPACH currently sent from the base station (Node B) indicates the FPACH command.

In general, eight SYNC1 codes are assigned to each cell, so that an orthogonal code having a code length of 8 corresponds one to one with eight SYNC1 codes. This is because the SYNC1 code is 128 chips long, so it is much more efficient to distinguish SYNC1 by its length 8. This orthogonal code SYNC1 includes ACK or NACK information including whether access to the user who attempted the random access, adjustment command information for uplink transmission timing of the user, and adjustment command for power during uplink The user can access the SYNC1 code sent by the user for random access via the FPACH by overwriting it with information about the FPACH currently sent from the Node B, and which UpPTS command indicates the FPACH. Receive ACK or NACK information indicating whether the transmission timing and power, and when the FPACH for the sent UpPTS can be known.

FIG. 3 is a diagram illustrating a burst structure of standard traffic time slots among time slots constituting the radio frame shown in FIG. 1.

As shown in FIG. 3, since the FPACH has a total data area of 704 chips, when the spreading factor (SF) is 16, the FPACH may include a total of 88 burst symbols. Thus, an orthogonal code having a code length of 8 is represented. 11 bits of control information can be represented.

Here, the midamble (144 chips) is a field necessary for maintaining uplink synchronization. The base station estimates the power level and the shifted transmission timing by measuring the midamble field of each user located in the same slot. To be able. In addition, by transmitting synchronization shifting and power control signals on the next downlink time slot, uplink synchronization is maintained by allowing the user to appropriately adjust the transmission (Tx) transmission timing and transmission power level.

4 is a diagram illustrating a method for mapping a fast physical access channel (FPACH) when the spreading factor (SF) is 16 according to the present invention.

 As described above, the ACK or NACK information including whether access to the user who attempted random access, whether to adjust the transmission timing of the user and the information about the adjustment command for power during the uplink, A case in which a control information bit (FPACH indicator) including information on which UpPTS is a command indicating an FPACH for the UpPTS is configured with 11 bits or more when SF is 16. Assume That is, when a quadrature phase shift keying (QPSK) modulation scheme is applied to generate one FPACH, when the spreading factor is 16, a total of 88 FPACH information bits (hereinafter, abbreviated as FIB) per user may be transmitted. Therefore, an 11-bit FPACH indicator may be masked and sent to one of the orthogonal code sets having a code length of 8. Therefore, when the FPACH indicator bit set in the system is set to 11 or more bits, as shown in Figure 4, the FPACH indicator bit should be mapped to the N FPACH transmitted. Generation of N FPACHs according to this principle is performed by the configuration as shown in FIG.

5 illustrates apparatuses for fast physical access channel (FPACH) coding according to QPSK when the spreading factor is 16 according to the present invention.

It is assumed that the present invention transmits 10 bits to each user through one FPACH with respect to the 11-bit or more control information (FPACH indicator) bit string generated to provide the above control information to each user through the FPACH. Accordingly, FIG. 5 illustrates a 10-bit FPACH indicator bit to be transmitted to each user, divided into I (Inphase) and Q (Quadrature) bits, that is, a serial-to-parallel converter for dividing and outputting the even and odd bits. 109) and one or more first multipliers 106,108 that multiply each of these I, Q bits by a SYNC1 (SYNC1 code required from a particular user among 8 allocated SYNC1 codes per cell) code transmitted from the particular user to the base station via UpPTS. ), A second multiplier 107 for multiplying the Q bit by the SYNC1 code, and a complex component again, a bit obtained by multiplying the I bit by the SYNC1 code, and a bit by which the complex component is multiplied by 5 symbols. There are symbol generators 110a-110h for each user, which are configured as an adder 105 for outputting the. In addition, a code multiplexer 104 for multiplexing the output bit streams of the symbol generators 110a to 110h and another type of channel allocated to downlink by multiplying the multiplexed bit streams with a channelization code Or a third multiplexer 103 for distinguishing from channels allocated to one or more FPACHs, and a time multiplexer for time-multiplexing and outputting the output bit stream and midamble bits of the third multiplier 103 ( There are N FPACH blocks 110_1 to 110_N that are composed of 102. In addition, the multiplier includes a fourth multiplier (101_1 to 101_N) that multiplies the time-multiplexed bits of the N blocks (110_1 to 110_N) by the scrambling code so that a user can identify which cell is coming from.

The channelization codes multiplied by the third multiplier 103 use different channelization codes to distinguish each FPACH.

The FPACH burst symbol generation process in FIG. 4 is performed by the following equation and procedure.

First, information allocated to the time slot of the FPACH in the 1.28 Mcps TDD mode is represented by a FIACH indicator (FI) as the control information described above. The FI has a size of 11 bits or more when the spreading factor SF is 16. The information indicated by this FIS is as follows.

1 FI bit is required for ACK and NACK indicating whether access to the SYNC1 code detected through the UpPTS transmitted by the user who attempted random access. Also, information on a synchronization shift of 1.28 Mcps TDD for adjusting uplink transmission timing of a user who attempted random access (k is determined at a higher level),

For example, 2 FI bits are needed to indicate information about no change. In addition, 1 FI bit is required to provide information for determining whether to increase or decrease power adjustment during uplink of a user who attempts random access. Finally, 1 FI bit (before 1 subframe and 2 subframes) indicating whether the FPACH currently received is ACK or NACK for UpPTS sent before a few subframes is required. In addition, the control information may include more control information according to the request of other users.

6 is a diagram illustrating a burst structure of a fast physical access channel (FPACH) time slot when the spreading factor (SF) is 16 according to the present invention.

As shown in FIG. 6, symbols a0, a1,..., A39 having a real value are different from each other in the control information of users who have attempted random access to a base station Node B as shown in Equation 1 below. Orthogonal codes are multiplied, and bits having the same index (column bits) of each multiplied bit string are synthesized with each other to form one burst symbol, which is transmitted in a burst of a time slot transmitted in FIG. .

That is, in FIG. 6, the burst symbols include the one or two bits of FIS control information in eight units and simultaneously transmit the same kind of control information for multiple users in the same burst symbol.

In Equation 1, FISx, y is an indicator of the x-th FPACH of any y-th user who attempted access, and Hm, n is an m-th Hadamard sequence of eight Hadamard sequences associated with the SYNC-UL code used for UpPTS. nth element.

Here, the FIS indicates a symbol value after the FIB (FPACH information bits) such as transmission timing adjustment, power adjustment, access ACK or NACK, and associated frame number carried on the FPACH is modulated by the QPSK modulation scheme. When 64 QPSKs are not used in the burst structure shown in FIG. 6 when QPSK is applied as described above, these 64 chips are treated as padding bits or GP.

The access confirmation command of the base station Node B with respect to the user who attempted the random access is a kind of L1 (physical layer) control signal and informs the user who attempted the access whether or not the access is possible. The coding of the access confirmation command is shown in Table 1 below.

Access check command Access check coding meaning ACK One Use required SYNC1 code NACK 0 Requested SYNC1 code not available

The time adjustment command for the user who attempted the random access is a kind of L1 control signal that allows the user to adjust the transmission time in the uplink. The coding of the time adjustment command is shown in Table 2.

Time adjustment Time adjustment bit meaning fast 11 k / 8Tc faster slow 01 k / 8Tc slow down

The power adjustment command for the user who attempted the random access is a kind of L1 control signal that allows the user to adjust the uplink power level. The coding of the power adjustment command is shown in Table 3.

Power regulation Power adjustment bit meaning Highly One Higher Uplink Transmission Power low 0 Lower uplink transmit power

The relative frame number command for the user who attempted the random access is a kind of L1 control signal indicating whether the FPACH now being sent to the user is a response to UpPTS before a sub-frame. The coding of the relevant frame number commands is shown in Table 4 or Table 5.

Associated Frame Number Associated Frame Number Bit meaning 1 sub-frame One FPACH for UpPTS 1 subframe 2 sub-frames ago 0 FPACH for UpPTS before 2 subframes

Associated Frame Number Associated Frame Number Bit meaning 1 sub-frame 11 FPACH for UpPTS 1 subframe 2 sub-frames ago 10 FPACH for UpPTS before 2 subframes

3 sub-frames 01 FPACH for 3P subframe UpPTS 4 sub-frames 00 FPACH for 4P subframe UpPTS

As described above, the present invention has been presented in a method of operating FPACH and coding of data carried in the FPACH, which are not currently implemented in the 3GPP 1.28Mcps TDD standardization document. This FPACH should include not only the role of AICH of FDD but also uplink synchronization and uplink power adjustment. In the present invention, the spreading factor and the channel structure available at 1.28Mcps can be used to realize the required operation of the FPACH, and the FPACH structure and coding that can be loaded later can be loaded with other data information.

Those skilled in the art will appreciate that various changes and modifications can be made without departing from the spirit of the present invention.

Therefore, the technical scope of the present invention should not be limited to the contents described in the examples, but should be defined by the claims.

1 illustrates a radio frame structure in a typical 1.28 Mcps time division duplex (TDD) mode.

FIG. 2 is a diagram illustrating a structure of an UpPTS among timeslots constituting a radio frame shown in FIG. 1. FIG.

FIG. 3 is a diagram illustrating a burst structure of standard traffic time slots among time slots constituting the radio frame shown in FIG. 1; FIG.

4 is a diagram illustrating a method for mapping a fast physical access channel (FPACH) when the spreading factor (SF) is 16 according to the present invention.

5 illustrates apparatuses for fast physical access channel (FPACH) coding according to QPSK when spreading factor (SF) is 16 in accordance with the present invention.

6 is a diagram illustrating a burst structure of a fast physical access channel (FPACH) time slot when the spreading factor (SF) is 16 according to the present invention.

* Description of the symbols for the main parts of the drawings *

101_1 ~ 101_N: fourth multiplier

102: time multiplexer

103: third multiplier

104: code multiplexer

105: adder

106,108: first multiplier

107: second multiplier

109: Serial to Parallel Converter

110a ~ 110h: symbol generators

110_1 ~ 110_N: FPACH blocks

Claims (5)

A serial-to-parallel converter for dividing a predetermined number of control information bits to be transmitted in response to an arbitrary access attempt of a specific user into an even-numbered bit string and an odd-numbered bit string; A plurality of first multipliers for respectively multiplying the different bit strings by codes assigned to a specific user; A second multiplier for multiplying any one bit string by a complex component; An adder for synthesizing and outputting the bit strings output from the first multiplier and the second multiplier; A code multiplexer for multiplexing the synthesized bit strings with synthesized bit strings of other users; A third multiplier for multiplying the code multiplexed bit streams with a channelization code; A time multiplexer for time multiplexing the bit stream output from the third multiplier and the midamble bit stream; And And a plurality of fourth multipliers corresponding to a predetermined number of channels multiplying the time-multiplexed bit strings by an identification code of a cell in which the control information bits are transmitted. The control information bits of claim 1, wherein the control information bits include information on whether a specific user accesses a base station, adjustment command information on an uplink signal transmission timing, adjustment command information on an uplink transmission power, And channel information in the time division duplex mode. The channel coding apparatus of claim 1, wherein the control information bits are inputted to the serial-to-parallel converter by dividing the control information bits of a specific user by 10 bits.        The channel coding apparatus of claim 1, wherein bits including the same type of control information are included for each user in units of burst symbols of any one of the predetermined channels. 5. The method of claim 4, wherein a symbol after any one of the bits of the control information bits is modulated is FIS, and for integers x, y, m, and n equal to or greater than 0, FISx, y is the xth control information for the y th user. Any one of the predetermined channels when a symbol is represented, and Hm, n represents an nth bit in the mth specific code sequence of predetermined code sequences, and [x] represents a maximum integer not exceeding x The burst symbol of " &Quot; Channel coding apparatus in time division duplex mode, characterized by the relation.