KR100510442B1 - A method for forming double layered-silicide and a mos transistor having self-aligned silicide - Google Patents

Abstract

A silicide formation method capable of forming a matched flat and smooth silicide layer at low temperature and a MOS transistor having a self-aligned silicide are described. This silicide forming method comprises the steps of forming a silicide metal layer on a silicon layer, forming an intermediate metal layer on a metal film, and heat-treating the resultant, thereby forming a silicide / alloy layer by a film inversion. And forming a silicide at a lower portion of the MOS transistor, the MOS transistor comprising: a gate electrode formed on the semiconductor substrate, a source / drain formed on the semiconductor substrate on both sides of the gate electrode, and an upper surface of the gate electrode; It is formed on the surface of the source / drain and consists of a double layer silicide having cobalt (Co) as an upper layer and hafnium (Hf) as a lower layer.

Description

Method for forming double layered-silicide and a MOS transistor having self-aligned silicide

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a method for manufacturing a semiconductor device and a semiconductor device, and more particularly, to a silicide forming method and a self-aligned silicide capable of simultaneously forming a self-aligned double layer structure silicide on a gate and a source / drain. The present invention relates to a MOS transistor.

Since silicide, a compound of a refractory metal and silicon (Si), has a lower specific resistance than doped polysilicon, it is currently widely used as a material for lower wiring and gate electrodes instead of polysilicon in memory devices. Salicide (Salicide; Self-Aligned Silicide), which is a structure in which the gate and source / drain of a transistor is self-aligned at the same time, is used in logic circuits and ASIC circuits that require faster operating speed than memory circuits. . Moreover, the MOS devices that make up the logic or ASIC circuits are not only very important to the operation speed but also less susceptible to junction leakage currents that are likely to occur in the salicide structure, so that the salicide structure is more advantageous in the future operation speed. There is a strong tendency to adopt.

It is known that titanium silicide (TiSi2) and cobalt silicide (CoSi2) are the most powerful materials for realizing the salicide structure, and these two silicides have a lower resistivity and higher 800 ° C or more than other silicides. It can withstand high temperature processes. This fact is more advantageous in that even after silicide is formed, reflow of an interlayer insulating film such as Boro-PhosphoSilicate Glass (BPSG) formed thereon is possible. Among them, titanium silicide (TiSi2) has a relatively low specific resistance, is more resistant to hot carrier degradation than polysilicon gate electrodes, and has been widely used due to the advantages of stable silicide reaction. Although being used, the replacement with other silicides is considered in the future due to several disadvantages.

First, when silicide is formed, there is a high possibility that a short circuit occurs between the gate and the source / drain due to the growth of silicide in the horizontal direction and undesired reaction of titanium (Ti) with a silicon oxide film (SiO 2) used as a spacer. The silicon oxide film spacer formed on the side of the gate electrode is made for the purpose of separating the silicided gate and the source / drain, but its width is only 2,000 mW to 3,000 mW. Therefore, when silicide grows laterally when polysilicon of the gate is silicided, a short circuit occurs by forming a bridge between the gate and the source / drain.

Second, the titanium silicide (TiSi2) in contact with silicon can maintain the thermal stability of the material itself up to 900 ℃, but if the process temperature exceeds 800 ℃, the contact resistance to P + -silicon becomes too large. The contact resistance value for P + -silicon is 10-5 m 2 at 800 ° C. and 10-3 m 2 at 900 ° C. The reason for the high contact resistance is that boron (B) rapidly diffuses from the source / drain of the PMOS transistor to the silicide of the upper layer, and the dopant is depleted at the interface of the silicide / silicon junction.

Third, since titanium (Ti) has a very high oxidation tendency, a silicide treatment heat treatment process must be performed in an oxygen-free atmosphere during heat treatment. Therefore, there is a difficulty in controlling so that the concentration of oxygen or moisture in the nitrogen (N2) atmosphere is 5 ppma or less.

Fourth, if the current flowing through the contact in the contact structure of aluminum (Al)-titanium nitride (TiN)-titanium silicide (TiSi2)-silicon exhibits a thermal effect of 465 DEG C or more, poor electromigration is more likely. It is possible to occur quickly, and in some cases, even at lower temperatures, the contact may be damaged by thermal stress, resulting in poor contact-migration.

Fifth, a defect may occur at the edge of the titanium silicide (TiSi2) layer due to the stress in the titanium silicide (TiSi2) layer. Reportedly, when the thickness of the titanium silicide (TiSi2) film exceeds 1,000 kPa, such defects start to occur.

Sixth, when a titanium silicide (TiSi2) contact is made in a junction where the junction depth is 0.2 μm or less, when too thick titanium film of 700 Å or more is used, silicon is excessively consumed and the interface becomes rough, resulting in leakage current and contact resistance. Increasing problems may arise.

Compared with the problems of titanium silicide (TiSi2) as described above, cobalt silicide (CoSi2) not only has a low resistivity. Because of its excellent stability at high temperatures, very low reactivity with oxides and very low dependence on dopants, it is possible to maintain a constant contact resistance in any device of an NMOS or PMOS transistor. The various advantages of such cobalt silicide (CoSi2) will be described in detail as follows.

First, cobalt silicide (CoSi 2) is relatively low in resistivity (16-18 μm / cm) and stable at high temperatures. Since cobalt silicide (CoSi2) in contact with silicon is stable to about 850 ° C, a glass reflow process may be performed at a temperature near 900 ° C.

Second, unlike in the case of titanium silicide, since cobalt (Co) is the main diffuser, silicide is formed in the horizontal direction and a short circuit occurs between the gate and the source / drain, or silicide penetrates under the silicon oxide layer. Since there is no problem of enchroachment, only one annealing step can form stable cobalt silicide by reaction between cobalt and silicon.

Third, the cobalt silicide (CoSi2) -silicon (Si) contact portion is relatively smoother than titanium silicide, and the contact resistance of the N + -silicon and P + -silicon is 15 Ωcm2, which is considerably low.

Fourth, the contact can be successfully formed for both N-type and P-type shallow junctions, and once the silicide is formed, the doping profile in the junction does not change. Therefore, it can be seen that cobalt silicide (CoSi2) is more advantageous in terms of the behavior of such dopants.

Fifth, cobalt silicide (CoSi2) is less sensitive to plasma etching than titanium silicide (TiSi2). Therefore, even when over-etching when forming a contact hole in the doped oxide layer of the upper layer, the loss of silicide hardly occurs, and therefore the leakage current due to plasma damage is also small.

Sixth, when titanium silicide (TiSi2) is formed in a nitrogen atmosphere, titanium nitride (TiN) is also generated to some extent, whereas no other competing reaction occurs when cobalt silicide (CoSi2) is formed.

Finally, cobalt silicide (CoSi2) exhibits less shear stress than that of titanium silicide (TiSi2) of the same thickness.

As described above, when cobalt silicide (CoSi2) is simultaneously formed not only in the gate but also in the source / drain regions, it is more advantageous in many aspects, such as stability at high temperatures as well as operating speed. However, this cobalt silicide (CoSi2) structure is to be applied to mass production in order to control each reaction interface, to properly control the silicidation reaction at the gate and the source / drain electrodes, and in particular, when the metal and the silicide are in contact. There are important problems to be solved first, such as prevention of reaction at the interface. This will be described in more detail.

First, the problem at the time of silicidation reaction is demonstrated.

The salicide process simultaneously forms silicides on both the gate and the source / drain, so that it is difficult to form a silicide layer of appropriate thickness in both regions in one process. In the gate side, a thick silicide layer should be formed to show low wiring resistance, while in the source / drain region, a thin silicide layer should be formed as much as possible to prevent the breakage of the shallow junction due to excessive consumption of silicon in the substrate.

In order to solve this problem, a method of introducing a two-step process of forming a relatively thick silicide layer on the gate side first and then forming a thin silicide layer in the source / drain junction region in a later step has been proposed (Reference; MRS). Symposium Proc. 311, 263, 1993, author; Y. Matsubara, K. Noguchi and K. Okumura).

In addition, the problem of keeping the interface between silicide and silicon flat is also very important. In general, the use of a single silicide layer structure tends to result in a bumpy interface between silicide and silicon. In particular, cobalt silicide (CoSi2) is severe, which means that cobalt does not reduce the silicon oxide film, so that when the natural oxide film is present on the silicon substrate, the silicided reaction does not occur uniformly over the entire interface and is concentrated in areas where the natural oxide film is weak. Because it happens. This reduces the effective cross-sectional area through which current can flow, resulting in non-uniform sheet resistance and high contact resistance, and leakage current due to Fowler-Nordheim (FN) tunneling at highly curved interfaces when a strong reverse field is applied to the junction. Since it is easy to generate | occur | produce, there is a high risk of junction leakage at a junction interface.

In addition, when the interface is rugged, thermal instability is aggravated, resulting in more agglomeration of the silicide thin film. Originally, when thermal energy is applied to a thin film, in order to minimize interfacial energy, silicide's grain boundary meets silicon, so-called thermal grooving occurs at a triple point. This isolation results in a break in continuity of the grains, which is called agglomeration. This agglomeration further exacerbates the above problem. Therefore, the surface of silicon and polysilicon may be treated with dilute hydrofluoric acid (HF) solution or in-situ sputter etch before the wafer is placed in the sputter chamber to keep the reaction interface clean. Should be removed,

In addition, the reaction stability at the interface between the upper wiring layer and the silicide is also a problem. The maximum annealing temperature that can be applied to the aluminum (Al) and cobalt silicide (CoSi2) contacts currently used as the upper interconnection layer is 400 ° C. At higher temperatures, the cobalt silicide (CoSi2) reacts with aluminum (Al). Heat treatment at high temperatures requires the insertion of a diffusion barrier layer such as titanium nitride (TiN) or tungsten-titanium (TiW) between the cobalt silicide (CoSi2) and aluminum (Al) layers.

Several solutions have been proposed so far to improve the above problems of cobalt silicide (CoSi2). Among them, the use of a cobalt / metal double layer silicide structure has attracted much attention.

The cobalt / metal bilayer silicide structure not only makes the interface of the silicide-silicon substrate flat, smooth and epitaxy, but also controls the degree of silicide reaction in the middle to prevent excessive consumption of the substrate silicon to maintain shallow bonding. In addition, it is possible to produce a compound or alloy layer that can be used as a diffusion barrier on top of the silicide formed by controlling in a heat treatment atmosphere.

Accordingly, the technical problem to be achieved by the present invention is to adopt a cobalt (Co) / metal double layer structure as an electrode material when silicidizing the gate and the source / drain of a MOS transistor, which is a main component of a logic circuit or an ASIC. The present invention provides a method of forming a silicide that can form a matching cobalt silicide electrode and minimize the deterioration of the device due to high temperature heat treatment by lowering the silicide heat treatment temperature as much as possible.

Another object of the present invention is to provide a MOS transistor having a self-aligned silicide.

In order to achieve the above object, the silicide forming method of the present invention includes forming a silicide metal layer on a silicon layer, forming an intermediate metal layer on the metal film, and heat-treating the resultant to invert the film. By forming a silicide in the lower portion of the bilayer consisting of a silicide / alloy layer.

The silicide metal layer is formed of cobalt (Co), and the intermediate metal layer is formed of hafnium (Hf), and preferably formed to have a thickness of 50 kPa and 150 kPa, respectively. In the forming of the silicide, it is preferable to use a rapid heat treatment (RTA) process.

In order to achieve the above object, the method of forming silicide according to the present invention also includes forming a gate electrode on a semiconductor substrate, forming a source / drain on the semiconductor substrate, and forming a silicide metal layer on the resultant. And forming an intermediate metal layer on the metal layer, heat-treating the resultant to form a silicide under the bilayer consisting of the silicide / alloy layer by analyser inversion, and the silicide / alloy layer. Removing the double layer to form a matching silicide only on the surfaces of the gate electrode and the source / drain.

The silicide metal layer is formed of cobalt (Co), and the intermediate metal layer is formed of hafnium (Hf), and preferably formed to have a thickness of 50 kPa and 150 kPa, respectively. In the forming of the silicide, it is preferable to use a rapid heat treatment (RTA) process.

According to another aspect of the present invention, a MOS transistor includes a gate electrode formed on a semiconductor substrate, a source / drain formed on semiconductor substrates on both sides of the gate electrode, an upper surface of the gate electrode, and the source. It is formed on the surface of the / drain, characterized in that it comprises a double layer silicide having cobalt (Co) as the upper layer and hafnium (Hf) as the lower layer.

Preferably, the cobalt (Co) has a thickness of about 150 GPa, and the hafnium (Hf) has a thickness of about 50 GPa, and a sidewall of the gate electrode further includes a spacer for insulating the gate electrode and the source / drain. It is preferable.

According to the present invention, when a silicide layer is simultaneously formed on a gate and a source / drain of a MOS device using cobalt silicide, a silicide layer formed by adopting a double layer structure of cobalt / heat-resistant metal as a source / drain electrode is used. In combination with the resulting silicide-silicon interface.

Hereinafter, the present invention will be described in more detail with reference to the accompanying drawings.

As already mentioned, the cobalt / metal bilayer silicide structure not only makes the interface of the silicide-silicon substrate flat, smooth and epitaxial, but also controls the degree of silicide reaction in the middle, thereby overusing the silicon of the substrate. To prevent shallow joints. In addition, by controlling the heat treatment atmosphere, it is possible to produce a compound or an alloy layer that can be used as a diffusion barrier on the formed silicide. The bilayer silicide structure of cobalt / metal is described in more detail.

Suitable materials for the cobalt / metal double layer silicide structure are refractory metals such as titanium (Ti), zirconium (Zr), vanadium (V), hafnium (Hf), niobium (Nb), and tantalum (Ta). A thin refractory metal is first deposited on a silicon substrate, and a thin layer of cobalt is deposited on the silicon substrate to form a double layer of cobalt / refractory metal, and then thermally treated in a nitrogen atmosphere by a rapid thermal annealing (RTA) method to cobalt / refractory metal. It is possible to form a double layer silicide structure. Layer inversion of the film because the silicided temperatures of the refractory metals are higher than that of cobalt, cobalt is the main diffuser in the formation of cobalt silicide, and the diffusion coefficient of cobalt is larger than that of refractory metal or silicon. This happens. The silicide forming mechanism due to the membrane reversal will be described in more detail.

Since the oxidative propensity of refractory metals has a higher oxidative propensity of silicon, these metals first remove the natural oxide film on the surface of the silicon substrate to clean the surface, and then cobalt diffused through the metal layer and reaches the surface of the substrate. And react to form cobalt silicide. At this time, the lattice mismatch between cobalt silicide and silicon is only 1.2%, and since the refractory metal first removes the oxide film on the surface of the silicon substrate to make the surface clean, it is easy to form a cobalt silicide matching thin film. When such epi growth occurs, the thermal stability of the silicide layer is greatly improved.

As mentioned, flat matched silicide thin films are very important in many respects and simply cannot be obtained simply by treating with hydrofluoric acid or removing the native oxide film by in-situ sputter etching. . Several methods have been proposed to form cobalt silicide-matched thin films.

1) Method using high vacuum molecular beam epitaxy (MBE).

2) Method of injecting cobalt ions into silicon substrate in high vacuum and then heat-treating it.

3) Representative methods are a method of forming a cobalt silicide epilayer by ion implantation of silicon into the cobalt silicide layer formed through electron beam evaporation and heat treatment, followed by amorphous crystallization by heat treatment.

However, all of these methods are impractical because the production cost is too high for actual production. In addition, when the cobalt monolayer is used, the thickness of the silicon consumed when forming the cobalt silicide is 3.63 times the thickness of the cobalt, so that there is a risk that the shallow junction is broken. Therefore, when using a cobalt / metal double layer structure, the amount of cobalt that reaches the silicon substrate is limited by the intermediate refractory metal layer, thereby preventing breakage of the shallow junction due to excessive silicon consumption.

In addition, the nitride film formed during the silicidation heat treatment using the refractory metal moved to the surface due to the reversal of the film acts as a kind of diffusion barrier layer between the upper wiring layer and the cobalt silicide layer, and acts like a cover to aggregate the silicide film. It also plays a role in suppressing.

In order to obtain such an effect, the conditions that the refractory metal should have in the cobalt / metal double layer silicide structure are as follows.

1) Silicated by thermal method should be possible, that is, the oxidative tendency of refractory metal should be greater than that of silicon. Tungsten (W), molybdenum (M), and cobalt (Co) are metals that cannot be silicided by a thermal method because they cannot be reduced and removed even when heated. Therefore, these metals have a silicide / silicon interface that is rugged because silicide reaction occurs intensively through the weak part of the natural oxide film.

2) The suicided temperature of the refractory metal should be higher than the suicided temperature of cobalt (550 ° C.). If this condition is satisfied, cobalt silicide is preferentially produced so that reversal of the film may occur. Comparing the silicided temperature of each refractory metal is as follows.

Hafium (Hf)> Zirconium (Wr)> Niobium (Nb) ≒ Tantalum (Ta) ≒ Tungsten (W)> Vanadium (V) ≒ Titanium (Ti)> Cobalt (Co)> Molybdenum (Mo)> Chromium (Cr)

Therefore, in the case of molybdenum (Mo) and chromium (Cr), reversal of the film is impossible.

3) Refractory metals When forming silicides, refractory metals should not be the main diffuser. That is, silicon should be the main diffuser, so that the refractory metal does not diffuse backwards into the substrate during the heat treatment process. In fact, cobalt is the main diffuser and other refractory metals are not always the main diffuser. It doesn't work.

4) Because of the diffusion coefficient in refractory metals, the reversal should occur smoothly. However, refractory metals always satisfy this condition.

Therefore, in the above four aspects, among the various refractory metals, titanium (Ti), zirconium (Zr), vanadium (V; Vanadium), niobium (Nb), hafnium (Hf), tantalum (Ta), etc. This condition is satisfied.

Until now, the most attention was paid to Ti among these metals. This is because titanium (Ti) is a refractory metal most typically meeting the prerequisites mentioned above. However, as already confirmed, hafnium (Hf), as well as titanium (Ti), has a much higher oxidative tendency than silicon, so that it is possible to easily form a matched silicide film by sufficiently reducing the natural oxide film present at the interface with silicon. In addition, the silicided temperature is considerably higher than that of cobalt (Co), and the possibility of forming an intermetallic compound is very low, resulting in almost complete film reversal. Therefore, the sheet resistance of the final silicide layer is also very low. As such, the cobalt (Co) / hafnium (Hf) structure in many respects can be said to be an excellent cobalt / refractory metal pair to obtain a matching silicide. Advantages of the cobalt (Co) / hafnium (Hf) structure is as follows.

The oxidative tendency of hafnium (Hf) is relatively large compared to that of silicon (Si). This is theoretically shown by comparing the oxide production energies (ΔGf, oxide) of silicon oxide film (SiO2), cobalt oxide (Co3O4), and hafnium oxide (HfO2), respectively, in order of -204.69, -126.65 Hafnium oxide (HfO2) is the largest. This fact means that a cobalt silicide film may be formed by using a cobalt (Co) / hafnium (Hf) structure to cleanly remove the native oxide film of the silicide / silicon interface by RTA heat treatment alone.

In the semiconductor manufacturing process, the high temperature process can be reduced as much as possible to suppress the deterioration of the device due to temperature. In this regard, the lower the silicide heat treatment temperature, the more preferable.

1 is a graph showing the change of the sheet resistance of the cobalt (Co) / hafnium (Hf) double layer structure by the heat treatment, the surface resistance of the cobalt (Co) / hafnium (Hf) double layer structure is significantly lowered after the heat treatment at 600 ℃ Able to know. This rapid drop in sheet resistance after heat treatment at 600 ° C. is related to the formation of a stable cobalt silicide phase.

Figure 2 (a) to (d) is a heat treatment of the cobalt (Co) / hafnium (Hf) double-layer structure in the temperature range of 600 ~ 800 ℃ after using the WRD (X-ray diffraction) to make up the phase (phase) 3 (a) to (d) schematically show the layer structure change according to the heat treatment of the cobalt (Co) / hafnium (Hf) bilayer structure based on the result of FIG. 2. In FIG. 3, all of the superstructure except the cobalt silicide layer on the silicon substrate will be removed at the end of the process.

As can be seen from FIG. 2 and FIG. 3, it can be seen that the cobalt silicide phase has been greatly developed even at a heat treatment of 600 ° C., and thereafter, even though the heat treatment temperature is further increased, the overall phase configuration does not change significantly. This means that in the case of a cobalt (Co) / halfium (Hf) bilayer, the final cobalt silicide phase can be formed even after heat treatment at a temperature of 600 ° C. or lower, which is similar to that of a cobalt monolayer. Do. In particular, this is in view of the fact that in order to obtain a stable final cobalt silicide phase in the case of a bilayer of cobalt / titanium (Co / Ti) or cobalt / refractory metal, heat treatment at 700 to 800 ° C. or higher is required. It is a great advantage in that it can be silicided at a lower temperature while maintaining the advantage.

An embodiment of a method of manufacturing a transistor according to the present invention using a cobalt (Co) / hafnium (Hf) double layer structure having the above advantages will be described.

Example

4 to 7 are cross-sectional views illustrating a silicide formation process according to an embodiment of the present invention.

FIG. 4 illustrates a step of forming the bonding layer 15 of n + and p + by implanting acenic (As) and boron (B) ions onto the p-type or n-type silicon substrate 10, respectively.

In this step, a source and drain P-N junction formation process of a typical MOS transistor is used.

FIG. 5 illustrates the step of depositing a metal to form an interlayer metal and silicide on the bonding layer 15 in sequence.

Specifically, the intermediate layer metal 20 and the silicide metal 25 are sequentially deposited on the silicon substrate 10 on which the bonding layer 15 is formed by using electron beam vaporization or sputtering equipment. The interlayer metal 20 deposits hafnium (Hf) in a thickness of about 50 GPa among various refractory metals capable of reducing oxides, and cobalt (Co) about 150 GPa as the silicide metal 25. To a thickness of.

FIG. 6 illustrates a step of forming the cobalt silicide 30 in the lower portion of the bilayer by layer inversion by rapid heat treatment of the resultant.

Specifically, rapid heat treatment is carried out for 30 seconds in a vacuum atmosphere of about 550 ℃ maintaining a vacuum degree of 10-5torr or less. The resulting double layer silicide structure,

Cobalt silicide (CoSi2) layer 40 / Cobalt (Co)-hafnium (Hf)-silicon (Si) alloy layer 35 / matching cobalt silicide (CoSi2) layer 30 / bonding layer 15 and silicon ( Si) is the same as the substrate (10).

FIG. 7 illustrates a step of forming a cobalt silicide electrode 30 having a matching relationship with the silicon substrate by removing an upper layer of the structure using a selective etching solution.

Comparative example

(A) to (c) of FIG. 8 is the most common case of forming a cobalt / refractory metal double layer silicide, except that titanium (Ti) is used as an intermediate layer of the refractory metal, and the same process as described above is performed. The XRD spectrum of the cobalt bilayer silicide obtained is shown.

9 is a graph showing the sheet resistance change of the same structure.

These spectra and graphs show that in the case of cobalt (Co) / titanium (Ti) bilayers, unlike cobalt (Co) / hafnium (Hf) bilayers, heat treatment above 700-800 ° C is required for cobalt silicide (CoSi2) formation. Can be. In addition, when comparing the sheet resistance after silicide-ized heat treatment, the cobalt (Co) / titanium (Ti) bilayer (about 21 kW / cm 2) is higher than that of the cobalt (Co) / halfium (Hf) bilayer (about 9 kW / cm 2). It can be seen higher.

According to the silicide formation method according to the present invention, the cobalt (Co) / hafnium (Hf) double layer structure is adopted as a source / drain electrode in the formation of the salicide structure of the MOS device, and thus matching is performed at a lower temperature. To form a smooth and smooth silicide layer.

Although the embodiments of the present invention have been described in detail, the present invention is not limited thereto, and any modification or improvement may be made by those skilled in the art within the technical idea of the present invention.

1 is a graph showing a change in sheet resistance of a cobalt (Co) / hafnium (Hf) double layer structure by the heat treatment.

FIG. 2 is a diagram showing an XRD peak in a silicide reaction of a cobalt (Co) / hafnium (Hf) bilayer structure at each heat treatment temperature (600 ° C., 700 ° C., 800 ° C.).

FIG. 3 is a diagram schematically showing a cross section of the formation phase at each heat treatment temperature when cobalt silicide is formed using a cobalt (Co) / hafnium (Hf) bilayer structure.

4 to 7 are cross-sectional views illustrating a process of forming a matching silicide having a cobalt (Co) / hafnium (Hf) double layer structure according to an embodiment of the present invention.

8 is a view showing a phase change process of the XRD phase by the heat treatment of the cobalt (Co) / titanium (Ti) bilayer structure formed by a comparative example compared with the results of the present invention.

9 is a graph showing a change in sheet resistance according to the heat treatment of the cobalt (Co) / titanium (Ti) double layer structure.

Claims (7)

Forming a hafnium (Hf) layer on the silicon substrate; Forming a Co metal layer for silicide on the hafnium (Hf) layer; And And heat-treating the resultant at 600 ° C. or lower to form silicide under the bilayer composed of the silicide / alloy layer by analyser inversion. The method of claim 1, wherein the silicide Co metal layer and the hafnium (Hf) layer are formed to have a thickness of 50 kPa and 150 kPa, respectively. The method of claim 1, wherein forming the silicide, A silicide formation method having a double layer structure comprising a rapid heat treatment (RTA) process. Forming a gate electrode on the semiconductor substrate; Forming a source / drain on the semiconductor substrate; Forming a hafnium (Hf) layer on the resultant; Forming a Co metal layer for silicide on the hafnium (Hf) layer; Heat-treating the resultant at 600 ° C. or lower to form silicide at the bottom of the bilayer composed of the silicide / alloy layer by analyser inversion; And And forming a matching silicide only on surfaces of the gate electrode and the source / drain by removing the double layer formed of the silicide / alloy layer. The method of claim 4, wherein the silicide Co metal layer and the hafnium (Hf) layer are formed to have a thickness of 50 kPa and 150 kPa, respectively. The method of claim 4, wherein forming the silicide comprises: A silicide forming method comprising a rapid heat treatment (RTA) process. 5. The MOS of claim 4, further comprising a spacer formed on a sidewall of the gate electrode and insulating the gate electrode from a source / drain. transistor.

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