KR100510089B1 - Quadrature phase dectector - Google Patents

Abstract

A 90 degree phase detector is posted. The 90-degree phase detector of the present invention comprises: a first NOR gate for inverting and inverting a received first and second input signal; A second NOR gate integrating and inverting a phase inversion signal of the first input signal and the second input signal; An output stage for generating a predetermined phase control signal; A capacitor formed between the output terminal and a predetermined fixed voltage terminal; A first switch turned on in response to an output signal of the first NOR gate to change a voltage of the phase control signal in a first direction; And a second switch turned on in response to the output signal of the second NOR gate to change the voltage of the phase control signal in a second direction opposite to the first direction. According to the 90-degree phase detector of the present invention, it has a significant advantage in terms of required area, current consumption and operating speed.

Description

90 degree phase detector {QUADRATURE PHASE DECTECTOR}

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a phase detector, and more particularly to a 90 degree quadrature phase detector for detecting whether a phase difference between two input signals is 90 degrees.

In general, phase detectors measure the phase difference of two input signals to control the frequency, and a 90 degree phase detector is also required to provide a phase error signal corresponding to 90 degrees from the 90 degree phase relationship of the input signals.

1 is a view showing a conventional 90 degree phase detector, which is published in US Patent 5,825,209. The circuit of FIG. 1 compares the phases of two input signals VIN1 and VIN2 and displays the comparison results at the two output terminals VOUT + and VOUT-. 2A and 2B are diagrams for explaining the operation principle of the conventional 90 degree phase detector shown in FIG. 1, and the results are simplified. 2A illustrates a case where a phase difference between the second input signal VIN2 and the first input signal VIN1 coincides with 90 degrees. In the first section I, positive charge is stored in the first capacitor C11 to increase the voltage, and positive charge is discharged to the second capacitor C12 to decrease the voltage. In the second period II, the positive charge is discharged in the first capacitor C11 to decrease the voltage, and the positive charge is charged in the second capacitor C12 to increase the voltage. Therefore, as shown in FIG. 2A, when the voltages of the signals VOUT1 and VOUT2 of the two output terminals in the third section III coincide with each other, the phase difference between the two input signals VIN1 and VIN2 is 90 degrees. have.

On the other hand, as shown in FIG. 2B, when the phase difference of the second input signal VIN2 with respect to the first input signal VIN1 is greater than 90 degrees, the signals VOUT1, 2 of the two output terminals in the third section III. The voltage difference k1 of VOUT2) occurs. The phase difference between the first input signal VIN1 and the second input signal VIN2 is sensed by the magnitude and the sign of the voltage difference k1. In addition, the signals VOUT1 and VOUT2 of the output terminal control the voltage controlled oscillator (VCO) in a synchronous loop such as a phase locked loop (PLL) through the charge pump filter 15. The phase control signal VC is generated.

By the way, in the conventional 90 degree phase detector shown in FIG. 1, after the electric charge of the said 1st capacitor C11 and the 2nd capacitor C12 is fully charged / discharged, the signal VOUT1 of the 1st output terminal and the 2nd The voltage of the signal VOUT2 at the output terminal must be compared. Therefore, the 90-degree phase detector of Figure 1 has a problem that the operating speed is slow.

Accordingly, it is an object of the present invention to provide a 90 degree phase detector which improves the operating speed.

One aspect of the present invention for achieving the above technical problem relates to a 90 degree phase detector. The 90-degree phase detector of the present invention comprises: a first NOR gate for inverting and inverting a received first input signal and a second input signal; A second NOR gate integrating and inverting a phase inversion signal of the first input signal and the second input signal; An output stage for generating a predetermined phase control signal; A capacitor formed between the output terminal and a predetermined fixed voltage terminal; A first switch turned on in response to an output signal of the first NOR gate to change a voltage of the phase control signal in a first direction; And a second switch turned on in response to the output signal of the second NOR gate to change the voltage of the phase control signal in a second direction opposite to the first direction.

In order to fully understand the present invention, the operational advantages of the present invention, and the objects achieved by the practice of the present invention, reference should be made to the accompanying drawings which illustrate preferred embodiments of the present invention and the contents described in the accompanying drawings.

Hereinafter, exemplary embodiments of the present invention will be described in detail with reference to the accompanying drawings.

3 is a diagram illustrating a 90 degree phase detector according to an embodiment of the present invention. The 90 degree phase detector according to the present invention includes a first NOR gate 33, a second NOR gate 35, a first switch 37, a second switch 39, and a capacitor C41.

The first NOR gate 33 receives the first input signal VIN1 and the second input signal VIN2, and inverts the logic of the received first input signal VIN1 and the second input signal VIN2. do. The second NOR gate 35 inverts the phase inversion signal / VIN1 of the first input signal VIN1 and the second input signal VIN2 that are inverted in phase by the inverter 31. do.

The output signal VNET1 of the first NOR gate 33 controls the first switch 37, and the output signal VNET2 of the second NOR gate 35 controls the second switch 39. Preferably, the first switch 37 is an NMOS transistor formed between the power supply voltage terminal VDD and the output terminal N41, and the second switch 39 is the ground voltage terminal VSS and the output terminal N40. Is an NMOS transistor formed between the layers. The NMOS transistors implementing the first switch 37 and the second switch 39 have the same length and width in order to have the same electrical characteristics.

On the other hand, through the output terminal N40, the phase control signal VC which is the output signal of the 90 degree phase detector of this embodiment is provided. A capacitor C41 is formed between the output terminal N40 and the ground voltage terminal VSS, which is a fixed voltage terminal.

4A and 4B are diagrams for explaining the operation principle of the 90-degree phase sensor of the present invention in FIG. 4A illustrates a case where a phase difference between the second input signal VIN2 and the first input signal VIN1 coincides with 90 degrees. If both the first input signal VIN1 and the second input signal VIN2 are "low" in the second period II, the output signal VNET1 of the first NOR gate 33 is "high". ), And the output signal VNET2 of the second NOR gate 35 is " low ". At this time, the first switch 37 is "turned on", and the positive charge is stored in the capacitor C41, so that the voltage of the phase control signal VC is the power supply voltage VDD (in this specification, In one direction ').

Subsequently, when the first input signal VIN1 transitions to "high" in the third section III, the output signal VNET1 of the first NOR gate 33 becomes "low". The output signal VNET2 of the second NOR gate 35 is " high ". Then, the second switch 39 is "turned on", and the positive charge stored in the capacitor C41 is discharged, so that the voltage of the phase control signal VC is the ground voltage VSS (in this specification, The second direction).

Here, if the widths of the second section II and the third section III are the same, that is, the phase difference of the second input signal VIN2 with respect to the first input signal VIN1 is 90 degrees, as shown in FIG. 4A. As described above, the voltage of the phase control signal VC in the fourth section IV is maintained the same as in the first section I. Accordingly, the circuits controlled by the phase control signal VC maintain their previous state.

Meanwhile, as shown in FIG. 4B, when the phase difference of the second input signal VIN2 with respect to the first input signal VIN1 is greater than 90 degrees, that is, the width of the second section II is greater than the third section III. If the width is shorter than, the voltage of the phase control signal VC drops by k. As such, the voltage of the dropped phase control signal VC is such that a voltage controlled oscillator (VCO) or the like causes the second input signal VIN2 to have a phase difference of 90 degrees with respect to the first input signal VIN1. Is fed back.

The phase detector as in the present invention is an element for detecting the phase difference between two input signals, and is widely used in electronic systems such as computer systems. One of the circuits in which phase sensing is important is a phase locked loop (PLL). 5 is a view for explaining a typical example of applying the 90-degree phase detection of the present invention, showing a phase synchronization loop. In general, the phase locked loop includes a 90 degree phase detector 100 and a voltage controlled oscillator (VCO) 200. The 90-degree phase detector compares two input signals VIN1 and VIN2 and generates a phase control signal VC corresponding to the phase difference between the input signals VIN1 and VIN2. In this case, the first input signal VIN1 is a reference clock signal, and the second input signal VIN2 is an output signal of the VCO 200. The phase control signal VC is provided as a control signal for the VCO 200, and the frequency of the second input signal VIN2, which is a VCO output signal, is the frequency of the first input signal VIN1, which is a reference clock signal. And control the VCO 200 to match.

Although the present invention has been described with reference to one embodiment shown in the drawings, this is merely exemplary, and those skilled in the art will understand that various modifications and equivalent other embodiments are possible therefrom. Therefore, the true technical protection scope of the present invention will be defined by the technical spirit of the appended claims.

The 90-degree phase detector of the present invention as described above has the following advantages over the phase detector of the prior art.

First, the number of transistors is significantly reduced compared to the prior art having 15 or more transistors. Thus, the area required for implementing the 90 degree phase detector is significantly reduced.

Second, since a section in which the devices existing between the power supply voltage VDD and the ground voltage VSS are turned on at the same time does not occur, current consumption is reduced.

Third, the capacitor used in the 90-degree phase detector of the present invention does not require complete current charging and discharging in operation, thereby increasing the operation speed.

In order to more fully understand the drawings used in the detailed description of the invention, a brief description of each drawing is provided.

1 is a view showing a conventional 90 degree phase detector.

2A and 2B are diagrams for explaining the operation principle of the conventional 90-degree phase detector shown in FIG.

3 is a diagram illustrating a 90 degree phase detector according to an embodiment of the present invention.

4A and 4B are diagrams for explaining the operation principle of the 90-degree phase sensor of the present invention in FIG.

5 is a view for explaining a typical example of applying the 90-degree phase detection of the present invention, showing a phase synchronization loop.

Claims (3)

In a 90 degree phase detector, A first NOR gate inverting and inverting the received first input signal and the second input signal; A second NOR gate integrating and inverting a phase inversion signal of the first input signal and the second input signal; An output stage for generating a predetermined phase control signal; A capacitor formed between the output terminal and a predetermined fixed voltage terminal; A first switch turned on in response to an output signal of the first NOR gate to change a voltage of the phase control signal in a first direction; And And a second switch which is turned on in response to an output signal of the second NOR gate to change the voltage of the phase control signal in a second direction opposite to the first direction. According to claim 1, Wherein said first direction is a voltage rising direction and said second direction is a voltage falling direction. The method according to claim 1 or 2, Wherein the first switch and the second switch are NMOS transistors, each having the same electrical characteristics.