KR100495115B1 - Data path error detection apparatus and method in asynchronous transfer mode communication system - Google Patents

Abstract

The present invention relates to an apparatus and method for detecting a data path failure in an AMT-based communication system.

The present invention provides a control block for generating datapath diagnosis request information to confirm whether a datapath for a specific port or board is abnormal; And a physical layer processing unit for detecting an AMT cell flowing into or out of a specific port according to a data path diagnosis request of the control block and feeding it back to the control block.

Accordingly, the present invention provides a high-speed data transmission by providing a separate data path anomaly detection unit between the protocol processing unit and the serial connection processing unit for monitoring the ATM cell flowing into the physical layer processing unit in the ATM-based communication system. According to the system administrator's choice, the AMT cell leaked from the upper end to the specific port or the upper end from the corresponding port is fed back to the control block, and the controlled AMT cell is inspected in the control block. By checking the data path for a port, it is possible to check the data path for a specific port or board without compromising system performance during high-speed data transfer.

Description

Apparatus and method for detecting data path error in ATM-based communication system {DATA PATH ERROR DETECTION APPARATUS AND METHOD IN ASYNCHRONOUS TRANSFER MODE COMMUNICATION SYSTEM}

The present invention relates to a communication system, in particular, in a communication system based on ATM, in order to monitor ATM cells flowing into and out of the physical layer processor, a separate datapath anomaly detection unit is provided between the protocol processor and the serial connection processor. During the high-speed data transfer, the ATM cell leaked from the upper end to the specific port or the upper end from the corresponding port is returned to the control block, and the data path to the specific port or board is abnormal. An apparatus and a method for detecting a datapath anomaly in an AT based communication system.

FIG. 1 is a block diagram illustrating a configuration of a communication system based on a conventional Asynchronous Transfer Mode (ATM). As shown in FIG. 1, the physical layer processing unit 10 and the ATM layer are shown. Layer) processing unit 20.

In a general ATM based communication system, the physical layer processing unit 10 and the ATM layer processing unit 20 are controlled through an interprocessor communication with a control module (not shown) of an upper stage, and the physical layer processing unit ( 10) extracts an effective AT cell from the frame received through the optical path, and transfers the valid AT cell to the AT layer processor 20 connected through a serial line or received from the AT layer 20; Is transmitted in the STM (Synchronous Transfer Mode) -n frame to the outside through the optical path.

The AT layer processor 20 may multiplex and demultiplex the AT cells extracted by the physical layer processor 10, a virtual path identifier (VPI) and a virtual channel identifier (VPI) of each AT cell. It performs functions such as conversion of VCI, Virtual Channel Identifier, generation and extraction of AMT cell header, General Flow Control (GFC).

The physical layer processor 10 includes a protocol processor 11 and a serial connection processor 12 connected to a universal test and operation PHY interface for ATM (UTOPIA) interface, and the protocol processor 11 includes: Extract valid AT cells from frames received from multiple ports (Ports 0 to Port n) and transfer them to the serial connection processor 12 or transfer the AT cells received from the serial connection processor 12 to their destination ports. It plays a role.

In addition, the serial connection processor 12 converts the extracted effective AT cell into high-speed serial data and transmits it to the AT layer processor 20 or received from the AT layer processor 20. After confirming the abnormality of the high speed serial data, it transfers to the protocol processor 11 at the request of the utopia cycle of the desired port.

At this time, since the upper level control module (not shown) controls the physical layer processing unit 10 or AMT layer processing unit 20, the control module ( (Not shown) or the ATM layer processor 20 needs to check the state of the datapath as to whether data currently being transmitted is normally transmitted through the datapath, which is the physical layer processor 10. This should be possible by supporting the function to report the status of the datapath.

However, in the conventional technology as described above, in the communication system based on ATM, when the control module wants to check whether data is normally transmitted through the data path in the physical layer processing unit, most of the physical layer processing units on the market are released. Since the system manager does not support the function to report the current status of the datapath, the system administrator cannot check the abnormality of each ATM cell delivered in the physical layer processing unit. Because it was not detectable and only learned after an error in the datapath, there was a problem that the renovation time or cost for operating the system was increased.

In addition, a method of checking counter information of a corresponding port is used to check whether there is an abnormality of data transmitted through a specific port among a plurality of ports connected to a physical layer processing unit. Since it is necessary to process a counter check, a counter reset, etc. after transmitting the diagnostic AMT cell, such additional work has a problem in that the system performance is degraded while checking the counter information due to a load on the system.

Accordingly, the present invention has been proposed to solve the above-mentioned conventional problems, and in the communication system based on ATM, between the protocol processing unit and the serial connection processing unit for monitoring of AMT cells flowing into and out of the physical layer processing unit. With a separate data path error detection unit, ATM cells leaked from a higher level to a specific port or from a higher level from a corresponding port are returned to a control block during the high-speed data transmission. The object of the present invention is to provide an apparatus and a method for confirming an abnormality of a data path to a board.

The present invention for achieving the above object, the control block for generating datapath diagnostic request information to confirm the presence or absence of a datapath for a particular port or board; And a physical layer processing unit for detecting an AT cell flowing into or out of a specific port according to a data path diagnosis request of the control block and feeding back to the control block.

In addition, the present invention comprises the steps of receiving the data path diagnostic request information and stored in the exit or entry register; Comparing the stored ATM data request information with the AT cell which flows in and out of the line between the physical layer processor and the AT layer processor; And detecting the same AT cell as the data path diagnosis request information and returning the same to the control block or bypassing the same AT cell as it is.

Hereinafter, an embodiment according to the present invention will be described in detail with reference to the accompanying drawings.

FIG. 2 is a block diagram showing a simple configuration of a system to which a data path abnormality detection apparatus is applied in an Asynchronous Transfer Mode (ATM) based communication system according to the present invention. Physical Layer) processing unit 100, ATM layer processing unit 200.

In addition, the physical layer processing unit 100, as shown in Figure 3, a protocol processing unit 110 including a utopia slave transmitter 111 and a utopia slave receiver 112; Outlet register 121, outflow cell detector 122, first-in, first-out 123, outflow cell feedback 124, inflow cell detector 125, second-in, first-out 126, inflow cell feedback 127, and a data path anomaly detecting unit 120 including an inlet register 128; The serial connection processor 130 includes a utopia master transmitter 131 and a utopia master receiver 132.

The present invention is applicable to an AMT-based communication system including a physical layer processing unit 100 and an ATM layer processing unit 200 as well as a control block (not shown) for controlling and managing them. The physical layer processing unit 100 of the present invention. ) Is the lowest layer of the ATM protocol stack that defines the interface between the AMT cell traffic and the physical medium, and extracts a valid AMT cell from a frame received from multiple ports (ports 0 to n) through the optical line. Transmitting to the AT layer processing unit 20 connected through a serial line, or carrying the AT cell received from the AT layer processing unit 20 in an STM (Synchronous Transfer Mode) -n frame to transmit to the outside through an optical path In addition to the normal physical layer role, the system administrator's request for data path diagnostics can either enter or exit a specific port. By retrieving the leaked ATM cell to the control block (not shown) through the lower end or the upper end, the system administrator can check the data path through the corresponding port without affecting the system performance during data processing. Make sure

The AT layer 200 is a layer of an AT protocol stack that processes most processing and routing activities, and multiplexes and demultiplexes the AT cells extracted by the physical layer processor 100, and each AT cell. Conversion and Cell Routing of Virtual Path Identifiers (VPIs) and Virtual Channel Identifiers (VCIs), Generation and Extraction of AMT Cell Headers, Quality of Service, General Flow Control (GFC) And priority.

Here, the physical layer processing unit 100 is composed of a protocol processing unit 110, a data path failure detection unit 120 and a serial connection processing unit 130 connected through a UTOPIA (Universal Test and Operation PHY Interface for ATM) interface The protocol processor 110 extracts a valid ATM cell from a frame received from a plurality of ports (ports 0 to port n), and transmits the valid AMT cell to the serial connection processor 130 through the data path abnormality detector 120. The AMT cell received from the serial connection processor 130 through the data path failure detection unit 120 serves to transfer to the destination port.

In addition, the data path abnormality detection unit 120 bypasses the ATM cell flowing in and out between the protocol processing unit 110 and the serial connection processing unit 130, and the control module when the system administrator executes the data path diagnosis mode. (Not shown) receives data path diagnosis request information including information such as a port number, a virtual path identifier (VPI), a virtual channel identifier (VCI), and the like for diagnosing an abnormality, and In response to the received data path diagnosis request information, the ATM cell is detected and fed back to the lower stage through the protocol processor 110 or the upper stage through the serial connection processor 130.

In addition, the serial connection processor 130 receives a valid AT cell extracted from the protocol processor 110 through the data path anomaly detection unit 120 and converts it into high-speed serial data. The data path abnormality detection unit 120 transmits to the TEM layer processing unit 200 or checks whether there is an abnormality of the high-speed serial data received from the AT layer processing unit 200, and then requests a utopia cycle of a desired port. Transfer to the protocol processing unit 110 through.

In the present invention, by providing a separate data path abnormality detection unit 120 between the protocol processing unit 110 and the serial connection processing unit 130 for the monitoring of the ATM cell flowing in and out of the physical layer processing unit 100, high-speed data The system designer checks the returned AMT cell in a control block (not shown) by returning an ATM cell that flows out to a specific port or a higher level from the corresponding port without degrading system performance during transmission. Check if there is a problem with the data path to the port or board.

In addition, the data path anomaly detection unit 120 uses a field programmable gate array (FPGA) that can easily implement, delete, or convert a function of a corresponding circuit through a software tool. Make it possible to design as one.

In addition, the control block (not shown) checks the data path diagnosis request information containing information of the ATM cell to check the abnormality of the exit register 121 and the inlet register 128 in order to confirm the abnormality of the data path. After transmitting to the AMT cell, which is fed back during the interval time, it checks whether there is more error and determines whether there is an error in a specific port or board.

Here, the data path diagnosis request information has a format as shown in FIG. 6 and is stored in the exit register 121 or the inlet register 128. The data path diagnosis request information includes a port number, a virtual path identifier (Virtual Path Identifier, VPI) and virtual channel identifiers (VCIs).

In the present invention, it is assumed that the AT cell transmitted from the physical layer to the AT layer is an ingress cell and vice versa.

First, a case of diagnosing an abnormality of an outflow cell will be described. In general, the AMT cell delivered through the AMT layer processing unit 200 and the serial connection processor 130 at the upper end has a corresponding AMT cell as a destination. Whenever a Utopia cycle request of a port is performed, the data path is transferred to the protocol processing unit 110 via the data path anomaly detecting unit 120.

At this time, the outflow cell detection unit 122 in the data path anomaly detecting unit 120 uses the data path diagnosis request information stored in the exit register 121 to transmit the protocol processing unit from the utopia master transmitter 131 of the serial connection processing unit 130. After detecting a specific AT cell included in the data path diagnosis request information among the AT cells transmitted to the Utopia slave transmitter 111 of 110, the fact is reported to the outflow cell feedback unit 124.

That is, when the data path diagnosis request information arrives and is stored in the exit register 121 and the data path diagnosis mode is executed, the outflow cell detection unit 122 inspects the AMT cell that is currently delivered to the stored data path diagnosis request. Detecting the AMT cell matching the information, the matching specific AMT cell is temporarily stored in the first-in first-out unit 123 that can store only one AMT cell at a time, otherwise the AMT cell is not It bypasses the physical layer processing unit 100 through the protocol processing unit 110 as it is.

In this case, the first and second first-in first-out units 123 and 126 typically store only one AT cell at a time, which is typically one AT when transmitting datapath diagnosis request information from a control block (not shown). This is because there is no need to increase the space and cost in the system by unnecessarily realizing a large capacity because only a cell is designated and returned.

On the other hand, the outflow cell feedback unit 124 received from the outgoing cell detection unit 122 has been reported that the specific AT cells have been detected, there is an AMT cell ingress (Ingress) from the physical layer to the ATM layer through a specific port Check whether or not.

If there is no AMT cell transmitted through a specific port, the AMT cell temporarily stored in the first-in, first-out unit 123 is transferred to the Utopia master receiver 132 to the AT layer processor 200. After the feedback, the control block (not shown) performs the initial diagnosis function by processing the feedback AMT cell through the AT layer processing unit 200, thereby determining the presence or absence of a data path error for a specific port.

Here, the outflow cell feedback unit 124 has an internal multiplexer (not shown) when receiving the data transmission from the Utopia master receiver 132 when there is no AMT cell ingressed from the physical layer to the AT layer. Blocks the end of the line from the utopia slave receiver 112 to the utopia master receiver 132 and transmits the AT cell stored in the first-in, first-out 123 to the utopia master receiver 132.

Meanwhile, referring to a case of diagnosing an abnormality of an inflow cell transferred from the physical layer to the ATM layer, the inflow cell detection unit 125 first uses a protocol processor (eg, data path diagnosis request information stored in the inlet register 128). After detecting the specific AT cell transmitted from the utopia slave receiver 112 of 11) to the utopia master receiver 132 of the serial connection processor 130, the fact is reported to the inflow cell feedback unit 127.

At the same time, the detected AT cells are temporarily stored in a second first-in first-out (FIFO) 126 that can store only one AT cell at a time.

Here, when the data path diagnosis request information is stored in the inlet register 128 and the data path diagnosis mode is executed, the inlet cell detector 125 is currently transmitted from the utopia slave receiver 112 to the utopia master receiver 132. The AMT cell matching the data path diagnosis request information stored in the inlet register 128 is detected, and the matching AMT cell is temporarily stored in the second first-in, first-out unit 126. As it is bypassed through the serial connection processor 130 to the AT layer processing unit 200.

In this case, the inflow cell feedback unit 127, which has been reported that the specific AT cell is detected by the inflow cell detection unit 125, is leaked through the specific port included in the data path diagnosis request information from the ATM layer to the physical layer. If there is no AMT cell transmitted through the corresponding port, the AMT cell temporarily stored in the second first-in, first-out unit 126 is transferred to the utopia slave transmitter 111. The transfer is fed back to the physical layer processing unit (100).

Then, the control block (not shown) performs the initial diagnosis function by processing the feedback AMT cell through the physical layer processing unit 100, thereby determining the presence or absence of a data path error for a specific port.

On the other hand, referring to the operation of the data path failure detection method in the ATM-based communication system of the present invention, first, the data containing the information to check the abnormality of the data path in the control block (not shown) according to the selection of the system administrator When the path diagnosis request information is transmitted, the exit register 121 or the entrance register 128 stores it (S40), and the data path diagnosis request mode is executed.

Then, the outflow cell detection unit 122 or the inflow cell detection unit 125 examines the ATM cell transmitted through the line end between the protocol processing unit 110 and the serial connection processing unit 130, and the ATM cell currently delivered is It is compared with the stored data path diagnosis request information (S41, S42).

That is, the outflow cell detection unit 122 may transmit the ATM cell transmitted from the serial connection processor 130 through the ATM layer processor 200 through a line end connected between the protocol processor 110 of the physical layer processor 100. In addition, the inlet cell detector 125 detects an AT cell delivered in the reverse case.

Subsequently, when a specific ATM cell is detected because the previously stored data path diagnosis request information and the ATM cell related information are the same, it is fed back to a control block (not shown) through an upper end or a lower end. The control block (not shown) determines whether there is an abnormality of the datapath for the specific port from the AT cell (S43), and if it is not the same, transfers the currently received AT cell to the next stage as it is, and transmits normal data. This is done (S44).

Referring to the process of returning the detected AMT cell to a control block (not shown) through the upper end or the lower end in step S43, as shown in the flowchart of FIG. If the data path diagnosis request information is identical to the stored data path diagnosis request information, the outflow cell detection unit 122 detects the corresponding AMT cell to the first first-in first-out unit 123 when the data path diagnosis request information is for checking whether there is an abnormality with respect to the outflow cell. Temporary storage (S50, S51).

In addition, the outflow cell detector 122 reports that the corresponding cell has been detected by the outflow cell feedback unit 124, and thus the outflow cell feedback unit 124 is the utopia slave receiver 112 and the utopia master receiver 132. Check whether there is an AMT cell delivered from the line end to the upper end between (S52), and if there exists, wait until there is no AMT cell delivered for a predetermined time, otherwise The AT cell is fed back to a control block (not shown) via the upper stage, that is, the AT layer processing unit 200 (S53 and S54).

Then, the control block (not shown) processes the AT cell to perform an initial diagnosis function, thereby determining whether there is a data path error for a specific port.

In addition, if the data path diagnostic information request received from the control block (not shown) is for checking whether there is an abnormality in the inflow cell (S55), the inflow cell detector 125 detects the same as the data path diagnostic information request. The AT cell is temporarily stored in the first-in, first-out unit 126 (S56), and the fact is reported to the inlet cell feedback unit 127.

Then, the inflow cell feedback unit 127 checks whether there is an AT cell transmitted from the utopia master transmitter 131 to the utopia slave transmitter 111 in the lower end direction (S57). Wait until there is no AMT cell delivered for a predetermined time, otherwise the AMT cell is fed back to a control block (not shown) through the lower stage, that is, the physical layer processing unit 100 (S58, S59). ), The control block (not shown) to process the AMT cell to perform the initial diagnostic function.

As described above, in the communication system based on ATM, the present invention provides a separate datapath anomaly detection unit between the protocol processing unit and the serial connection processing unit to monitor the ATM cell flowing into and out of the physical layer processing unit. During the high-speed data transmission, the AMT cell leaked from the upper end to the specific port or the upper end from the corresponding port is returned to the control block according to the system administrator's selection, and the returned AMT cell is transferred from the control block. By checking the data path for a specific port by checking, it is possible to check the data path for a specific port or board without degrading system performance during high-speed data transfer.

1 is a block diagram briefly showing a configuration of a communication system based on a conventional AT.

2 is a block diagram showing a simple configuration of a system to which a data path anomaly detection apparatus is applied in an AT-based communication system of the present invention.

3 is a block diagram showing a configuration of a physical layer processor in a communication system to which an apparatus for detecting a data path anomaly in an AT-based communication system of the present invention is applied.

Figure 4 is a flow chart showing the operation of the data path failure detection method in the ATM-based communication system of the present invention.

FIG. 5 is a flowchart illustrating a process of returning a detected AT cell to a control block through an upper end or a lower end in a method for detecting a data path error in an AT-based communication system.

Figure 6 is an exemplary view showing an example of the format of the data path diagnosis request information in the data path failure detection method in the ATM-based communication system of the present invention.

*** Description of the symbols for the main parts of the drawings ***

100: physical layer processing unit 110: protocol processing unit

111: utopia slave receiver 112: utopia slave receiver

120: data path error detection unit 121,128: exit and inlet register

122, 127: outflow and inflow cell detectors 123, 126: first and second first-in, first-out

124,127: outlet cell and inlet cell feedback unit 130: series connection processing unit

131: utopia master receiver 132: utopia master receiver

200: AT layer processing unit

Claims (8)

A control block for generating datapath diagnosis request information to check whether a datapath for a specific port or board is abnormal; In the AT-based communication system, characterized in that it comprises a physical layer processing unit for detecting the AMT cells flowing into or out of a specific port according to the data path diagnosis request of the control block and fed back to the control block Data path fault detection device. The data path diagnosis request information of claim 1, wherein the physical layer processor bypasses the incoming and outgoing ATM cells and receives data path diagnosis request information from a control block, and the data path diagnosis request information is executed. The apparatus for detecting a data path abnormality in an AT-based communication system, characterized in that it further comprises a data path abnormality detection unit for detecting the ACM cell flowing in and out of the control block. The data of the ATM-based communication system according to claim 2, wherein the data path diagnosis request information includes at least one of a port number, a virtual path identifier, and a virtual channel identifier for diagnosing an abnormality. Pass anomaly detection device. The ATM-based communication system of claim 2, wherein the data path anomaly detection unit is implemented using a FPGA that can easily implement, delete, or convert a function of an internal circuit through a software tool. Data path abnormality detection device. The apparatus of claim 2, wherein the data path failure detection unit comprises: an exit and inlet register configured to store the received data path diagnosis request information; According to the data path diagnosis request information stored in the exit and inlet registers, the ATM cell flowing out of the AMT layer processing unit to the physical layer processing unit or vice versa is examined, and the same ATM is identical to the datapath diagnosis request information. An outlet cell and an inlet cell detector for detecting a cell; First and second first-in first-out units for storing AMT cells detected by the outlet cell and the inlet cell detector; Upon receiving a report that a specific AT cell is detected from the outflow cell and the inflow cell detector, whether the AMT cell flowing from the physical layer processor to the AMT layer processing unit through the specific port or vice versa exists. If there is no AMT cell flowing into or out of a specific port as a result of the check, the AMT cell blocked from the physical layer processing unit to the AMT layer processing unit and the AMT cells stored in the first and second first-in first-out units are checked. Apparatus for detecting a data path abnormality in an ATM-based communication system, characterized in that it comprises an outlet cell and an inlet cell feedback unit for feedback to the control block. Receiving data path diagnosis request information and storing the data path diagnosis request information in an exit or inlet register; Comparing the stored ATM data request information with the AT cell which flows in and out of the line between the physical layer processor and the AT layer processor; In the AT-based communication system, the method may include detecting the same AT cell as the data path diagnosis request information and returning the same AT cell to the control block or bypassing the same AT cell. How to detect datapath error The method of claim 6, wherein the step of returning the detected AT cell to the control block comprises: temporarily storing the detected AT cell when the data path diagnosis request information is for checking whether there is an abnormality with respect to the leaked cell; ; Check whether there is an AT cell flowing into the AT layer processing unit from the physical layer processing unit, and if not, block the line end from the physical layer processing unit to the AT layer processing unit and control the temporarily stored AT cell A method for detecting a data path failure in an ATM-based communication system, comprising the step of feeding back a block. The method of claim 6, wherein the step of returning the detected AT cell to the control block includes: temporarily storing the detected AT cell when the data path diagnosis request information is for checking whether there is an abnormality in the inflow cell; ; Check whether there is an AT cell leaked from the AT layer to the physical layer processor, and if not, block the line end from the AT layer to the physical layer processor and control the temporarily stored AT cell A method for detecting a data path failure in an ATM-based communication system, comprising the step of feeding back a block.