KR100487613B1 - A analysis method of Yee cells containing three thin dielectric sheets in finte-difference time-domain(FDTD) method - Google Patents

Abstract

The present invention relates to a method of analyzing a Yee cell including three thin dielectric plates in a finite difference time domain method. It is about how to make the interpretation more efficient than when interpreting.

Description

A analysis method of Yee cells containing three thin dielectric sheets in finte-difference time-domain (FDTD) method}

  The present invention relates to a method for analyzing a Yee cell containing three thin dielectric plates in a finite-difference time domain method. Finite-

This paper relates to a method that enables more efficient analysis when using the Difference Time-Domain (FDTD) method.

 The history of the FDTD method, one of the electromagnetic numerical techniques, dates back to 1966 when K. S. Yee interpreted the initial boundary problem relatively easily using differential equations derived from the Maxwell equation's differential form.

Since then, the FDTD method, which can be calculated simply from Maxwell's equations, rather than complex integral equations, has become a very attractive numerical method. However, because the interpretation area is a time domain, it takes a lot of analysis time and requires a lot of computer memory. Only today, due to the rapid development of computer technology, the FDTD method has begun to emerge again.

  The FDTD method is applied in a wide range of fields, and its application can be classified into five categories.

First, shielding, electromagnetic coupling, lightning, EMP

EMI / EMC problems such as electromagnetic pulse phenomenon and packaging can be analyzed.

Secondly, it can analyze scattering and problems related to radar cross section (RCS), and thirdly, analyze biological effects of electromagnetic waves on the human body.

Fourth, in the antenna problem, radiation patterns, input impedances, and the like can be calculated. Finally, microwave active and passive element circuits and waveguides can be analyzed.

As such, the FDTD method is widely used in almost all fields of electromagnetic fields so that there is no applicable field.

When analyzing the structure (FIG. 2) including three dielectric plates that are very thin compared to the total size by using the conventional Yee cell division FDTD method as shown in FIG. 1, since each has three media, The number of numbers becomes so large that it requires a lot of memory, making it difficult to interpret on a typical computer.

In addition, when analyzing using the FDTD method using a non-uniform grid, the number of analysis points can be reduced, but in this case, the smallest grid size is determined by the thickness of the thinnest dielectric plate. The time-step used in the FDTD method is so small that it takes a long time to interpret.

The present invention is to solve the above conventional problems, by inducing a formula that can be used when three thin dielectric plates in the Yee cell in the FDTD method, using a small amount of memory in a short time The purpose is to provide a method for analyzing Yee cells containing three thin dielectric plates with efficient thickness.

The purpose of the FDTD method is to analyze the electromagnetic field values for a structure containing three dielectric plates, which are very different media compared to the overall size of the wafer 10 having an arbitrary structure,

A region dividing step of dividing the region into and from the region containing the dielectric plate;

Determining whether a region divided in the region division step includes the dielectric plate;

Dividing the region into a Yee cell filled with a medium if the region does not include the dielectric plate;

Dividing the dielectric plate into a Yee cell including three dielectric plates if the region includes the dielectric plate;

Ex , Ey , Ez , Hx , Hy , Hz of the region divided into the Yee cells containing the dielectric plate is achieved by using a mathematical formula to calculate the numerical value.

Hereinafter, described in detail by the accompanying drawings as follows.

FIG. 2 is a cross-sectional view perpendicular to the longitudinal direction of the shielded membrane microstrip of the first embodiment of the present invention. The upper shielded wafer 110, the high resistance thin film wafer 120, and the metal-coated carrier wafer 130 are shown in FIG. Silicon oxide plate 1 210 and silicon nitride plate 220 and silicon oxide as cross sections of any structure in the configured wafer 10.

Three dielectric plates composed of two plates 230 are provided.

The height h1 of the structure inside the upper shielding wafer 110 is 500 μm, and the height h2 of the structure in the high resistance thin film wafer 120 is 98.6 μm, and the three dielectric plates 210, 220, The sum of the thicknesses d 1, d 2, d 3 of 230 is made of 1.4 μm.

Therefore, the sum of the heights h1 and h2 of the structure of the upper shielding wafer 110 and the high resistance thin film wafer 120 is equal to the thickness d1, d2, d3 of the dielectric plates 210, 220, and 230. The sum of the sums is about 1: 427 so that the thicknesses d1, d2, d3 of the three dielectric plates 210 220, 230 are extremely thin compared to the height of the entire wafer 10.

When the structure including the three dielectric plates 210, 220, and 220 is analyzed using the FDTD method, the dielectric plates are divided into regions including the dielectric plates 210, 220, and 230, and regions not included.

The portion provided with the three thin dielectric plates 210, 220, and 230 is divided using the Yee cells 40 and 50 of FIGS. 3 and 4, and does not include the dielectric plates 210, 220, and 230. The region not shown is interpreted as a formula used in the conventional FDTD method using a Yee cell filled with a medium shown in FIG. 1.

Wherein the length of h1, h2 and the value of the thickness of d1 to d3 is an arbitrary example, and the method of analyzing a Yee cell containing three thin dielectric plates in the finite difference time domain method of the present invention is the dielectric plate 210, The thinnest of the thicknesses d1, d2, d3 of 220 and 230 is used when 1/40 or less of the height h2 of the structure in the high resistance thin film wafer 120.

If the value of the thinnest of the d1, d2, d3 is larger than 1/40 of the height (h2) of the structure in the high-resistance thin film wafer 120 can be efficiently analyzed by the FDTD method using a non-uniform grid. Can be.

3 is a perspective view of an electric cell 40 of a Yee cell including three dielectric plates of the first embodiment according to the present invention, and FIG. 4 is a Yee including three dielectric plates of the first embodiment according to the present invention. A perspective view of a magnetic cell 50 of the cells.

In order to obtain Ex , Ey , Ez , Hx , Hy , and Hz of the electromagnetic Yee cells 40 and 50 including the dielectric plates 210, 220, 230 of FIGS. 3 and 4, the following equation is derived.

Equation 1

Equation 2

Equation 3

Equation 4

Equation 5

Equation 6

Ε _{r, nf} and μ _{r, nf} in Equations 1 to 6 are as follows.

Equation 7

Equation 8

In Equations 7 and 8, d1, d2, d3, and εr1, εr2, and εr3 represent thicknesses and relative dielectric constants of the three dielectric plates 210, 220, and 230, respectively.

And others have the same meaning as in the conventional FDTD method.

FIG. 5 is a flowchart of analyzing Yee cells 40 and 50 including three thin dielectric plates 210, 220, and 230 in the finite difference time domain method according to the present invention.

In the finite difference time domain method according to the present invention, a method of analyzing Yee cells 40 and 50 including three thin dielectric plates 210, 220, and 230 having different media is described.

A region dividing step (s20) for dividing the region including the dielectric plates (210, 220, 230) and regions not included;

Determining whether the region divided in the region division step includes the dielectric plates 210, 220, and 230 (s30);

Dividing the region into Yee cells 20 filled with a medium if the dielectric plates 210, 220, and 230 are not included (s40);

In the step s30, if the region includes the three dielectric plates 210, 220, and 230, dividing the cells into Yee cells 40 and 50 including the three dielectric plates 210, 220, and 230 (s50). Wow;

An area divided into Yee cells 40 and 50 including the three dielectric plates 210, 220, and 230 is represented by Ex , Ey , Ez , Hx , Hy , and Hz using Equations 1 to 6 above. Calculating a value (s60).

3 and 4 using the above method, the size of the Yee cell used in the analysis using the FDTD method can be large regardless of the thickness of the thin dielectric plates. Not only can the number be reduced, but the size of the time interval used in the FDTD method can be made to have an appropriate size, so that the storage space required for the simulation is reduced and the execution time can be reduced.

In addition, when trying to analyze a model of a circuit including a structure (FIG. 2) including three very thin dielectric plates 210, 220, 230 compared to the total wafer 10 size, the finite difference time of the present invention Ex , Ey , Ez , Hx , Hy , Hz accurately and quickly by applying the method of analyzing the Yee cells 40, 50 including the three thin dielectric plates 210, 220, 230 in the region method. The value is known, which greatly helps in the design and fabrication of the circuit.

As described above, the present invention uses the FDTD method to analyze a structure including three dielectric plates that are very thin compared to the total size, and induces a formula used for region analysis with three dielectric plates. By applying it, it is possible to interpret more efficiently in a shorter time, that is, using a smaller amount of memory.

 1 is a Yee cell filled with a medium according to a conventional finite difference time domain method,

 2 is a cross-sectional view of a first embodiment according to the present invention;

 3 is a perspective view of an electric cell of the Yee cell including three dielectric plates of the first embodiment according to the present invention;

  4 is a perspective view of a magnetic cell of a Yee cell including three dielectric plates of the first embodiment according to the present invention;

FIG. 5 is a flowchart for analyzing a Yee cell including three thin dielectric plates in a finite difference time domain method according to the present invention. FIG.

<Detailed Description of Drawing Symbols>

10: wafer 110: upper shielding wafer

120: high resistance thin film wafer 130: metal-coated carrier wafer

20: Yee cell filled with a medium 210: silicon oxide (SiO ₂ ) plate 1

220: silicon nitride (Si ₃ N ₄ ) plate 230: silicon oxide (SiO ₂ ) plate 2

240: signal line 30: via hole

40: Electric cell among Yee cells containing three dielectric plates

50: Magnetic cell among Yee cells containing three dielectric plates

Claims (3)

The electric field value of the structure in which the thinnest of the thicknesses d1, d2, d3 of each of the three dielectric plates 210, 220, 230 is 1/40 or less of the height h2 of the structure in the high resistance thin film wafer 120. In the FDTD method of analyzing Dividing the three dielectric plates 210, 220, and 230 into Yee cells 40 and 50 including the three dielectric plates 210, 220, and 230; Calculating Ex , Ey , Ez , Hx , Hy , Hz by dividing the region divided into Yee cells 40, 50 including the three dielectric plates 210, 220, 230 using the following equation ( s60). A method of analyzing a Yee cell including three thin dielectric plates in a finite difference time domain method. The method of claim 1, wherein the three dielectric plates comprise a silicon oxide (SiO ₂ ) plate 1 (210), a silicon nitride plate (Si ₃ N ₄ , 220), and a silicon oxide (SiO ₂ ) plate 2 (230). A method of analyzing a Yee cell containing three thin dielectric plates in a finite difference time domain method. The method of claim 1, wherein the finite difference time domain method is applied to a model analysis of a circuit including a structure including three dielectric plates 210, 220, and 230 that are very thin compared to the total wafer 10 size. To analyze a Yee cell containing three thin dielectric plates.