KR100473449B1 - Calculating method for message digest 5 hashing function having parallel calculating structure - Google Patents

Abstract

According to the present invention, a fast message reduction operation is performed by partially performing a parallel operation of a 512-bit message block and a 128-bit value to generate a compressed 128-bit output value in an MD5 hash function calculation process. The present invention relates to an MD5 hash function calculation method having a parallel operation structure.

The present invention can significantly improve the processing speed by processing a predetermined operation of the MD5 hash function processing in parallel.

Description

Calculation method of MD5 hash function with parallel operation structure {CALCULATING METHOD FOR MESSAGE DIGEST 5 HASHING FUNCTION HAVING PARALLEL CALCULATING STRUCTURE}

The present invention relates to a method for calculating an MD5 hash function having a parallel operation structure. More specifically, the present invention relates to a 128-bit message block and 128-bit value compressed in an MD5 hash function calculation process. The present invention relates to an MD5 hash function calculation method having a parallel operation structure capable of performing a fast message reduction operation by partially performing an operation of generating an output value of a bit.

It is very important to securely transmit the information to be transmitted in the Internet and the e-commerce system. In this information security, message authentication proves that the sender's message is from the receiver's point of view, and also confirms that the transmitted message is intact. A key element of authentication is Message Authentication Code (MAC). Among them, HMAC is a method of generating a message authentication code based on a hash function.

The core used for message authentication in such electronic commerce is the MD5 (Message Digest 5) Hash Algorithm.

The hash algorithm is an algorithm that compresses a bit string of arbitrary length into a hash code that is a fixed length output value. The hash algorithm is an essential requirement for message authentication to be used.

First, it is impossible to calculate the input value for a given output.

Second, it is impossible to find another input that produces the same output for a given input,

Third, the non-repudiation service that prevents forgery by third parties other than the sender in the digital signature should be provided. The typical hash algorithm used for this purpose is MD5.

MD5 is a message compression algorithm developed by Ronald Livest, a professor at MIT University in the United States. The MD5 is designed to be resistant to external attack threats because it is slower than previous versions of the MD4 but is much safer.

MD5 is a function that receives a message of arbitrary length and outputs a fixed length of 128 bits, and processes any input message in units of 512 bits.

FIG. 1 is a diagram illustrating a process of generating a MAC using an MD5 hash function, and illustrates a process of dividing an input message into units of 512 bits and outputting each of 512 bits to a value of 128 bits through an MD5 hash function. Referring to Figure 1, the process of generating an output value by receiving a message as follows. L indicates the number of 512 bit message blocks.

The first step is padding and appending, where the input message is processed in units of 512 bits. Specifically, the last message block is padded with 1 followed by the required number of zeros so that the block length is 448 bits, and the total message length is indicated in the last 64 bits.

The second step is to initialize the MD5 buffer. A 128-bit buffer is used to store the intermediate value and the final result during the MD5 operation. The 128-bit buffer is represented by the 32-bit register ABCD. The initial values are as follows.

A: 0 1 2 3 4 5 6 7, B: 8 9 a b c d e f,

C: f e d c b a 9 8, D: 7 6 5 4 3 2 1 0 (Hexadecimal notation)

The third process is the 512-bit block process, which processes the MD5 hash function. It takes a message of 512-bit block and a value of 128-bit buffer as input and generates 128-bit digested output through four round calculation process. This output is stored in a 128-bit buffer and used as the input for the next message block abbreviation. Each round uses the functions F, G, H, and I, respectively. The logical expression of the function is as follows.

F (X, Y, Z) = XY and not (X) Z, G (X, Y, Z) = XZ and Ynot (Z),

H (X, Y, Z) = X xor Y xor Z, I (X, Y, Z) = Y xor (X and not (Z))

In addition, the SIGN function is used to calculate each round, which uses 64 values, 16 for each round.

FIG. 2 is a diagram illustrating a hash function processing process of an MD5, and illustrates a process of generating a 128-bit MD5 hash function output value from a 512-bit message. In Fig. 2, T [1 ... 16] represents the 16 SIGN values used in the first round, followed by T [17 ... 32] for the second round, and T [33 ... 48] for the third round. , T [49 ... 64] represents the SIGN value of the fourth round. X [] represents the 32 bits of the message used in the hash function.

The result after the fourth round is added to the input of the first round to produce a 128-bit abbreviation. This process proceeds to the last block of the message, and the final 128-bit value is the message compression value using the MD5.

Since the MD 5 has a circuit proposed to have a 32-bit process, FIG. 2 is composed of the circuit of FIG. 3 which is a 32-bit process structure. In order to process each round in 32 bit units in FIG. 2, one round may be configured in 16 steps, so each step corresponds to the circuit of FIG. 3. That is, FIG. 3 becomes a basic structure for processing FIG. 2 in 32 bit units.

3 is a diagram illustrating a one-step process in the MD5 hash function process of the 64-step repeat structure. As shown in FIG. 3, the one-step process of the MD5 hash function processing process includes 16 A, B, C, D, and 512 bit messages obtained by dividing a 128 bit buffer into four 32 bits to store an initial value and an output value. F / G / H / I function value that performs logical operation using the input value X [] divided into 32 bit units and the SIGN value T [], A, B, C, D of 32 bits. , Using the adder 10 and the shifter 20.

Specifically, addition is performed by the A and F / G / H / I function values and the adder 10 and the resultant value is added to the input value X [k]. Next, the addition result is performed with the SIGN value T [i] and the addition. The addition result is shifted by the shifter 20 according to a predetermined value, and the result is added with B. The last calculation is stored in buffer B, input B is stored in C, input C is stored in D, and input D is stored in A.

In order for the MD5 hash function processing block to receive an initial value of 128 bits and a message of 512 bits, the process of FIG. 3 is repeated 64 times. The 64 iterations consist of 16 iterations using the F function, 16 iterations using the G function, 16 iterations using the H function, and 16 iterations using the I function. At this time, if the 16 iterations are combined into 4 iterations, the structure is as shown in FIG.

4 is a diagram illustrating a conventional MD5 hash function 4-step process. As shown in FIG. 4, the value of the buffer A used as the initial value of the repetition process is used for the addition and shift processes, but the value of the buffer B is used as the initial value C of the second iteration process. The C value of the first process is used as the initial value D of the second iteration, and the D value of the first process is used as the initial value A of the second iteration. Finally, as each iteration is performed, the value of the first buffer A is used to add the first iteration, the value of the first buffer B is the fourth iteration, the value of the first buffer C is the third iteration, and the value of the first buffer D is Used for addition in the second iteration

The hardware implementation of the MD5 hash function calculation process is an MD5 hash function calculator. The MD5 hash function operator receives a message of arbitrary length and generates a 128-bit compressed message authentication code. It consists of addition, shift, and a series of logic gates. In particular, the message is processed in units of 512 bits, and in order to convert the 512-bit message into a 128-bit hash function output value, 64 steps of operations are repeated, each of 16 steps per round. The 64 step calculation process is repeated 64 times by 1 step, and this iterative operation process is sequential due to the characteristics of the MD5 hash function. That is, it has a hash function characteristic that multiple steps cannot be performed in parallel. This impedes the implementation of fast MD5 hash function processing hardware.

It is important to improve the structure of FIG. 3 in order to solve this problem and implement the MD5 hash function at high speed. To this end, various methods have been proposed, as shown in FIGS. 5A and 5B.

The hash function processing of FIG. 3 is generally implemented as an adder of a CLA (30, CLA: Carry Lookahead Adder) structure as shown in FIG. 5A. A method of reducing two CLs by using the proposed method has been proposed. This method improves the overall processing speed by using the CS instead of the CL using the fact that the CS 40 is faster than the CS 30. However, even in this case, there is a limit in increasing the processing speed since it has a completely serial structure. Therefore, there is a need for a method that can effectively improve the processing speed.

The present invention has been made to solve the above problems, and an object of the present invention is to provide an MD5 hash function calculation method having a parallel operation structure with improved MD5 hash function processing speed.

In other words, by improving the structure so that some of the processing of the MD 5 hash function can be processed in parallel to provide an MD 5 hash function calculation method with improved processing speed.

In order to achieve the above object, the MD5 hash function calculation method having a parallel operation structure according to the present invention calculates a 512-bit message block and a 128-bit value through four rounds of a 16-step repetition structure. Comprising an operation process for generating a compressed 128-bit output value, a predetermined operation of the operation process as an MD5 hash function calculation method having a parallel operation structure,

Nth step of each step,

The 128-bit buffer that stores the initial value and the output value is divided into four 32-bit values of the first buffer, the second buffer, the third buffer, and the fourth buffer, and 16 512-bit messages in 32-bit units. A first step of performing addition operation by inputting the divided input value X [k] and the 32-bit sine value T [i] to the CS; A second step of performing an addition operation by inputting the output value of the CS to the first CL; The values of the second buffer, the third buffer and the fourth buffer are input, and F (X, Y, Z) = XY and not (X) Z, G (X, Y, Z) = XZ and Ynot (Z), Output of F / G / H / I function that performs logical operation of H (X, Y, Z) = X xor Y xor Z, I (X, Y, Z) = Y xor (X and not (Z)) Generating a third step; A fourth step of performing an addition operation by inputting the output value of the first CL and the output value of the F / G / H / I function to the second CL; A fifth step of shifting the output value of the second CL by a shifter; A sixth step of performing an addition operation by inputting an output value of the shifter and a value of the second buffer to the third CL; And a seventh step of storing the output value of the third CL in the second buffer and shifting the values of the second buffer and the third buffer,

The first and second steps comprise (1) the value of the fourth buffer, X [k + 1] and T [i + 1], (2) the value of the third buffer, X [k + 2] and T [ i + 2] and (3) an eighth step of performing addition operation by inputting values of the second buffer, X [k + 3] and T [i + 3], to the CS, respectively; And inputting an output value of each CS into the first CL to be performed simultaneously in parallel with a ninth step of performing an addition operation.

Preferably, the seventh step comprises the steps of: storing the value of the second buffer in a third buffer; And storing the value of the third buffer in the fourth buffer.

More preferably,

N + 1th step,

An eighth step of performing addition operation by inputting the value of the fourth buffer, X [k + 1] and T [i + 1], to the Nth step to the CS; And performing the operations of the third to seventh steps using the output value of the ninth step of performing the addition operation by inputting the output value of the CS to the first CL,

N + 2th step,

An eighth step of performing addition operation by inputting the values of the third buffer of the N th step, X [k + 2] and T [i + 2], to the CS; And performing the operations of the third to seventh steps by using the output value of the ninth step of performing the addition operation by inputting the output value of the CS to the first CL,

N + 3th step,

An eighth step of performing addition operation by inputting the values of the second buffer of the N th step, X [k + 3] and T [i + 3], to the CS; And performing operations of the third to seventh steps by using the output value of the ninth step of performing the addition operation by inputting the output value of the CS to the first CL as an input value.

Hereinafter, with reference to the accompanying drawings will be described in detail the advantages, features and preferred salicyle of the present invention.

As described above, in the conventional MD5 hash function four step process, as shown in FIG. 4, the value of the first buffer A is used for addition in the first process and the value of the first buffer B is used for addition in the fourth process. Also, the value of the first buffer C is used for addition of the third process and the value of the first buffer D is used for addition of the second process. In the present invention, by improving the prior art as described above, when the process of Figure 3 is connected to four, the second, third, fourth addition process is performed simultaneously using the initial values A, B, C, D of the first process. Be sure to

Therefore, in the present invention, as shown in FIGS. 5A and 5B, the first full process is completed to improve the conventional fully serial structure in which the second process is started. Provides a structure that is performed at the same time.

The components of the present invention are shown in FIGS. 6 and 7. The MD5 hash function calculation method having a parallel operation structure according to the present invention is achieved by connecting four structures shown in FIG. 6 in succession to create four consecutive processes. In addition, the portion indicated by the dotted line in FIG. 6 should be processed simultaneously in four processes. Therefore, four steps are processed in a batch, because when four steps are performed, two addition processes in each step can be processed simultaneously.

To this end, in the MD5 hash function calculation method having a parallel operation structure according to the present invention, the F / G / H / I function value is added after the message and the SIGN value, and the F / G / H / During the calculation of the I function value, the message and SIGN values are added. Since the message, SIGN value, initial values A, B, C, and D are predetermined values, they can be simultaneously executed in four processes.

6 is a block diagram of an MD5 hash function 1 step processing apparatus according to the present invention. As shown in FIG. 6, the first addition operation is performed by using a Carry Save Adder (CSA) 40, and adds three values such as an initial value A, a message, and a SIGN value. In addition, in order to add the sum (SUM) and the carry (CARRY) generated in the CS 40, the next stage of the CS is provided with a CL (30, CLA: Carry Lookahead Adder). The addition result of the CL 30 is a function of F / G / H / I and an addition operation in the CL, and then an addition operation of the shift operation and the initial value B is performed. In this process, the first addition operation, CS, and the second addition operation, SL, are performed simultaneously in four processes.

FIG. 7 illustrates an MD5 hash function 4-step process according to the present invention, and implements an MD5 hash function calculation process having a parallel operation structure according to the present invention using the structure of FIG. 6. As shown in FIG. 7, the MD5 hash function calculation process having a parallel operation structure according to the present invention connects the structure of FIG. 6 in succession and separates the portions indicated by the dotted lines in FIG. Do it.

Specifically, after the initial values A, B, C, and D are stored in the first step buffer, the A, B, C, and D values are simultaneously combined with the message value (X) and the SIGN value (T). Calculation is made through the CS 40 and the SL 30. In addition, the value calculated using the D value is transferred along the dashed line in the 2nd step, and the value calculated using the C value is transferred along the dashed line in the 3rd step, and the B value The calculated value is transferred along the dashed line in the fourth step. This delivery process takes place simultaneously. In addition, the process of A, B, C, D value is calculated through the CS 40 and the CL 30 and transferred to the second CL is also performed at the same time. In other words, the addition operation in the CS 40 and the SL 30 using the initial values A, B, C, and D, the CS 40 and the SL 30 using the B, C, and D, respectively. Each addition operation is performed in parallel at the same time, and the result is transferred simultaneously. Therefore, the processing speed can be remarkably improved as compared to when each process is performed sequentially.

After being delivered to the second CL 30, a sequential operation through the shifter 20 and the third CL 30 is performed. The A 'value calculated using A is used to calculate the F / G / H / I function value of the second stage and the third CL. The A '' value calculated using B is used for the third step, and the A '' 'value calculated using C is used for the fourth step. Eventually, A 'must be created to create A' 'and in turn A' ''.

Comparing the calculation speed in the conventional structure and the structure of the present invention is shown in Table 1.

rescue Critical Path-4 Steps Normalized delay time Conventional Structure (FIG. 5A) 16CLA + 4SHIFTER One Conventional Structure (FIG. 5B) 8CSA + 8CLA + 4SHIFTER 0.7 Structure of the Invention (FIG. 6) CSA + 9CLA + 4 SHIFTER 0.58

In calculating the calculation speed, the ratio of CS: CL = 0.4: 1 was used. Of course, the smaller the speed difference between the CS and the SL, the larger the difference in the calculation speed in the structure of the present invention and the conventional structure.

As a result of the comparison of Table 1, when the delay time of FIG. 5A is 1, FIG. However, the delay time in the structure of the present invention is 0.58, which is improved by approximately 42% compared to FIG. 5A and 12% in FIG. 5B. Therefore, it can be seen from the results of Table 1 that the present invention significantly improved the processing speed compared to the conventional structure.

As described above, the present invention can significantly improve the processing speed by processing a predetermined operation in parallel in the MD5 hash function processing.

In addition, it is possible to effectively implement electronic commerce, digital signature, etc. by generating a high-speed message authentication code.

While the preferred embodiments of the present invention have been described using specific terms, such descriptions are for illustrative purposes only, and it is understood that various changes and modifications may be made without departing from the spirit and scope of the following claims. Should be done.

1 is a diagram illustrating a process of generating a message authentication code (MAC) using an MD5 hash function.

FIG. 2 is a diagram illustrating a process of generating a 128-bit MP5 hash function output value from a 512-bit message. FIG.

3 is a diagram illustrating a one-step process in the MD5 hash function process of the 64-step repeat structure;

4 is a diagram illustrating a conventional MD5 hash function 4-step process.

5 is a block diagram of a conventional MD5 hash function 1 step processing apparatus.

6 is a block diagram of an MD5 hash function 1 step processing apparatus according to the present invention;

7 is a diagram showing a four-step MD5 hash function processing according to the present invention.

*** Explanation of symbols on main parts of drawing ***

10: adder 20: shifter

30: CLA 40: CSA

Claims (5)

Four rounds of a 16-step repetition structure are used to compute a 512-bit message block and a 128-bit value to produce a compressed 128-bit output value. An MD5 hash function calculation method having a calculation structure, N-th step of each step, The value of the first buffer among the first buffer, the second buffer, the third buffer, and the fourth buffer, the 128-bit buffer storing the initial value and the output value divided into four 32 bits, and the 512-bit message in 16 bit units. A first step of performing addition operation by inputting the divided input value X [k] and the 32-bit sine value T [i] to the CS; A second step of performing an addition operation by inputting the output value of the CS to the first CL; Receiving values of the second buffer, the third buffer, and the fourth buffer, F (X, Y, Z) = XY and not (X) Z, G (X, Y, Z) = XZ and Ynot (Z), Output of F / G / H / I function that performs logical operation of H (X, Y, Z) = X xor Y xor Z, I (X, Y, Z) = Y xor (X and not (Z)) Generating a third step; A fourth step of performing an addition operation by inputting the output value of the first CL and the output value of the F / G / H / I function to the second CL; A fifth step of shifting the output value of the second CL by a shifter; A sixth step of performing an addition operation by inputting an output value of the shifter and a value of the second buffer to a third CL; And A seventh step of storing the output value of the third CL in the second buffer and shifting the values of the second buffer and the third buffer, The first step and the second step, (1) the value of the fourth buffer, X [k + 1] and T [i + 1], (2) the value of the third buffer, X [k + 2] and T [i + 2], and ( 3) an eighth step of performing addition operation by inputting the values of the second buffer, X [k + 3] and T [i + 3], to the CS, respectively; And The MD5 hash function calculation method having a parallel operation structure, characterized in that simultaneously performed in parallel with the ninth step of performing the addition operation by inputting the output value of each of the CS. The method of claim 1, The seventh step, Storing the value of the second buffer in the third buffer; And And storing the value of the third buffer in the fourth buffer. The method of claim 1, N + 1th step, The eighth step of performing addition operation by inputting the value of the fourth buffer of the N th step, the X [k + 1] and the T [i + 1] to the CS; And Performing the operations of the third to seventh steps using the output value of the ninth step of performing the addition operation by inputting the output value of the CS to the first CL as an input value. Method for computing MD5 hash function with structure. The method of claim 1, N + 2th step, The eighth step of performing an addition operation by inputting the value of the third buffer of the N th step, the X [k + 2] and the T [i + 2] to the CS; And Performing the operations of the third to seventh steps using the output value of the ninth step of performing the addition operation by inputting the output value of the CS to the first CL as an input value. Method for computing MD5 hash function with structure. The method of claim 1, N + 3th step, The eighth step of performing addition operation by inputting the value of the second buffer of the N th step, the X [k + 3] and the T [i + 3] to the CS; And Performing the operations of the third to seventh steps using the output value of the ninth step of performing the addition operation by inputting the output value of the CS to the first CL as an input value. Method for computing MD5 hash function with structure.