KR100460158B1 - Data transfer method, data recording device, data recording medium and data reproducing device - Google Patents

Abstract

The present invention relates to a data transmission method for preventing direct copying of a two level digital signal. In the processing of input digital data from the input terminal 11 by the circuit 13-16, in the data modulation by the modulation circuit 17, and in the addition of the synchronization signal by the synchronization adding circuit 18, a synchronous format conforming to the standard. The synchronization signal is added using a synchronization format that is different from and which is not normally used. For example, a synchronization pattern different from the normal synchronization pattern may be used, or a synchronization signal may be inserted at a position different from the normal position. If direct copying of a two-level digital signal having such a synchronization format is attempted, the synchronization will be inconsistent, for example copying will be interrupted and forbidden.

Description

Data transmission method, data recording apparatus, data recording medium and data reproducing apparatus

The present invention relates to a data transfer method, a data recording apparatus, a (recordable, recordable or recorded) data recording medium and a data reproducing apparatus applicable to the prevention of duplication or illegal use of transmitted or recorded / reproduced digital data. It is about.

In recent years, the proliferation and dissemination of digital recording media such as optical discs has made it important to prohibit copy protection and illegal use. In other words, digital audio data or digital video data can be copied without deterioration by copying or dubbing, and computer data can be copied to provide the same data as the original data. May be caused.

In order to avoid illegal copying of digital audio data or digital video data, standards of so-called serial copy management system (SCMS) or copy generation management system (CGMS) are known until now. However, since these standards set a copy prohibition flag on a specific portion of the recording data, the data can be extracted by full copy of the two-level digital signal, that is, so-called dump copy.

Japanese Patent Application Publication JP-A-7-182766 (1995) discloses a method of recording non-copyable information (trust information) on a recording medium and using it to prohibit illegal copying of this information. have. However, this method does not solve the problem of data extraction by dump copying.

In particular, the whole copy, that is, the dump copy, is caused by a technique of directly extracting a two-level digital signal read by a reproduction head such as an optical head, thereby causing a disadvantage.

This is the same as in the case of digital video discs (DVDs) currently being developed, and therefore, in a reproduction-only disc capable of mass duplication, some countermeasures are required with regard to formatting.

It is therefore an object of the present invention to provide a data transmission method, a data recording apparatus, a data recording (recording, recordable or recorded) medium and a data reproducing apparatus, whereby direct copying of a two-level digital signal is prohibited and thus pirated. Illegal piracy, such as

According to the present invention, a reproduction disturbance area which interferes with the reproduction operation is provided in a signal to be transmitted or recorded, and positioning information specifying the arrangement position of the reproduction reproduction area is transmitted or recorded together with the data.

The reproduction disturbance area may be an area having a special synchronization signal different from a synchronization signal conforming to a standard. This special sync signal may be different from a sync signal whose transition length conforms to the standard. The regeneration disturbance area may be an area in which pits or grooves of a length that cause servo departure are formed.

In the case where the transmitted and recorded signals are copied directly, the reproduction disturbance region causes clock synchronization or servo to deviate, thereby preventing total copying.

Description of the Preferred Embodiments

Referring now to the drawings, a preferred embodiment of the present invention will be described in detail.

1 is a schematic block diagram showing a data recording apparatus implementing the present invention.

Referring to FIG. 1, digital data, such as data converted from an analog audio signal or a video signal by A / D conversion, is supplied to the input terminal 11. This input digital data is sent to the sectoring circuit 13 through the interfacing circuit 12, and each sector is sectorized in units of 2048 bytes. Sectorized data is sent to the scramble processing circuit 14 for scramble processing. Here, scramble processing means that input data is randomized so that the same byte pattern does not appear continuously, that is, the same pattern is removed, so that signals can be properly recorded and read. The scrambled or randomized data is sent to the header adding circuit 15 to add header data to the head of each sector. The resulting data is sent to the error correction coding circuit 16. The error correction encoding circuit 16 adds parity data by performing data delay and parity calculation. The next stage modulation circuit 17 converts, for example, 8-bit data into 16 channel bits of modulation data according to a predetermined modulation scheme, and sends the resulting modulation data to the synchronization adding circuit 18. The synchronization adding circuit 18 adds a so-called out-of-rule pattern synchronization signal in units of a predetermined data amount, and the resulting data is transferred through a driving circuit, i. Send to 20. The recording head 20 performs optical or magneto-optical recording to record the modulated recording signal on the disc-shaped recording (recordable or recorded) medium 21. The disk-shaped recording medium 21 is rotationally driven by the spindle drive motor 22.

The scramble processing circuit 14 is inserted in the rear end of the header adding circuit 15 to scramble the digital data added to the header, and sends the scrambled data to the error correction coding circuit 16.

Now, as a first embodiment of the present invention, a configuration example of various components of FIG. 1 will be described.

2 shows an example of a signal format after adding a synchronization signal to the synchronization adding circuit 18.

Referring to Fig. 2, 148 bytes of information data are arranged in the read / write direction (R / W direction). Fourteen columns of 148 bytes each define 2072 bytes of one sector information data 31. 2072 bytes of one sector information data 31 are arranged, for example, as shown in FIG. 3, where one sector is a 2048 byte user data area 41, a 4 byte sync area 42, and a 16 byte header area 43. And a 4-byte error detection code (EDC) area 44. The error detection code of the error detection code area 44 is composed of a 32-bit or four-byte CRC code generated for the user data area 41 and the header area. In the header area 43, a CRC 45 which is a circulating code, a copy data 46 for copy permission / deny or copy generation management, a layer 47 representing any one layer of a multi-layer disk, and an address area 48 ), And a spare area 49 are provided.

As shown in Fig. 2, one sector 2072 byte information data 31 is two-dimensionally arranged in vertical 148 (= 85 + 63) bytes and 14 horizontal columns. The C1 direction of the error correction encoding is taken in the vertical R / W direction, 8 bytes of C1 parity data 33 is generated and added, and is taken in the C2 direction of the error correction code, and 14 bytes of C2 parity data (34). ) Is generated and added. Each sector 32 including C1 parity 33 and C2 parity 34 is composed of 2380 bytes. Data consisting of the information data and the parity data is modulated by the modulation circuit 17 in accordance with a predetermined modulation scheme, so that one byte (8 bits) is converted into, for example, 16 channel bit modulated data. The modulated data is added to this modulated data by a synchronization signal of 2 bytes or 32 channel bit patterns. As this synchronization signal, the sector sink 36 is arranged at the head of the sector, and the C1 sink 37 is disposed at the head of the vertical direction other than the sector sink 36. As shown in FIG. An additional sink 38 is arranged at an intermediate position that divides 170 bytes in the vertical direction into two 85 byte portions. The vertical column of the structure of FIG. 2 may be referred to as a C1 frame, and two synchronization signals are provided in the C1 frame.

4 shows an example of a pattern of a synchronization signal. In Fig. 4, three types of sync words S0-S2 are shown. These sync words are the so-called out-of-rule signal patterns that deviate from the modulation rules of the modulation circuit 17. Specifically, 11T (T is a channel bit period) is represented twice in succession as the signal transition length, that is, the transition length. This pattern is not used as the data modulation pattern of the modulation circuit 17, so that data and sync words can be reliably separated from each other. These sync words S2-S0 may correspond to the sinks 36-38 of FIG. Specifically, the synchronization signals S2, S1, S0 are used for the sector sink 36, the C1 sink 37, and the additional sink 38, respectively.

In the embodiment of the present invention, a synchronization format different from the above standard synchronization format and not normally used is used in at least some areas or sectors, and thus is not synchronized in normal playback, so-called dump copying, that is, the aforementioned two levels. Direct copying of digital data is prevented. This region is generally referred to as a reproduction disturbance region.

Examples of using such a synchronization format that are not normally used include using a special pattern different from the standardized synchronization signal pattern as shown in FIG. 4, and using an irregular position different from the normal position of the synchronization signal defined in the standardization format. Arranging a synchronization signal is mentioned.

A first example of using the special synchronization pattern is to use a transition interval longer than the interval 11T, for example, 12T or 13T. In addition to a pattern containing two repetitions of 12T or 13T, a combination pattern of different transition intervals may be used, including 12T or 13T. For example, a pattern containing two repetitions of a 13T transition interval can be used as a synchronization signal for a 32 channel bit synchronization signal as follows:

0000 0100 0000 0000 0010 0000 0000 0001

This causes inconsistency during the dump copy.

A second example of using the special synchronization pattern is to use a transition interval shorter than the minimum transition interval 3T of the modulation rule in the modulation circuit 17, for example, 1T or 2T. That is, 1T or 2T repetitions are formed of pits smaller than the physically present pits. Of course, the connection condition can be satisfied before and after the synchronization pattern. An example of 2T repetition showing a sync signal of 32 channel bits is

0101 0101 0101 0101 0101 0101 0101 0101

to be.

When a synchronization signal with a shorter transition length is used, when unknown data is reproduced, the RF signal level gradually decreases, which makes it difficult to reproduce.

A third example using the special synchronization pattern uses repetition of the transition interval 11T, but moves to a position different from the position of the transition interval 11T in the standardized synchronization pattern, i.e., shifts the offset. Can be. This pattern is typically 0000 0100 0000 0000 1000 000 0001 0001

to be.

A fourth example of using the special synchronization pattern is to use an actual data modulation signal as a synchronization signal instead of using an outer of rule pattern that deviates from the synchronization rule in the modulation circuit 17. For example, a 32-channel bit signal obtained by modulating 16-bit data "00FFh" in hexadecimal representation is used as a synchronization signal.

In the case where such a special sync pattern is used in at least some areas such as predetermined sectors, this area or sector represents the reproduction inhibiting area, and positioning data for designating the sector address of the reproduction inhibiting area is simultaneously recorded. That is, during signal recording, the positioning data is additionally recorded in the normal data, and the synchronization adding circuit 18 of FIG. 1 transmits the special synchronization signal of the sector of the reproduction disturbance area specified by the positioning data. The switching is performed by switching to the synchronization signal of the synchronization pattern.

5 shows an example of a synchronization adding circuit configured to switch a special synchronization pattern in response to the positioning data. The sync adder circuit of FIG. 5 can be used as the sync adder circuit 18 of FIG. The modulation signal from the modulation circuit 17 is input to the input terminal 51.

The signal flowing into the input terminal 51 is sent to the common terminal C of the switching switch 52, and the output of the fixed terminals a and b of the switching switch 52 is synchronized to add a standardized synchronization pattern. The additional circuit 54 and the special synchronization adding circuit 55 to which the synchronization signal of the special synchronization pattern is added are respectively sent. The outputs of the synchronization adding circuit 54 and the special synchronization adding circuit 55 are output from the output terminal 56 and sent to the driver 19 of FIG. 1. The switching switch 52 is switched control in response to the positioning data from the positioning data output circuit 53. In this case, the positioning data for specifying the sector address of the reproduction disturbance area can be recorded in a predetermined area such as a list table (TOC) area, for example. That is, the positioning data is provided to the list table (TOC) generating circuit 23 through the interface circuit 12 shown in FIG. The information provided from the TOC generating circuit 23 is provided to the recording head 20 through the terminal 24 and then provided to the TOC area of the recording medium.

Instead of using a special synchronization pattern different from the normal synchronization pattern as described above, the three types of synchronization patterns S0-S2 shown in FIG. 4, the sector sinks 36 and the C1 sinks shown in FIG. Correspondence with 37 and additional sink 38 may vary from a normal correlation that follows the standard. That is, when the sector sync 36, the C1 sink 37, and the additional sink 38 are defined as S2, S1, and S0 as regular correspondences, these correspondences may deviate, thereby causing synchronization. The patterns S0, S2, and S1 are used as sync patterns of the sink 36, the C1 sink 37, and the additional sink 38, respectively.

Now, various examples of inserting a synchronization signal at an anomaly position different from the position following the standard will be described.

In the first example, as shown in FIG. 6, the synchronization signal is inserted into an anomaly position 59 different from the normal synchronization signal position 58, and the interval of the anomaly position 59 is adjusted to a regular interval, for example, 85. FIG. And keeping them at byte intervals. That is, in FIG. 6A, the anomalous position 59 is provided after the normal position for the synchronization signal 58, while in FIG. 6B, the anomaly position 59 is anywhere between the normal positions of the synchronization signal 58. Provided at a location, the spacing of adjacent anomalous locations is maintained at 85 bytes.

A second example in which the synchronization signal positions are different is to sporadically set an interval between anomalous positions at which the synchronization signals are inserted. In the first example, the intervals of the anomaly positions 59 are set at regular intervals, such as the 85 byte intervals. In a second example, this interval is randomized.

A third example of changing the position of the synchronization signal includes inserting the synchronization signal into the data portion such that the number of synchronization signals in each column in each C1 frame, that is, in each column in the vertical direction of FIG. Can be.

In the third example, when inserting the increased number of synchronization signals into the data portion, it becomes difficult to insert data into the data portion of the sector. However, in the first and second examples, data can be inserted at positions other than the anomaly position.

In the above examples, normal sync detection or separation cannot be done by using a sync format that is different from the sync format provided by the standard and which is not normally used. As a modification, it is also possible to provide a configuration that disables servo or clock operation, such as pits, grooves or mirror surfaces of servo escape lengths.

For example, a pit or groove having a servo separation length can be formed.

In addition, a non-recording area such as a mirror surface having a length longer than the servo escape length can be provided.

By providing an area having such a structure, the servo is disengaged during reproduction, and direct copying of the two-level digital signal is prohibited.

In normal reproduction, proper reproduction of the reproduction obstructed area is performed by recording positioning information such as positioning data of the reproduction obstructed area in a predetermined area such as a list table (TOC) area or by a pointer provided at the designated position. This can be done by specifying a reproduction disturbance area. For example, when a reproduction disturbance area causing servo deviation is used, the positioning information corresponding to the reproduction disturbance area is recorded in the TOC area, and by detecting the positioning information during reproduction, this area may not be reproduced, for example, by jumping. have.

In addition, the above-mentioned technique for preventing the entire copying of the two-level digital data mentioned above can be combined with data encryption for increased stability.

That is, any one of the sectorization circuit 13, the scramble processing circuit 14, the header adding circuit 15, the error correction coding circuit 16, the modulation circuit 17, and the synchronization adding circuit 18 is input. And to output the encrypted data.

The key information for such encryption is, at least in part, the recording medium 21, such as identification information suitable for the recording medium, producer identification information, seller identification information, identification information suitable for the recording device or encoder, or identification information supplied from the outside. Identification information recorded in an area other than the data recording area of the " Therefore, the identification information recorded in an area other than the data recording area of the recording medium is, for example, information sent from the interfacing circuit 12 to the terminal 24 via the list table (TOC) generation circuit 23, or the interfacing circuit ( Information sent directly from terminal 12 to terminal 25. The key information from the terminals 24 and 25 is used as an example of key information for encryption. The input data is encoded using key information in at least one of the circuits 13-18, preferably two or more circuits.

Which of the above circuits 13-18 performs encryption is considered to be a key necessary to generate a regular reproduction signal during reproduction as one of the alternatives. In other words, if encryption is performed in any of the above circuits, it is necessary to select from six circuits. If encryption is performed in two of the six circuits, it is necessary to select one of three circuits. If there is a possibility that encryption is performed in one to all six circuits out of the six circuits 13-18, the number of circuits is further increased, thus making it difficult to find a combination by trial and error. Thus, the purpose of encryption is satisfied satisfactorily.

Key information for encryption can be switched at a predetermined timing such as a sector period, thereby increasing the difficulty of encryption, that is, encoding.

At least a portion of the key information for encryption may be recorded in an area or sector in which a synchronous format that is not normally used is used. Therefore, even if the area or sector is known and out of sync can be avoided, out of sync is generated when the two-level digital signal is copied directly, and the key information cannot be reproduced.

Although the above description has been made for the case of recording on a recording medium, the above-mentioned technique can be easily applied to the processing and transmission of general input digital data. This can be realized by providing the aforementioned reproduction disturbance area of the general transmission data signal.

FIG. 7 shows a disc shaped recording medium such as an optical disc as an example of the recording medium. This disc-shaped recording medium 101 has a center opening 102. When viewed from the inner rim to the outer rim of the disc-shaped recording medium 101, a lead-in area 103 as a program management area or TOC area, a program area 104 in which program data is recorded, And a program end region, that is, a so-called lead-out region 105. In an optical disc for reproducing audio or video signals, audio or video signals are recorded in the program area 104, and time information for audio or video data and the like are managed by the lead-in area 103.

In addition, identification information or the like recorded in an area other than the program area 104, which is a data recording area, can be used as part of the key information. Specifically, identification information such as a manufacturing number suitable for a specific recording medium, producer identification information, seller identification information, identification information suitable for a special recording device or a special encoder, or identification suitable for a special device for generating a recording medium such as a cutter or a stamper. Identification information such as information is recorded in the lead-in area 103 and the lead-out area 105 which are TOC areas. Further, a signal obtained at the time of encryption using the above information, which is key information in at least one of the six circuits 13-18, preferably two or more circuits, is recorded in the program area 104 which is a data recording area. The identification information is physically or chemically recorded in the radial area inside the lead-in area 103, and can be read during reproduction and used as key information for encoding.

In addition, the positioning information can be recorded in a predetermined area such as the TOC area of the lead-in area 103. In this case, the reproduction disturbance area can be directly designated by the positioning information of the TOC area. In addition, the positioning information in the TOC area can simply specify a pointer with data, and this pointer can specify the position of the reproduction obstructing area.

Now, with reference to FIG. 8, a data reproducing apparatus for carrying out the data reproducing method will be described.

Referring to Fig. 8, the disk-shaped recording medium 101, which is a recording medium, is rotationally driven by the spindle motor 108, so that the recording contents thereof can be read by a reproduction head device 109 such as an optical pickup. The above-described full copy of the two-level digital signal means a copy in which a signal from the reproduction head device 109 is directly extracted and recorded on another recording medium.

The digital signal read out to the reproduction head device 109 is sent to the TOC decoder 111 and the amplifier 112. From the TOC decoder 111, a production number, a producer identification number, a seller identification number suitable for a special recording medium, identification information suitable for a special recording device or a special encoder, identification information suitable for a special device for reproducing a recording medium such as a cutter or a stamper, and Similarly, the identification information recorded as part of the TOC information in the lead-in area 103 of the disc-shaped recording medium 101 is read and used as at least part of the key information used for encryption. It is also possible to output identification information suitable for the reproduction apparatus or identification information supplied from the outside of the CPU 122 in the reproduction apparatus, and use the identification information as at least part of the key information. Examples of identification information from the output include identification information received on a communication network or a transmission channel and identification information obtained when reading an IC card, a ROM card, a magnetic card or an optical card.

The digital signal obtained from the reproduction head device via the amplifier 112 and the PLL 113 is sent to the synchronous separation circuit 114 to separate the synchronous signal added by the synchronous signal addition circuit 18 of FIG. The digital signal from the synchronous separation circuit 114 is sent to the demodulation circuit 115, and demodulation, which is the reverse operation of modulation by the modulation circuit 17 shown in FIG. The digital data from the demodulation circuit 115 is sent to the error correction decoding circuit 116, and decoding, which is the reverse operation of the encoding by the error correction coding circuit 16 in FIG. The data from the error correction decoding circuit 116 is decomposed into the setter by the sector decomposition circuit 117, and the header at the head of each sector is separated by the header separation circuit 118. The sector decomposition circuit 117 and the header decomposition circuit 118 are circuits corresponding to the sectorization circuit 13 and the header addition circuit 15 of FIG. 1, respectively. The data from the header separation circuit 118 is processed by the descrambling processing circuit 119 having a descrambling processing function which is a reverse operation of the scrambling processing by the scrambling processing circuit 14 of FIG. The reproduced data is output through the interfacing circuit 120 in the output terminal 121.

Since the reproduction disturbance area is recorded on the recording medium described previously, it is necessary to provide a process for inhibiting the adverse effect caused by directly reproducing the reproduction disturbance area. This process is different from the kind of reproduction disturbance area. For example, if a special synchronization pattern is used, the special synchronization pattern is controlled and switched as shown in FIG. If a synchronization signal position different from the normal position is used, the synchronization detection may be performed at another position and not in that area. On the other hand, if the servo departure is used, reproduction in that area can be inhibited.

FIG. 9 shows an example of the configuration of a synchronous separation circuit on the reproduction side in the case where a synchronous signal of a special synchronous pattern is added to a synchronous signal position of a predetermined area or sector during recording as described with reference to FIG. The synchronous separation circuit shown in FIG. 9 can be used as the synchronous separation circuit 114 of FIG. The output signal of the PLL circuit 113 of FIG. 8 is supplied to the input terminal 131.

The input signal of the input terminal 131 of FIG. 9 is supplied to the common terminal C of the changeover switch 132. The outputs of the fixed terminals a and b of the switching switch 132 are supplied to a synchronous detection / separation circuit 134 configured to detect and isolate a synchronous signal of a synchronous pattern conforming to the standard, and as described above, the special synchronous pattern Are sent to the special synchronous detection / separation circuit 135, respectively, so as to detect and isolate the synchronous signal. The outputs of the synchronous detection / separation circuit 134 and the special synchronous detection / separation circuit 135 are output from the output terminal 136 and supplied to the demodulation circuit 115 of FIG. 8.

In addition, the input signal of the input terminal 131 is sent to the positioning data detection circuit 133, where positioning data indicating a reproduction disturbance region provided with a synchronization signal of a special synchronization pattern is detected and derived. The changeover switch 132 is controlled according to the positioning data from the positioning data detection circuit 133. As mentioned above, the positioning data is also writable in the TOC information in the lead-in area 103 of FIG. In this case, the positioning data can be obtained from the TOC decoder 111 of FIG. The position where the positioning data is arranged can be designated by the information provided in the TOC area.

Fig. 9 shows an example of the configuration of the synchronization separating circuit on the reproduction side in the case where the reproduction disturbance region is provided by using a special pattern synchronization signal for the synchronization signal of the predetermined area or sector. Of course, in the case where the kinds of reproduction disturbance areas are different, appropriate reproduction processing is required to cope with the special reproduction obstacle area types. For example, when the synchronization signal position is different from the normal synchronization signal position, the synchronization detection position is controlled to enable synchronization detection at which the synchronization detection is performed at another position and the synchronization detection area is not performed. If a pit, groove or mirror surface or the like causing the servo deviation is provided in the reproduction disturbance area, this reproduction disturbance area can be recognized as a reproduction prohibition area, and thus signal reproduction is prevented, for example, by track jump.

The encryption processing is performed among the sectorization circuit 13, the scramble processing circuit 14, the header adding circuit 15, the error correction coding circuit 16, the modulation circuit 17, and the synchronization adding circuit 16. If performed in any circuit including 16), it is necessary to decrypt in the reproduction circuits 114-119 in conjunction with the circuit (s) in which the encryption process is performed. In other words, if encryption is performed in the sectorization circuit 13, it is necessary to decrypt it in the sectorization circuit 13 in Fig. 1 using key information for encryption. In a similar manner, decryption by the scramble processing circuit 119 and by the header separation circuit 118 need to be performed in conjunction with encryption by the scramble processing circuit 14 header addition circuit 15 of FIG. 1 respectively. Will be. Encryption by the error correction encoding circuit 16 of FIG. 1 is necessarily performed, and thus decryption by the error correction decoding circuit 116 is necessary. In addition, when encryption is performed in the modulation circuit 17 or the synchronization adding circuit 18 of FIG. 1, decryption needs to be performed in the demodulation circuit 115 and the synchronization separation circuit 114, respectively.

By recording the key signal for encryption immediately after the reproduction disturbance area or immediately after the synchronization signal of the special synchronization pattern, synchronization or servo is interrupted during the entire copy of the level digital signal, and therefore, the normal reproduction of the key information is impossible. Protection is guaranteed.

Now, a second embodiment of the present invention will be described. The basic configuration of this second embodiment is similar to that of FIG. 1, but the circuit 13-18 and signal format of FIG. 1 have been slightly modified from FIG. Thus, other parts will be described below.

FIG. 10 shows an example of a sector format of the second embodiment as a format of a signal obtained when adding a synchronization signal by the synchronization adding circuit 18 of FIG.

Referring to Fig. 10, each sector is composed of 212 new lines of 172 bytes each and a total of 1064 bytes, of which 2048 bytes represent main data. Four-byte recognition (ID) data, two-byte recognition error detection (IED) codes, and six-byte holding data (RSV) are arranged at the head position of the first row of the twelve lines in the order described now. The four byte error detection code (EDC) is placed at the end of the last line.

As shown in Fig. 11, of the four bytes of identification (ID) data, the first MSB side byte (bits b31-bit b24) represents sector information, and the remaining three bytes (bits b23-b0) represent the number of sectors. to be. The sector information is composed of one bit sector format type, one bit tracking method, one bit reflection, one bit spare, two bit area type and two bit layer number, and is shown on the MSB side.

In the sector format, the header appending circuit 15 of FIG. 1 can perform position shifting, i.e., bit-based scrambling, for 24 bits of the number of sectors of identification (ID) data according to key information through encryption. In addition, the generation polynomial of the 2-byte identification error detection (IED) code or the generation polynomial of the 4-byte error detection code (EDC) may be modified according to the key information through encryption.

The error correction encoding circuit 16 of FIG. 1 may be configured as shown in FIG. During encoding, the product code or block code shown in FIG. 13 is used.

Referring to FIG. 12, data from the header addition circuit 15 shown in FIG. 1 is supplied to the input terminal 210 of FIG. The input data is supplied to the PO encoder 211 which is the first encoder. Data input to the PO encoder 211 is data composed of 192 bytes of 172 bytes (B0, 0-B191, 171). This PO encoder adds the external code PO of RS 208, 192, 17 as 16 bytes of the Reed Solomon (RS) code to 172 rows of data each consisting of 192 bytes. The output data of the PO encoder 211 is sent to the interleaving processing circuit 213, and the resulting interleaved data is sent to the PI encoder 214. The PI encoder 214 adds 10 bytes of the internal code PI of the RSs 182, 172, and 11 to 172 bytes of each of the 208 rows of data, as shown in FIG. The PI encoder 214 thus outputs 182 bytes of 208 rows of data. The output data is derived from the output terminal 216.

The error corrected and encoded 182 bytes 208 rows of data are interleaved for the rows and divided into 16 groups of 13 rows. These 16 groups correspond to recording sectors. Each sector consists of 13 rows of 182 bytes and a total of 2366 bytes. The data is modulated and added with two sync codes SY per row as shown in FIG. In modulation, 8-16 modulation is used as in the first embodiment mentioned above. Each row is divided into two sync frames each composed of 32 channel bit sync codes (SY) and 1456 channel bit data. Fig. 14 shows one sector obtained by the modulation and synchronization addition. The 38688 channel bits of one sector shown in FIG. 14 correspond to 2418 bytes before modulation. Eight kinds of sync codes SY0-SY7 are used for the modulated output signal of FIG. Depending on the 8-16 conversion state, these sync codes SY0-SY7 become the sync pattern shown in Fig. 15A during states (1, 2) and the sync pattern shown in Fig. 15B during states (3, 4). .

These eight types of sync codes SY0-SY7 may be differently selected using the circuit illustrated in FIG. 16 according to the 3-bit key information for encryption. Each bit of the three-bit data 221 representing eight types of sync codes SY0-SY7 and each bit of the three-bit key information 222 are ex-ORed by three ExOR gates 223, 224, and 225. Arithmetic processing, whereby new sync code designation data 226 is obtained. Thus, the method of using the sync code of the frame structure or the position of using various types of sync codes in the frame structure are corrected through encryption. Of course, the 3 bit data can be changed, replaced or modified by the shift register according to the key information.

In addition, a special pattern different from the sync pattern shown in FIG. 15 may be used. Examples of using such a special pattern include a synchronization pattern having a transition length longer than the maximum transition interval of the modulated signal, a synchronization pattern shorter than the minimum transition length, and a pattern or synchronization pattern different from the synchronization pattern, and the modulation data of a predetermined actual signal. Can be mentioned. The synchronization adding circuit for switching the special synchronization pattern according to the positioning data can be configured as shown in FIG.

Now, various examples of inserting a synchronization signal into an anomalous position different from a normal position conforming to a standard will be described.

A first example is shown in FIGS. 17A and 17B. This example is similar to the example of FIGS. 6A and 6B except for the synchronization signal arrangement interval.

In the first example shown in FIG. 17, the synchronization signal is placed at anomalous position 259 different from the normal signal position 258, and the spacing between the anomalous positions 259 is, for example, 91 bytes, i.e., an interval of 1456 channel bits. Is maintained. That is, in the example of FIG. 17A, the anomaly position 259 is provided immediately after the regular synchronization signal position 258. In the example of FIG. 17B, any position between two normal positions 258 is used as the position for the anomaly position 259, and the spacing between such anomaly positions 259 is maintained at 91 bytes.

As a second example of different synchronization signal positions, it is possible to sporadically set an interval between anomalous positions at which synchronization signals are inserted. In the first example, the interval between the anomalous positions 59 is set to a regular interval such as a 91 byte interval. In the second example, this interval is randomized.

A third example of different position of the sync signal is to insert a sync signal at the data position so that the number of sync signals in two sync frames, i.e., each row in the horizontal direction of Fig. 14, is three or more.

In the third example, if the increased number of synchronization signals is used in the data portion, it is difficult to insert data into the data portion of the sector. However, in the first and second examples, data can be inserted at positions other than the anomaly position.

As mentioned above, a configuration for disabling servo or clock synchronization may be provided in a predetermined area, such as a pit, groove or mirror surface of a servo departure length.

In normal reproduction, proper reproduction of the reproduction prohibition area is performed by recording positioning data for the reproduction disturbance area in a predetermined area, for example, a list table (TOC) area, as in the first embodiment mentioned above, or at a predetermined location. This is done by designating the reproduction prohibition area by the provided pointer.

The effects of the second embodiment described above are similar to the effects of the first embodiment.

The present invention is not limited to the above embodiment. For example, the present invention can be applied not only to recording / reproducing from a recording medium but also to reproduction of general digital signals. In addition, various encryption techniques such as data replacement, movement, or conversion by a shift register or by various functional processes may be used alone or in combination.

1 is a schematic block diagram showing a data recording apparatus implementing the present invention.

2 is a diagram illustrating an example of error correction encoding.

3 shows an example of sector formatting.

4 shows an example of a sync word added to a modulated signal;

5 is a block diagram showing an example of a synchronization adding circuit.

6A and 6B show an example of disposing a synchronization signal at a position different from a normal synchronization signal position.

7 shows an example of a data recording medium;

8 is a schematic block diagram showing a configuration of a data reproducing apparatus embodying the present invention;

9 is a block diagram illustrating an example of a synchronous separation circuit.

10 illustrates another example of a sector format.

FIG. 11 shows an example of a header area in a sector of the sector format of FIG. 23; FIG.

12 is a block diagram illustrating another example of an error correction code.

Fig. 13 shows a product code as an illustrative example of an error correction code.

14 shows an example of a sector signal format.

15 shows another example of a sync word added to a modulated signal.

16 is a diagram showing another example of encryption in a synchronization adding circuit.

17A and 17B are diagrams showing another example in which a synchronization signal is arranged at a position other than a normal synchronization signal position.

Claims (10)

A data transmission method for processing input digital data and transmitting the processed digital data according to a preset format, Providing a retardation disturbance region in the signal that interferes with the reproducing operation; And transmitting positional information along with data, the positional designation designating an arrangement position of the reproduction disturbance region. The method of claim 1, And said reproduction disturbance area is an area having a special synchronization signal different from a synchronization signal conforming to a standard. The method of claim 2, The special synchronization signal is different from the synchronization signal whose transition length conforms to the standard. The method of claim 1, And the reproduction disturbance area is an area where pits or grooves having a servo escape length are formed. The method of claim 1, And the reproduction disturbance region is an unrecorded region having a servo escape length. The method of claim 1, And the reproduction disturbance area is a reproduction prohibition area for prohibiting data reproduction. The method of claim 1, The signal processing of the input digital data includes encryption processing in response to predetermined key information, At least a portion of the key information for encryption is disposed in or immediately after the reproduction disturbance area. A data recording apparatus which processes input digital data and records processed digital data according to a preset format, The signal is provided with a playback disturbance area that interferes with the playback operation, Positioning information designating the arrangement position of the reproduction disturbance area is recorded together with the data. In the data recording medium, A data recording medium comprising: a reproduction disturbance area for interfering a reproduction operation in a data recording area, and positioning information for designating an arrangement position of the reproduction disturbance area. A data reproducing apparatus for reproducing a data recording medium in which a reproducing obstruction region that obstructs a reproducing operation in a data recording area and positioning information specifying an arrangement position of the reproducing obstruction region are recorded. Positioning information detecting means for detecting the positioning information; And reproduction switching control means for controlling switching of reproduction of the reproduction disturbance region specified by the positioning information from the positioning information detecting means.