KR100458277B1 - Method for fabricating PIN semiconductor detector on the low resistivity silicon substrate - Google Patents

Abstract

The present invention relates to a fabrication process of a low-resistance Si substrate of a PIN-type semiconductor detector for personal dosimeters capable of detecting an exposed radiation dose, and a PIN-type semiconductor detector for a personal dosimeter manufactured by the above process. The first step of detecting the doping concentration of the p + layer of the PIN-type semiconductor detector, the redistribution of impurities by heat treatment and the effect of the guard ring on the cut surface through computer simulation; A second process of determining optimal variables and a structure of a detector from experimental values according to the first process; And a third step of fabricating the PIN type semiconductor detector by applying the optimum parameters of the second step to the semiconductor integrated circuit process, by the fabrication process on the low-resistance Si substrate of the PIN-type semiconductor detector for personal dosimeter, and by the fabrication process. The present invention relates to a manufactured PIN-type semiconductor detector for personal dosimeters, and particularly, it can be usefully used as a detector for personal dosimeters because the linearity of the radiation response characteristics of the Cs-137 radiation source is good.

Description

Method for fabricating a PIN type semiconductor detector on a low resistance Si substrate {Method for fabricating PIN semiconductor detector on the low resistivity silicon substrate}

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a method for fabricating a PIN semiconductor detector in a low resistance Si substrate capable of detecting radiation exposure, and in particular, to redistribution of impurities by doping concentration and heat treatment of a p + layer of a PIN semiconductor detector, and to a guard ring at a cut surface. The radiation response characteristics of the detector are good in the radiation dose rate range of 5mR / h to 25R / h by Cs-137 gamma source by providing the fabrication method according to the optimal detection of the detector structure according to the simulation of the (guard ring) effect. A method of fabricating a PIN-type semiconductor detector in a low resistance Si substrate for obtaining linearity.

In general, the use of nuclear power is divided into two areas: as a source of energy and as a radioisotope produced in a reactor.

When used as an energy source, it is used as a driving force for transportation and transportation agencies such as power generation and ships, and there are industrial steam generation, desalination of seawater, and intensive heating of many buildings.

When used as a radioisotope, it is more familiar to our lives than the above-mentioned power source. The use of artificial radioactive elements belongs to the secondary application field of nuclear power, but it is a step ahead of the use as a main power source. have. The fields of use include medical, industrial, scientific research, agriculture, food industry, civil engineering, etc., and the number of establishments dealing with isotopes is increasing every year. Radioisotopes have the same chemical properties as non-radioactive elements and have radioactivity, and are used as a radiation source such as using a radiation effect on a substance or a living thing or using a difference in the radioactivity of a substance. to be. In addition, a method using chemical equivalence with non-radioactive elements is also used.

Specific examples using the irradiation effect include disinfection sterilization of food or drugs, treatment of malignant tumors, and improvement of crop varieties. Examples of using the difference in permeability include isometry and isolometers using isotopes. Industrial measurements are widely used in applications such as application and nondestructive testing of products. Very familiar.

Therefore, radiation workers who work in nuclear power plants or hospitals need to regulate and take measures for radiation exposure, and as a part of such measures, they are required to carry a radiation detector or dosimeter for each person. Doing.

For this purpose, referring to Figure 1, which is a general configuration of a personal dosimeter provided to radiation workers, the attached Figure 1 is an exemplary view of the configuration of a conventional personal dosimeter, the electrical signal generated by radiation in the pin diode In order to process the signal, the electrical signal detected by the detector 401 is removed using a preamplifier (Pre amp) and an amplifier (Amp) 402, and then reconstructed in the form of a digital pulse after noise reduction, signal shaping, and amplification (403). The microprocessor uses a method of calculating the dose through an arithmetic calculation and displaying it using the LCD monitor 405.

The most important configuration of the personal dosimeter as described above is the detector 401. As a detector, a GM counter was initially used, but recently, a PIN-type semiconductor detector is widely used.

Since the factor determining the characteristic of the PIN-type semiconductor detector is the noise generated when the detector is operated in reverse bias, the noise should be minimized in order to manufacture the semiconductor detector having excellent characteristics. The main cause of such noise is leakage current, and leakage current is increased by a small number of carriers, which are impurities present in semiconductor devices.

The impurities are due to the infiltration of contaminants in the manufacturing process, and these impurities form trapping levels between the energy bands of silicon, thereby reducing the mobility and generation life of the carriers generated in the detector, thereby degrading the characteristics of the detector. In particular, the leakage current on the surface is increased by the oxide carrier thermally generated at the interface between the silicon substrate of the p + layer and the silicon oxide film (SiO ₂ ). In addition, the leakage current is greatly increased by defects generated by ion implantation for forming the p + layer and the n + layer, and defects generated during the cutting of the substrate to separate the Si substrate into individual elements.

In general, detectors are known to be fabricated on high-resistance silicon (Si) substrates of several kΩcm to reduce leakage currents. Kemmer employs a process to reduce contaminants, and leakage current is 1 nA / in a 100 μcm depletion layer. Holland reported that it maintains less than ² cm and Holland uses getter ring and guard ring techniques for typical integrated circuit processes, resulting in leakage currents of 1 to 3 nA / cm ² at 250–300 μcm of depletion layer. Reported.

Therefore, it is necessary to develop a new fabrication process using a low-resistance Si substrate to further reduce the leakage current of the PIN semiconductor detector and to lower the manufacturing cost, and to research and develop a detector having excellent electrical characteristics.

SUMMARY OF THE INVENTION The present invention has been made to meet the above requirements, and an object of the present invention is to develop a manufacturing process of a PIN semiconductor detector on a low-resistance silicon substrate to provide a PIN semiconductor detector for an individual dosimeter having excellent electrical characteristics and low manufacturing cost. will be.

1 is an exemplary block diagram of a dosimetry device using a pin diode,

2 is an exemplary view of MCNP simulation (radiation source and pin diode cross-sectional view) for filter design.

3 is an exemplary diagram illustrating computer simulations of IV characteristics according to a width of a p + region.

4 is an exemplary diagram illustrating computer simulations of current characteristics according to the concentration of boron in the p + region.

5 to 6 are examples of computer simulation showing the effect of the guard ring,

FIG. 7 is an exemplary diagram illustrating computer simulation of a junction profile and a junction depth of a p + region according to a dose amount;

8 is an exemplary view illustrating computer simulation of impurity redistribution during a heat treatment process.

9 to 10 is a diagram illustrating the radiation response characteristic computer simulation,

11 to 17 is a flow chart of the detector manufacturing process according to the present invention,

18 to 21 is a comparison diagram comparing the characteristics with the existing detector.

In order to achieve the above object, the PIN-type semiconductor detector for personal dosimeter according to the present invention, in the process of manufacturing a PIN-type detector on a low-resistance Si substrate, the doping concentration of the p + layer of the PIN semiconductor detector through computer simulation, heat treatment A first step of detecting an experimental value for the impurity redistribution and a guard ring effect at the cutting plane, a second step of determining optimal variables and a structure of the detector from the experimental values according to the first step, and the second step It includes a third process that applies the parameters of the process to the semiconductor integrated circuit process.

In addition, the PIN-type semiconductor detector for personal dosimeter according to the present invention, after the third process, to design the energy filter for energy compensation at 100 keV or less using MCNP code to confirm the possibility of use as a detector of the personal dosimeter, It can be produced by further comprising a fourth process of the transfer simulation of the radiation response characteristics of the detector to the energy range of 20 keV ~ 3 MeV.

In the first process, a computer simulation method for obtaining an experimental value according to the doping concentration of the p + layer of the PIN semiconductor detector, the impurity redistribution by heat treatment, and the guard ring effect on the cut surface may use the "DAVINCI" program.

In the second process, a "TSUPREM-IV" program that analyzes the variables of the semiconductor process may be used to determine the optimal parameters from the experimental values according to the first process.

In the third process, the semiconductor integrated circuit process using the optimum parameters of the second process applies a gettering technique on the low resistance Si substrate, and the edge of the device may have a guard ring structure.

More specifically, the third process includes forming an oxide film on the front surface of the low resistance silicon substrate; Depositing polycrystalline silicon on both surfaces of the low-resistance silicon substrate on which the oxide film is formed, and then implanting ions on the back surface to form an n + region; Forming a window and depositing boron to remove the polycrystalline silicon on the front surface and form a p + region and a guard ring region; performing a heat treatment to remove impurities in region i and removing an oxide film contaminated with impurities for a subsequent process; Forming an oxide film on the front surface of the silicon substrate to deposit the electrode of the detector; Depositing aluminum by opening a window for metal bonding; And forming a window to form an oxide film on the aluminum and to form a support for wire bonding.

In the fourth MCNP code, the planar source is incident on the upper surface of the detector. Assume that the planar source is incident only within the effective response area of the detector, and analyze the radiation characteristics of the detector according to the thickness of Al, the radiation energy filter. The thickness of the Al filter was determined to be 1.1 mm using the MCNP simulation results.

The above object and various advantages of the present invention will become more apparent from the preferred embodiments of the present invention described below with reference to the accompanying drawings by those skilled in the art.

2 is an exemplary diagram of MCNP simulation (radiation source and pin diode cross-sectional view) for filter design.

An important parameter to consider in MCNP computational simulation for the filter design of FIG. 2 is the choice of radiation incidence method.

In particular, the MCNP code can simulate various source distributions such as dotted line, line source, planar source, and volume source. However, to simulate as closely as possible the experimental environment, it is necessary to select the correct source distribution.

MCNP simulation in Figure 2 was also simulated by selecting a planar source distribution in order to simulate as closely as possible to the experimental environment.

Referring to FIG. 2, it is assumed that the planar source 101 is incident only within the cross-sectional view of the pin diode, that is, the effective response area 102 of the detector, and the radiation characteristics of the detector are analyzed according to the thickness of Al, which is a radiation energy filter.

Using the MCNP simulation results, the Al filter thickness was determined to be 1.1 mm, and the computer simulation was performed while varying the incident energy of radiation in the range of 20 keV to 3 MeV.

FIG. 3 is a diagram illustrating a computer simulation of analyzing I-V characteristics according to the width of the p + region.

FIG. 3 is a redundancy graph of leakage current with increasing voltage (V), and shows a change in dark current with increasing voltage when the width of the p + region, denoted as-●-, is 0.5 u m. The graph shows a graph showing the change of the dark current with increasing voltage when the width of the p + region called-■-is 1.0 u m.

Comparing the two graphs, it can be seen that the current is not highly dependent on the width of the p + region, but is linearly proportional to the size of the active region.

4 is an example of computer simulations in which current characteristics are analyzed according to the concentration of boron in the p + region.

4 is also a graph of repayment of leakage current with increasing voltage (V), when the concentration of boron referred to as-■-is 3x10 ¹⁴ cm ^-2 and the concentration of boron referred to as-●- Is a graph showing the change of the dark current with increasing voltage at 4x10 ¹⁵ cm ^-2 and 8x10 ¹⁶ cm ^{-2, which} is referred to as-▲-.

Comparing the three types of graphs, it was observed that the current characteristics according to the concentration of boron showed a relatively large difference in the p + region, and the leakage current decreased as the concentration increased.

It can be expected that the higher the concentration, the smaller the minority carrier (minority carrier) concentration, and therefore the leakage current decreases because the number of minority carriers injected into the i region is reduced.

5 to 6 are exemplified computer simulations showing the effect of the guard ring.

5 is a case where there is a guard ring, the hatched portion of the upper edge of the detector is the guard ring and the center hatched portion is the p + region. The electron-hole pair generated at the edge of the detector flows toward the guard ring rather than moving to the p + region, while the attached Fig. 6 is without the guard ring, which causes the electron-hole pair to move to the p + region, resulting in an increase in leakage current. It can be seen.

In the absence of the guard ring, the depletion layer by the p + region can affect the edge of the detector, whereas in the case of the guard ring, the depletion layer by the guard ring extends the depletion layer by the p + region to the edge of the detector. Because it prevents.

FIG. 7 is an exemplary view illustrating computer simulation of the junction profile and junction depth of the p + region according to the dose.

The graph of FIG. 7 shows the change of boron concentration with the distance of an adhesion surface.

The two graphs in the above figure show the comparison of boron concentration at 5x10 ¹⁴ cm ^-2 and 4x10 ¹⁵ cm ^-2 .

Comparing the two graphs of FIG.

8 is a diagram illustrating a computer simulation of impurity redistribution during the heat treatment process.

The graph of FIG. 8 shows the change of impurity concentration with the distance of an adhesion surface.

The two graphs of the exemplary diagrams compare the results before and after the heat treatment.

As can be seen by comparing the two graphs of FIG. 8, during the heat treatment, impurities penetrate deep into the substrate to form a p + region having a relatively uniform concentration, and the peak concentration value at this time is reduced. In addition, it can be seen that when there is no oxide film on the p + region, a considerable amount of impurities diffuse into the atmosphere.

On the other hand, when the oxide film is on the p + region, impurities do not penetrate into the substrate during ion implantation and exist in the oxide film, and the phenomenon that these impurities penetrate into the substrate during the heat treatment process is negligibly small. This means that the leakage current can be made small.

9 to 10 are exemplified computer simulations of radiation response characteristics.

9, the graph shows the results when the incident energy is 22.2 keV.

The graph shows a peak due to the photo electric effect as shown at an incident energy of 22.2 keV and no other energy.

The reason is that when high energy radiation is incident, the effects mainly due to Compton scattering and electron pair pair production are increased.

That is, all of the incident radiation is not absorbed by the detector, and part of the radiation exits to the outside.

This tendency becomes larger as the energy of incident radiation becomes higher, which is why the characteristics of the detector vary according to the incident radiation energy.

10 is an exemplary view of computer simulation of electron generation in a detector according to incident energy changes from 20 keV to 3 MeV.

The number of electrons produced has a minimum value at an incident energy of about 60 keV, from which 70 to 80 electrons are generated per unit incident radiation. The magnitude of the signal corresponding to this value is larger than the threshold value of the detector designed in the present invention. Therefore, the designed detector can be used in the full range of energy mentioned above.

Below 20 keV, no electrons were produced at all because of the shielding effect by the Al filter. Also, above 1.5 MeV, the increase in the number of generated electrons is not linear with energy because the incident radiation escapes to the outside of the detector by scattering. Since the number of electrons produced is not linear with energy, it will be difficult to measure spectra at energies above 1.5 MeV using designed detectors.

In addition, the main process variables include the amount of energy and dose in the ion implantation process for p + region composition, the process for n + region composition, the change of carrier life for gettering, and the redistribution of doping materials in this process. Changes in the lifespan of the carriers were not possible because of computer simulations and other variables were set.

Computational simulations of the doping concentration of the p + layer, the impurity redistribution by heat treatment, and the guard ring effect at the cut surface of the PIN semiconductor detector of FIGS. 4 to 8 were performed using the DAVINCI program. It can be seen that keV can be used in a radiation energy environment of 3 MeV.

11 to 17 are flowcharts of a detector fabrication process according to the present invention.

In order to determine the optimal variable from the computer simulation simulated in FIGS. 3 to 10, TSUPREM-IV, which is a program for analyzing the variable of the semiconductor process, was used to set the variable, and the set process variable and the computer simulation The detector was fabricated using the structure of the PIN semiconductor detector designed through.

The silicon substrate used in the fabrication process used a p-type substrate having a thickness of 250 μm, a diameter of 4 inches, a resistance of 400 Ωcm, and a lattice direction of <100> as a floating zone substrate.

In the fabrication process, an oxide film 200 having a thickness of 1 μm was formed on the front surface of the low resistance silicon substrate 201 in FIG. 11.

In FIG. 12, polysilicon 202 having a thickness of 1 μm is deposited on both sides of the low resistance silicon substrate 201 on which the oxide film 200 is formed, and then gettered on the back surface. Phosphorous (50 keV, 4 × ^{10 15} atoms / cm ⁻² ) was uniformly doped with ion implantation 203 to form n + regions.

13, the polysilicon 202 on the front side is removed, a window for forming the p + region and the guard ring region is formed using photolithography and boron (50 keV, 4x10 ^15). atoms / cm ⁻² ) were deposited at 1 μm.

In FIG. 14, heat treatment was performed at 900 ° C. for 2 hours to remove impurities in region i, and all oxide films contaminated with impurities were removed by wet etching.

In FIG. 15, an oxide film 205 was formed again on the front surface of the silicon substrate in order to deposit the electrode of the detector.

In FIG. 16, photolithography was used to form a window for metal bonding, and 0.1 μm of aluminum was deposited 206 using a sputter.

In FIG. 17, an oxide film 207 was formed on the substrate and a window for forming a pad for wire bonding was completed to complete the detector fabrication process.

When fabricating the detector using the above manufacturing process, the electrode terminal first manufactured the pattern of the electrode terminal using a mask on a copper foil, and then coated silver, especially in the case of the electrode terminal connected to the side of the detector. The electrode terminal pattern was bonded using silver soldering.

Connect the electrode terminal by wire bonding with the detector, passivation with epoxy resin, attach 1.1 mm aluminum energy filter on the front of the detector, and finally with epoxy The coating produced a PIN semiconductor detector.

18 to 21 are comparison diagrams comparing characteristics of a conventional detector, and the graph labeled-■-represents the characteristics of the semiconductor detector according to the prior art, and the graph labeled −-- is the semiconductor detector according to the present invention. It indicates the characteristics of.

18 is a graph showing a change in the dark current ( n A) according to the temperature, and the dark current of the detector according to the temperature was measured as 2 nA at 60 ° C. 19 is a graph showing a change in leakage current p A according to reverse bias. The leakage current was measured at a depletion layer thickness of 250 μm and a reverse bias of 3.6 V at 0.165 nA, and FIG. 20 shows a dark current according to reverse bias. u A) shows a breakdown voltage of 55 V, which is larger than that of conventional detectors.

Therefore, the electrical characteristics of the fabricated detector are shown to be superior to the existing detector as shown in Table 1 attached.

Electrical characteristics Semiconductor detector according to the prior art Semiconductor detector according to the present invention Bias voltage 3.6 V 3.6 V Leakage Current at 3.6 V <3 nA <0.165 nA Capacitor = 1 MHz, 3.6 V 23 pF 8.3 pF Breakdown voltage 32 V 55 V Dark current at 60 ^o C 55 nA 2 nA Dark current at 20 V 3800 nA 450 nA

In addition, in order to test the possibility of use as a detector of a personal dosimeter, the irradiation dose rate was irradiated in the range of 5 mR / h-25 R / h using the Cs-137 source.

The radiation response characteristics of the manufactured detector show good linearity when the radiation coefficient is changed according to the irradiation dose rate as shown in FIG. 21.

While the invention has been shown and described in connection with specific embodiments thereof, it is well known in the art that various modifications and changes can be made without departing from the spirit and scope of the invention as indicated by the claims. Anyone who owns it can easily find out.

The detector of the PIN-type semiconductor detector manufacturing process in the low-resistance Si substrate according to the present invention implemented as described above is a p-layer doping concentration, redistribution of impurities by heat treatment, cutting surface by the guard ring through various computer simulation The leakage current is reduced by analyzing the distribution of currents and the blocking effect of impurities by SiO ₂ during the process, and by applying the variables obtained from the computer simulation results, the effect of excellent characteristics on the low-resistance silicon substrate is obtained. In addition, the radiation measurement energy range of the detector by the PIN-type semiconductor detector manufacturing process for personal dosimeter according to the present invention was confirmed that can be used up to 20 keV-3 MeV, in the radiation response characteristics test for Cs-137 radiation source Since the linearity has been shown to be good, it can be used as a detector for personal dosimeters. The.

Claims (8)

In the method for manufacturing a PIN detector on a low resistance Si substrate, A first step of detecting an experimental value of the doping concentration of the p + layer of the PIN type semiconductor detector, the redistribution of impurities by heat treatment, and the guard ring effect on the cut surface through computer simulation; A second step of determining optimal variables and a structure of a detector from the experimental values according to the first step; And And a third process of applying the variables of the second process to a semiconductor integrated circuit process to fabricate a PIN-type semiconductor detector. The method of claim 1, In order to confirm the possibility that the PIN-type semiconductor detector manufactured according to the third process can be used as a detector of a personal dosimeter, an energy compensation energy filter for 100 keV or less is designed using an MCNP code, and energy of 20 keV to 3 MeV is used. And a fourth process of transferring the radiation response characteristics of the detector in a range. The method of claim 1, Low-resistance Si using the DAVINCI program as a computer simulation method to obtain the experimental value according to the doping concentration of the p + layer of the PIN-type semiconductor detector, the redistribution of impurities by heat treatment and the guard ring effect on the cut surface in the first step Method of manufacturing a PIN semiconductor detector on a substrate. The method of claim 1, In the second process, a method of manufacturing a PIN-type semiconductor detector on a low-resistance Si substrate using a TSUPREM-IV program for analyzing the variables of the semiconductor process to determine the optimal parameters from the experimental values according to the first process. . The method of claim 1, The semiconductor integrated circuit process using the optimal parameters of the second process through the third process applies a gathering technique on the low-resistance Si substrate, and the low-resistance Si substrate, characterized in that the edge of the device has a guard ring structure Method of manufacturing PIN type semiconductor detector in. The method of claim 2, The method of manufacturing a PIN-type semiconductor detector in a low resistance Si substrate, wherein the MCNP code of the fourth step is a planar source is incident on the upper surface of the detector. The method of claim 6, Assuming that the planar source is incident only within the effective response area of the detector, the radiation characteristics of the detector are analyzed according to the thickness of Al, which is a radiation energy filter, and the thickness of the Al filter is determined to be 1.1 mm using MCNP computational results. A method of fabricating a PIN type semiconductor detector in a low resistance Si substrate. The method of claim 1, The third process is Forming an oxide film on the front surface of the low resistance silicon substrate; Depositing polycrystalline silicon on both surfaces of the low resistance silicon substrate on which the oxide film is formed, and then implanting ions for gettering on the back surface to form an n + region; Forming a window and depositing boron to remove the polycrystalline silicon on the front surface and form a p + region and a guard ring region; performing a heat treatment to remove impurities in region i and removing an oxide film contaminated with impurities for a subsequent process; Forming an oxide film on the front surface of the silicon substrate to deposit the electrode of the detector; Depositing aluminum by opening a window for metal bonding; And forming a window for forming an oxide film on the aluminum and forming a support for wire bonding.