KR100444491B1 - Power circuit for decreasing ripple and method thereof - Google Patents

Abstract

The power supply circuit for the ripple reduction according to the present invention provides a power supply circuit and a ripple reduction method for the ripple reduction, which can be selectively operated so that its output characteristics are lowered when the pumping operation is performed for a relatively low reference voltage. The purpose is to provide.

In order to achieve the above object, the present invention provides an oscillation generator for generating a clock signal; An option unit for determining an output voltage according to a selection input signal for determining an operation mode of the entire circuit; A selection circuit for generating and outputting an enable signal and a disable signal when the output voltage determined by the option unit is a low level voltage capable of ripple generation; A regulator for outputting a stabilized signal through a comparison operation with an externally input reference voltage according to the voltage determined by the option unit; A frequency divider for dividing the frequency of the clock signal received from the oscillation generator by two divisions when the enable signal is received; And a two-stage pump circuit, performing a pumping operation by a signal output from the frequency divider and a stabilization signal input from the regulator, to generate a substrate voltage, and to generate the substrate voltage by the disable signal. It operates only one stage to generate a substrate voltage, and includes a pumping unit for outputting the substrate voltage to the outside.

Description

Power Circuit and Ripple Reduction Method for Ripple Reduction {POWER CIRCUIT FOR DECREASING RIPPLE AND METHOD THEREOF}

TECHNICAL FIELD The present invention relates to a power supply circuit, and more particularly, to a power supply circuit and a ripple reduction for ripple reduction in which only one of the two stage pump stages is operated to improve the ripple of the output voltage for a specific operating mode of the pumping circuit. It is about a method.

In general, a power supply circuit applies a substrate voltage of a memory cell. In general, a power supply circuit includes a two-stage pump circuit and drives all of them, but does not change a clock frequency.

FIG. 1 is a block diagram illustrating a conventional power supply circuit, which includes an oscillation generator that generates a clock signal for driving the pumping unit 104 and outputs the generated clock signal to the pumping unit 104 ( 101); An option unit 102 receiving a selection input signal for determining an operation mode of the entire circuit, and selecting one of six output ports of 4 to 9 V to output a voltage; The regulator which compares the voltage output from the option unit 102 with a reference voltage input from the outside, and controls and adjusts the current value so that the voltage output from the option unit 102 is suitable for the pumping unit 104. (103); And a two-stage pump circuit, the pumping unit 104 generating a substrate voltage by pumping an output of the oscillation generator 101 according to the adjustment value input from the regulator 103, and outputting the generated substrate voltage to the outside. ).

In the above-described conventional power supply circuit, since a lot of ripple occurs in the output voltage in a specific mode, there is a problem that the characteristics of the 4V output voltage is not good. That is, since the clock frequency is high compared to the capacitance value of the pumping unit 104, the reference voltage is small compared to the pumping capability, so that it is difficult to converge to the value.

In order to solve the above problems, the present invention provides a power supply circuit for reducing ripple and a method for reducing ripple in a case of performing a pumping operation with a relatively low reference voltage, so that the output characteristic is lowered. The purpose is to provide.

1 is a block diagram showing a conventional power supply circuit,

2 is a block diagram showing a power supply circuit for reducing ripple according to an embodiment of the present invention;

3 is a flowchart illustrating a ripple reduction method of a power supply circuit according to an exemplary embodiment of the present invention.

Explanation of symbols on the main parts of the drawings

201: Oscillation Generator

202: option

203: selection circuit

204: Regulator

205: frequency divider

206: pumping part

In order to achieve the above object, a power supply circuit for reducing ripple of the present invention includes an oscillation generator for generating a clock signal; An option unit for determining an output voltage according to a selection input signal for determining an operation mode of the entire circuit; A selection circuit for generating and outputting an enable signal and a disable signal when the output voltage determined by the option unit is a low level voltage capable of ripple generation; A regulator for outputting a stabilized signal through a comparison operation with an externally input reference voltage according to the voltage determined by the option unit; A frequency divider for dividing the frequency of the clock signal received from the oscillation generator by two divisions when the enable signal is received; And a two-stage pump circuit, performing a pumping operation by a signal output from the frequency divider and a stabilization signal input from the regulator, to generate a substrate voltage, and to generate the substrate voltage by the disable signal. It operates only one stage to generate a substrate voltage, and includes a pumping unit for outputting the substrate voltage to the outside.

In addition, in order to achieve the above object, the ripple reduction method of the present invention, in the ripple reduction method applied to the power supply circuit having an output voltage in the range of 4 ~ 9V through a two-stage pumping operation, an option voltage which is a selection value of the output voltage A checking step of checking whether this is 4V; A dividing step of adjusting the frequency of the pumping clock signal to a low level through the dividing operation when the option voltage is 4V; And generating a substrate voltage having reduced output characteristics by operating only one pump in accordance with the clock signal generated by the division step.

Hereinafter, the most preferred embodiments of the present invention will be described with reference to the accompanying drawings so that those skilled in the art can easily implement the technical idea of the present invention. .

First, FIG. 2 is a block diagram illustrating a power supply circuit for reducing ripple according to an embodiment of the present invention. The power supply circuit for reducing ripple according to the present invention includes an oscillation generator 201, an option unit 202, and a selection. The circuit 203, the regulator 204, the frequency divider 205 and the pumping unit 206 are included.

The oscillation generator 201 generates a clock signal and outputs the clock signal to the frequency divider 205 described later.

In addition, the option unit 202 receives a selection input signal for determining the operation mode of the entire circuit, selects one port among six output ports of 4 to 9 V, and selects a selection circuit 203 to be described later and a regulator to be described later. 204 serves to output the option voltage. That is, the circuit selects and outputs only one of the six outputs according to the selection input signal for determining the operation mode so that the voltage value corresponding to the operation mode can be output.

On the other hand, the selection circuit 203 detects that a specific signal of a plurality of outputs in the option unit 202 has become a second logic step-'high'-and thus the frequency divider described later. The enable signal is output to 205 and the disable signal is output to the pumping unit 206 described later.

In addition, the regulator 204 receives the option voltage output from the option unit 202 and compares the value to the value selected by the option unit 202 through a comparison operation with a reference voltage input from the outside. It outputs a stabilization signal to the pumping unit 206 to be described later so that the output value of the pumping unit 206 is set. Here, the regulator 204 uses a method of controlling and adjusting the current value as a method of setting the output value of the pumping unit 206 described later.

On the other hand, the frequency divider 205, when receiving the enable signal from the selection circuit 203, divides the frequency of the clock signal received from the oscillation generator 201 for two pumping unit 206 to be described later If the enable signal is not input from the selection circuit 203, the clock signal received without the division operation is output to the pumping unit 206 which will be described later.

In addition, the pumping unit 206 includes a two-stage pump circuit, and generates a substrate voltage by performing a pumping operation based on a stabilization signal input from the regulator 204 and a signal output from the frequency divider 205. When the disable signal is input from the selection circuit 203, only one stage of the two-stage pump circuit is operated to generate a substrate voltage, and the substrate voltage is externally output. It plays a role as output.

3 is an operation flowchart illustrating a ripple reduction method of a power supply circuit according to an embodiment of the present invention, the ripple reduction method of the present invention is as follows.

First, when the selection input signal is input to the option unit 202, the option unit 202 selects one of six voltages ranging from 4V to 9V and outputs it to the port. At this time, the selection circuit 203 checks whether the option voltage output from the option unit 202 is 4V (S301).

When the option voltage is 4V, the selection circuit 203 outputs an enable signal to the frequency divider 205 to allow the frequency divider 205 to perform a divide operation and at the same time, the pumping unit 206. The low disable signal is output so that only one stage of the two stage pump is operated in the pumping unit 206 (S302).

Subsequently, the frequency divider 205 adjusts the frequency of the clock signal input from the oscillation controller 201 through the dividing operation and outputs the low frequency signal to the pumping unit 206 (S303). ).

Next, the pumping unit 206 operates only one pump to supply a substrate voltage having reduced output characteristics (S304).

If the option voltage is not 4V, the clock signal that has not undergone the frequency division process is pumped through the two-stage pump of the pumping unit 206 and then supplied to the substrate voltage (S305).

As described above, the present invention can be substituted, modified, and changed in various ways without departing from the technical spirit of the present invention by those skilled in the art. It is not limited to the drawings shown.

According to the present invention, by varying the driving capability of the pumping unit used in the conventional power supply circuit according to the mode, the reference voltage is smaller than the pumping capability and converges to the value because the clock frequency is high compared to the capacitance value of the pumping unit. It has the advantage of solving difficult problems.

Claims (3)

An oscillation generator for generating a clock signal; An option unit for determining an output voltage according to a selection input signal for determining an operation mode of the entire circuit; A selection circuit for generating and outputting an enable signal and a disable signal when the output voltage determined by the option unit is a low level voltage capable of ripple generation; A regulator for outputting a stabilized signal through a comparison operation with an externally input reference voltage according to the voltage determined by the option unit; A frequency divider for dividing the frequency of the clock signal received from the oscillation generator by two divisions when the enable signal is received; And A two-stage pump circuit, a pumping operation is performed by a signal output from the frequency divider and a stabilization signal input from the regulator to generate a substrate voltage, and one of the two-stage pump circuits is generated by the disable signal. A pumping unit which generates a substrate voltage by operating only a stage and outputs the substrate voltage to the outside Power supply circuit for ripple reduction, comprising a. In the ripple reduction method applied to a power supply circuit having an output voltage in the range of 4 ~ 9V through a two-stage pumping operation, A checking step of checking whether an option voltage which is a selected value of the output voltage is 4V; A dividing step of adjusting the frequency of the pumping clock signal to a low level through the dividing operation when the option voltage is 4V; And Generating a substrate voltage with reduced output characteristics by operating only one stage of pump according to the clock signal generated by the division step Ripple reduction method of a power supply circuit comprising a. The method of claim 2, If the option voltage is not 4V, generating a substrate voltage by operating both pumps in accordance with a clock signal not subjected to the frequency division process. Ripple reduction method of a power supply circuit comprising a.