KR100440971B1 - Y driving apparatus of a PDP - Google Patents

Abstract

The present invention relates to a driving circuit of a plasma display panel (hereinafter referred to as PDF), and more particularly, to a Y driving device for generating a Y driving potential.

According to another aspect of the present invention, a Y driving device includes: a Y driving device for initializing all cells of a PDP panel by a ramp pluse in a reset period of a sub feed in an ADS-type PDP device, comprising: a first switch Ys for switching a scan voltage Vs; An integrating circuit connected in series between a reset voltage Vset and the first switch Ys to form a rising section of a ramp pulse in a reset section; A second switch Ys1 interposed between the connection point of the first switch and the integrating circuit and the Y electrode of the PDP; And a third switch interposed between an integrated voltage drawing point of the integrating circuit and a Y electrode of the PDP, wherein the first switch Ys is turned on in a rising section of the ramp pulse and off in a falling section. The second switch Ys1 and the third switch Yrr may be turned off in the rising section of the ramp pulse and turned on in the falling section.

The Y drive device according to the present invention makes it possible to reduce the cost by simplifying the configuration of the Y drive device by excluding a switching element for switching a large current between the Y electrode and the energy recovery circuit.

Description

Y driving apparatus of a PDP

The present invention relates to a driving circuit of a plasma display panel (hereinafter referred to as PDF), and more particularly, to a Y driving device for generating a Y driving potential.

Expectations for flat panel displays as a key device in the information age and multimedia era are very high. Flat panel displays have a wall-mounted TV, one of the final goals, and panel methods such as LCD, PDP, and EL are competing with each other to realize this.

Among them, LCD is the most complete flat panel panel, and the market has expanded rapidly, mainly for PC. However, LCDs are limited in large screens, and attention has been focused on other types of display devices. Among them, PDP, which emits ultraviolet light by micro cell discharge and emits phosphors, is expected to be a large-screen wall-mounted TV with a fragrance of over 40 inches, which is difficult to realize in CRTs and LCDs.

PDP operates on the principle of exciting visible light by exciting fluorescent material of cell four using vacuum ultraviolet rays generated in half well. In this process, it takes several steps from the input power to the final visible light, and the energy conversion efficiency in each of these processes is not good, which is only 1/3-1/5 of the CRT, which is an obstacle to practical use.

In case of AC PDP, the capacitance of panel causes reactive power loss due to charging and discharging during driving. Therefore, it is known to use an energy recovery circuit for recovering and recycling the energy stored in the PDP panel as part of measures for reducing the power consumption of the PDP. Most energy recovery circuits use LC resonant circuits and have been used in most PDPs since they were proposed by the University of Illinois.

However, the energy recovery circuit is connected in series to the Y electrode, and the Y drive device drives the energy recovery circuit to be separated from the Y electrode in the reset period. Since a large driving current flows through the energy recovery circuit and the switch for opening and closing the Y electrode, heat and stress problems occur, and several FETs are connected in series to be simultaneously turned on and off.

Accordingly, there is a problem that a large installation space is required on the PCB because the driving circuit is complicated and heatsink is used to dissipate heat generated from the FET. In addition, since a large current must be driven through the FET, there may be a problem in reliability.

It is an object of the present invention to provide an improved Y drive device which is designed to solve the above problems.

Figure 1 shows the timing sequence of the ADS method.

2 illustrates a gradation representation concept applied in a PDP.

3 is a waveform diagram illustrating a potential change of the Y driver according to the ADS driving method.

FIG. 4 is a circuit diagram showing the configuration of a conventional Y drive device for generating the Y drive potential shown in FIG.

5 is a circuit diagram showing a detailed configuration of a Y drive device according to the present invention.

Y drive device according to the present invention for achieving the above object is

In the Y drive unit for initializing all the cells of the PDP panel by ramp pluse in the reset period of the sub-feed in the ADS-type PDP device,

A first switch Ys for switching the scan voltage Vs;

An integrating circuit connected in series between a reset voltage Vset and the first switch Ys to form a rising section of a ramp pulse in a reset section; And

A second switch Ys1 interposed between the connection point of the first switch and the integrating circuit and the Y electrode of the PDP; And

A third switch interposed between an integrated voltage drawing point of the integration circuit and a Y electrode of the PDP;

Here, the first switch Ys is turned on in the rising section of the ramp pulse and off in the falling section, the second switch Ys1 and the third switch Yrr is off in the rising section of the ramp pulse and on in the falling section. It is done.

Hereinafter, the configuration and operation of the present invention will be described in detail with reference to the accompanying drawings.

As is well known, a PDP driving method is largely divided into a DC driving method and an AC driving method according to a voltage application method.

The DC driving method is applied to a structure in which the discharge electrode is exposed to the wet space, and can be classified into a refresh method and a pulse memory method.

The Fefresh method was commercialized as a small lap top (mono color) until the late 80s, and now some companies are commercializing it for multi-screen (TILE type) using the DC Refresh method.

In the case of DC driving method, the pulse memory driving method proposed by NHK broadcasting technology research institute of Japan and the townsend-discharge method proposed by HITACHI are typical examples.

On the other hand, in the case of the AC driving method, the PDP is applied to the structure in which the discharge electrode is coated with the dielectric, and most of the PDPs currently commercialized employ the AC driving method.

In order to display an image with AC PDP using memory characteristics, it basically goes through 4 steps. First, the cell selected in the Scan step (also referred to as scanning and addressing) and the addressing period are specified. It is divided into Sustain stage to keep the discharge continuously, Erasing stage to remove the wall charge inside the cell, and Reset stage to make all the cells uniform to display the new image. .

Meanwhile, depending on whether the scan step and the sustain step are separated in time or simultaneously, the scan step and the sustain step are divided into an ADS (Address Display Separated) driving method and an AWD (Address While Display) driving method.

The driving method that is mainstream in the three-electrode surface discharge type AC PDP structure that is currently commercialized is the ADS driving method developed by Fujitsu of Japan. Most PDP companies basically adopt the ADS driving method to realize high brightness and high contrast. Each company has its own way of doing things.

The ideas applied by each company have been proposed to improve the dark contrast, which is closely related to the driving method, and to improve the luminance by increasing the display period within one field, especially within one frame (frame 16.7ms). It is a method of adjusting the intensity of each sub-feed for the reset pulse applied to each sub-frame (8-12), or applying a reset pulse to only the first sub-frame within one frame, or a reset pulse. The method of applying the form of a square wave (rectangulat pulse) / exponential pulse (exponential pulse) / ramp wave (ramp pulse) is applied.

The ADS driving method is the most common method currently applied to the product. The feature of this method is that the frame is divided into several subframes, and each subframe is divided into (1) a reset period (full screen write and erase), (2) a scan period, and (3) a sustain period.

Figure 1 shows the timing sequence of the ADS method. In the reset period of (1), the entire cell is made uniform through full-screen write discharge and full-screen erase discharge in order to eliminate the effects on subsequent subsequent feeds or frames after the end of the feed or frame. In this way, a write error can be prevented in the scan period and stable scan discharge can be realized.

(2) In the scan period, cells to be displayed are sequentially designated for all scan lines, and are classified into a selective writing method and a selective erasing method.

(3) In the sustain period, an external sustain pulse is applied to the selected cell (wall charge accumulated) in the scan period (actual cell gap voltage is the wall voltage + externally applied voltage) to sustain sustain discharge. This section is related to brightness.

In general TV, it is possible to display one frame as two or more odds, but in the case of PDP, one frame (16.7ms) is composed of eight or more subframes to display Full Color by Memory method. It is necessary to display more than 480 (8 x 60) screens in one second.

2 illustrates a gradation representation concept applied in a PDP.

First, when the brightness of the first subframe SF is set to "1", the second SF is weighted so that the second SF is 4, the third SF is 4, and the eighth SF is 128. The weight of each of these subframes is determined as the number of Sustain pulses.

The scan period of each SF corresponds to approximately 1.5 ms (480x3us). Therefore, the time taken for one frame (16.7ms) occupies 12ms (1.5x8).

The remaining 4ms are allocated for the entire sustain period, and the brightness of each subframe is proportional to the number of sustain cycles.

3 is a waveform diagram illustrating a potential change of the Y driver according to the ADS driving method.

As shown in FIG. 3, the reset section includes three sections T1-T3, the scan section includes three sections T4-T6, and the sustain section also includes three sections T7-T9. Here, Vs represents sustain potential.

The Reset pulse shown in FIG. 3 is a so-called ramp pulse to help improve contrast. When using a ramp pulse, the background light can be reduced by initiating a weak discharge. In particular, a high contrast can be achieved by initializing all cells only in the first sub-feed and only the cells having sustained discharge in the remaining sub-feeds. . In addition, the PDP using an asymmetric cell structure can absorb variations in the discharge voltage due to nonuniformity in the panel regardless of the difference in discharge characteristics due to the difference in cell widths, thereby simultaneously improving color temperature and contrast. can do.

In the reset section, the T1 section is the period of raising the Y potential to Vs + Vset (Reset rise), the T2 section is the period of pulling the Y potential to Vs, and the T3 section is the period of completely discharging the Y potential (Reset fall). to be.

In the sustain section, T7-T9 constitute one sustain pulse, and the number of these sustain pulses differs for each sub feed. In the Sustain section, T7 is a section that raises the Y driving potential to Vs and uses the energy stored in the energy recovery circuit, and the T8 section is a section for maintaining the sustain potential by applying Vs, and T9 is a Y driving potential. The energy stored in the panel is recovered by the energy recovery circuit as a sustain fall period.

FIG. 4 is a circuit diagram showing the configuration of a conventional Y drive device for generating the Y drive potential shown in FIG. In the apparatus shown in Fig. 1, reference numeral 102 denotes an energy recovery portion, and 104 denotes a Y electrode of a PDP panel. In addition, Ys is a switch for supplying sustain potential, Yg is a switch for supplying Y potential, Yfr is a switch for reset fall, Yp is a switch that is turned off at the reset interval and always on, and Yrr is a reset rise waveform Ysc is a switch for supplying the scan potential, Ysp is a switch that cuts the reverse voltage when supplying the scan potential and is turned on when the Y drive is discharged, Y1 is a switch that is turned on when the Y drive is discharged, and turned off when charging , Y2 is a switch that is turned off when the Y drive is discharged and turned on when charging. On the other hand, Dset is a diode for preventing the reverse flow of Vset, Dscan is a diode for preventing the reverse flow of Vscan, Rset and Cset are for forming a standing portion of the ramp pulse as a resistor and a capacitor for the reset.

The operation of the apparatus shown in FIG. 4 is as follows.

1. In the T1 section, Ys and Yrr are on, and Yg, Yp, Yfr, Ysp, Ysc, and Y1 are off. As a result, the Y potential gradually rises to Vs + Vset, depending on Rset and Cset.

2. In the T2 section, Ys, Yp, and Y2 are on, and Yg, Yrr, Yfr, Ysc, Ysp, and Y1 are off, so the Y potential drops to the Vs potential.

3. In the T3 section, Yfr, Yp, Ysp, and Y1 are on, and Ys, Yg, Yrr, Ysc, and Y2 are off, and the Y potential is completely discharged.

4. In the sections T4 and T6, Yg and Yp are on and discharged, while Ysc is on and the Y potential becomes Vscan level.

5. In section T5, Yg and Yp are on and all the other switches are off so that the Y potential is completely discharged.

6. In the T7 section, Yp, Ysp, and Y2 are turned on so that the Y potential reaches almost the sustain potential by the energy recovery unit 102.

7. In the T8 section, Ys, Yp, and Ysp are turned on so that the Y potential maintains the sustain potential.

8. In the T9 section, Yp, Ysp, and Y1 are turned on, and the remaining switches are turned off, and the power occupied by the PDP panel is recovered to the energy recovery unit 102.

In this operation, Yp is turned off only in the reset section and remains on in other sections. Since Yp has a large Y driving current, it causes heat and stress problems. Therefore, several FETs are connected in series to be turned on and off simultaneously.

Accordingly, there is a problem that a large installation space is required on the PCB because the circuit is complicated and heatsink is used to release heat generated from the FET. In addition, there was a problem in reliability because a large current must be driven through the FETs.

5 is a circuit diagram showing a detailed configuration of a Y drive device according to the present invention.

In FIG. 5, the same reference numerals are attached to the members that perform the same operation as the apparatus shown in FIG. 1, and detailed description thereof will be omitted. The difference from the device shown in FIG. 4 in the device shown in FIG. 5 is that Yp, which caused heat and stress problems, is removed, and to compensate for this, Ys1 is added and the connection position of Cset is changed. Here, Ys1 is a switch for supplying sustain potential with Ys.

In FIG. 5, the device for forming the ramp pulse in the reset section is connected in series between the switch Ys for switching the scan voltage Vs, the reset voltage Vset, and the switch Ys, and integrates to form a rising section of the ramp pulse in the reset section. A circuit, a switch Ys1 interposed between the connection point of the switch Ys and the integrating circuit and the Y electrode of the PDP, and a switch Yrr interposed between the integrated voltage pull-out point of the integral circuit and the Y electrode of the PDP. Here, Ys, Ys1, and Yrr respectively correspond to the first switch, the second switch, and the third switch in the summary of the present invention.

Here, Ys is on in the rising section of the ramp pulse and off in the falling section, Ys1 and Yrr are off in the rising section of the ramp pulse and on in the falling section.

The operation of the apparatus shown in FIG. 5 will now be described in detail.

1. In the T1 section, Ys, Yrr, Y2 is on, and Yg, Yp, Yfr, Ysp, Ysc, and Y1 are off. As a result, the Y potential gradually rises to Vs + Vset, depending on Rset and Cset.

2. In the T2 section, Ys, Ys1, Y2 is on, Yg, Yrr, Yfr, Ysc, Ysp, Y1 are off and the Y potential drops to the Vs potential.

3. In the T3 section, Yfr, Ysp and Y1 are on and Ys, Yg, Yrr, Ysc and Y2 are off so that the Y potential is completely discharged.

4. In the sections T4 and T6, Yg is on and discharged, while Ysc is on, the Y potential becomes Vscan level, and Ys, Yfr, Ys1, Yrr, Ysc, Ysp, and Y2 are off.

5. In section T5, Yg is on and all other switches are off.

6. In the T7 section, Ysp and Y2 are turned on so that the Y potential reaches almost the sustain potential by the energy recovery unit 102.

7. In the T8 section, Ys, Ys1, and Y2 are turned on so that the Y potential maintains the sustain potential.

8. In the T9 section, Ysp and Y1 are turned on, and the remaining switches are turned off, and the power occupied by the PDP panel is recovered to the energy recovery unit 102. In the apparatus shown in FIG. 5, Ys1 is turned off in the reset section to block Vs from being directly connected to the Y potential, and a ramp pulse is formed by applying Vs to the Y potential through Cset during the T1 section of the reset section. .

Through this operation, while generating the Y driving potential as shown in FIG. 3, it is possible to exclude the switch Yp between the Y electrode and the energy recovery circuit during the reset period.

The Y drive device according to the present invention simplifies the configuration of the Y drive device by excluding a switching element for switching a large current between the Y electrode and the energy recovery circuit, thereby reducing the cost, and eliminating the use of a heat sink, thereby eliminating the use of a PDP TV. The thickness can be reduced, and heat generation in the PDP can be reduced.

Claims (1)

In the Y drive unit for initializing all the cells of the PDP panel by ramp pluse in the reset period of the sub-feed in the ADS-type PDP device, A first switch Ys for switching the scan voltage Vs; An integrating circuit connected in series between a reset voltage Vset and the first switch Ys to form a rising section of a ramp pulse in a reset section; And A second switch Ys1 interposed between the connection point of the first switch and the integrating circuit and the Y electrode of the PDP; And A third switch interposed between an integrated voltage drawing point of the integration circuit and a Y electrode of the PDP; Here, the first switch Ys is turned on in the rising section of the ramp pulse and off in the falling section, the second switch Ys1 and the third switch Yrr is off in the rising section of the ramp pulse and on in the falling section. Y drive unit.