KR100440586B1 - Line interface module and routing system - Google Patents

Abstract

The present invention relates to a line interface module having a sub-switching function of a router. Each line card module includes a sub-switching function that complements a limited switch capacity in a routing system, thereby accommodating a plurality of low-speed line interfaces, The line interface module can be easily expanded, and a certain number of line interfaces can be bundled together to form a single line interface module, and the line interface module can be used as a basic unit for troubleshooting, inter-processor connection, and switch matching. To increase the scalability of the system, reduce the cost of the system, and simplify the system configuration.

Description

Line interface module of router and routing system having same {LINE INTERFACE MODULE AND ROUTING SYSTEM}

The present invention extends the number of line interfaces of the system through the sub-switching function inside the line interface module in the routing system, binds a certain number of line interfaces to form one line interface module, and breaks the line interface module as a basic unit. The present invention relates to a line interface module of a router capable of performing management, processor-to-processor connection, switch matching, and the like, and a routing system implemented using the same.

A router is a device that connects separate networks using the same transport protocol. The router connects network layers with each other, determines nodes in different networks or its own networks according to a routing table, and determines the most efficient path among the various routes. By sending packets selectively, the router performs flow control, configures multiple subnetworks within the internetwork, and performs various network management functions.

Such a routing system has a centralized method of routing data packets from a plurality of line interfaces by one routing processor to the corresponding line interface, routing routing information and processing to each line interface, and routing at the line interface. There is a distributed method that transmits to the corresponding line interface via a switch.

However, the conventional routing system has a disadvantage that it is difficult to implement a hierarchical and structural management system in the configuration of a large-capacity router having a plurality of line cards by performing fault management and operation management by individual board units.

In addition, the existing individual board-based management system for processor-to-processor Ethernet communication in a routing system adds difficulty to the implementation of redundancy of Ethernet switching devices and Ethernet paths that connect all line cards and main processors point-to-point. Increase

In general, if you increase the number of low-speed line interfaces in a router, the number of links between the switch and the line interfaces determines the number of scalable line interfaces. Therefore, in order to easily increase the number of low-speed line interfaces and to easily expand the high-speed line interface, an optimized link extension method between the line interface module and the switch is required.

SUMMARY OF THE INVENTION The present invention has been proposed to solve the above-mentioned conventional problems, and an object thereof is to include a sub-switching function in a line interface module that complements a limited switch capacity in a routing system, and combines a predetermined number of line interfaces into one line. It is to provide a line interface module of a router configured as an interface module, the line interface module to perform the failure management, processor-to-processor connection, switch matching, etc. as a basic unit and a routing system having the same.

1 is a block diagram showing a line interface module according to the present invention.

2 is a diagram illustrating a communication path (IPC) between processors in a line interface module according to the present invention.

3 is a diagram illustrating a JTAG chain configuration for generating an alarm signal in a line interface module according to the present invention.

Fig. 4 is a block diagram showing an example of a JTAG chain configuration in a line card.

5 is a diagram illustrating a configuration example for generating an alarm signal in a line card.

6 is a view showing an example of the structure of the apparatus by the line interface module according to the present invention.

* Description of the symbols for the main parts of the drawings *

10: line interface module

11, 12: line card

13: sub switch card

14: backplane

15: CSIX

In order to achieve the above object, the line interface module of the routing system according to the present invention

Physical link port, physical layer matching unit, network processor hardware handling packet switching and forwarding function of OSI model network layer and transport layer, initialization, management, status report and data packet of each device in card Two or more line cards comprising a processor to perform work related to the processing;

A sub-switch for sub-switching data coming from the line card and the switch input / output buffer to a desired data channel, a switch input / output buffer for buffering data input / output between a switch of the routing system and the sub-switch, and initialization of each device in the card A sub-switching card comprising a processor for performing tasks related to management, status reporting and data packet processing; And

And a backplane connecting the line cards and the sub switching card.

In addition, the apparatus includes an Ethernet switch for connecting the processors of the line card and the sub-switching card and the main processor of the routing system by Ethernet, the processor of the line card and the sub-switching card and the main processor and the Ethernet of the routing system. It is characterized in that the switch is connected to the processor-to-processor communication channel (IPC) via Ethernet.

In addition, in the above configuration, the inter-processor communication channel (IPC) with the Ethernet switch with the main processor of the routing system is redundant, thereby increasing reliability.

In addition, the apparatus according to the present invention forms a JTAG chain by connecting the devices in the line card and the sub-switching card in a data chain structure, and performs address allocation and on / off functions of the JTGA chain in the line card and the sub-switching card. A JTAG transceiver to perform, and a JTAG master to connect the JTAG chain to an alarm board of a routing system with JTAG address assignment and on / off functions in a line interface module on the backplane, Characterized in that it is possible to check the status of each card.

According to the above configuration, the present invention can manage the system in a module unit, thereby reducing the cost of the system, managing the system configuration, and increasing the scalability of the line interface. In addition, the sub-switching function within the line interface module increases the number of links between the line interface module and the switch, thereby easily expanding the number of line interfaces in the system.

Hereinafter, with reference to the accompanying drawings will be described an embodiment according to the present invention; In the following embodiment, for the sake of convenience, two line cards are provided as an example, but the present invention is not limited thereto and may be further expanded according to the basic concept of the present invention.

1 is a block diagram schematically showing the configuration of a line interface module implemented by the present invention, wherein the line interface module 10 includes a line card 11 and 12, a sub-switch 131 and a switch input / output buffer ( A sub switching card 13 including 133 and 134 and a backplane 14 connecting the line cards 11 and 12 and the sub switching card 13 to each other.

The line cards 11 and 12 include physical link ports 111, 114, 121, and 124, physical layer matching units 112, 115, 122, and 125, and network processors 113, 116, 123, and 126 as components for data processing. The line cards 11 and 12 may perform POS, GE, 10 / 100Mbps, and ATM signal matching functions according to the physical link ports 111, 114, 121, 124, and the physical layer matching units 112, 115, 122, and 125. The network processors 113, 116, 123, and 126 hardware-process packet switching and forwarding functions of the Open System Interconnection (OSI) 3/4 + layer.

The backplane 14 connects the line cards 11 and 12 and the sub-switching card 13 to each other using a CSIX (Common Switch Interface) 15 as a physical connection.

In addition, the sub-switching card 13 includes a sub-switch 131 and switch input / output buffers 133 and 134. The sub-switch 131 includes data coming from the line cards 11 and 12 and switch input / output buffers 133 and 134. Sub-switching the incoming data to the desired data channel, the switch input and output buffers 133, 134 buffers the data input and output between the switch (not shown) of the routing system and the sub-switch 131.

The line interface module 10 configured as described above is matched with the switch through the switch link 16 of the switch input / output buffer 133.

FIG. 2 is a block diagram illustrating an interprocessor communication (IPC) path configuration in the line interface module 10 configured as shown in FIG. 1. Although not shown in FIG. 1, the line cards 11 and 12 are not shown in FIG. In addition to the network processors 113, 116, 123 and 126, processors 117 and 127 are provided to perform tasks related to initialization, management, status reporting and data packet processing of each device in the line cards 11 and 12. The sub-switching card 13 also has a processor 135 that performs initialization, management, status reporting, etc. of each device in the board. In addition, the sub-switching card 13 includes an Ethernet switch 137 for connecting the above-described processors 117, 127, and 135 to the main processors MP1 and MP2 of the routing system through Ethernet.

The processor 117 and 127 of the line cards 11 and 12, the main processors MP1 and MP2 of the router, and the processor 135 of the sub-switching card 13 are connected through Ethernet channels 21 to 25, respectively. Is connected to the switch 137.

In the above, the IPC channel between the main processor and the line interface module is duplicated (22, 23) to increase the reliability in inter-processor communication.

3 is a block diagram showing a JTAG chain configuration for configuring an alarm system in a line interface module according to the present invention. The JTAG chain 35 is provided on the line cards 11 and 12 and the sub-switching card 13 for board test and management. , 36, 37, and each board is provided with JTAG transceivers 32-34 which perform address allocation and on / off functions of the JTGA chain, and the backplane 14 has a JTAG address of the line interface module 10. A JTAG master 31 connects the JTAG chain in the module with the system's alarm board with assignment and on / off functions. Through the JTAG chain structure as described above, the main alarm board of the system can hierarchically and systematically check each line interface module constituting the system.

FIG. 4 is a block diagram showing an embodiment of the JTAG chain configuration in the line cards 11 and 12. The test data input signal 41 and the test data output signal 47 are line cards 11 and 12. As shown in FIG. Daisy-chained components within the field, field programmable gate array (FPGA) 42, processor 43, network processor 44, FPGA 45, and physical layer device 46 The test clock signal 48, the test mode selection signal 49, and the test reset signal 50 are connected in parallel to the above-described devices through the buffer 51 in consideration of the fan-out of the signal. To configure.

5 is a block diagram schematically illustrating generation of an alarm signal informing of an abnormality of the line cards 11 and 12. As shown, the JTAG master 31 of the backplane 14 informs the alarm board of the system of the basic operating state, power state, and mounting state collected from the line cards 11 and 12. The pull-down resistor 53 of the FPGA / CPLD 51, the power monitor 52, and the backplane 14 is provided to generate the status signal.

The FPGA / CPLD 51 receives and combines signals 54 representing normal operation from each device provided in the line cards 11 and 12 to generate a basic operation state signal. The power monitor 52 monitors the level 55 of the main voltage used by the line cards 11 and 12 to generate a power state signal.

The signal indicating the mounting state is connected to the ground of the line cards 11 and 12 by connecting the pull-down resistor 53 of the backplane 14 to the ground of the board, and to low when the board is mounted. To know the mounting and hernia information of the line card.

6 is a diagram illustrating a mechanical arrangement of the line interface module configured as described above. The line interface module 62 has a modular structure that is physically independent of the router system, and the switch 64 and the main processor of the routing system. 65 is connected to the serial cable (67, 68).

At this time, the mechanical structure of the routing system is composed of a rack 61 and the chassis 63, the line interface module 62 according to the present invention is not fixed to a specific position of the mechanism and the arrangement is free.

The present invention, as described above, by combining the line interface in a certain number of units through the sub-switch to configure the module unit in terms of system management can reduce the cost of the system than when managing by individual board unit, and can simplify the system configuration It also has the effect of increasing the scalability of the line interface, and the sub-switching function in the line interface module also increases the number of matching links between the switch and the line interface module to expand the system capacity and facilitate the expansion of multiple low-speed line interfaces. Has an excellent effect.

In addition, by performing the line management module as a basic unit, failure management, inter-processor connection, switch matching, etc., there is an excellent effect of reducing the cost of the routing system and simplifying the configuration.

Claims (8)

In a line interface module of a routing system consisting of a line interface, a switch, and a main processor, Physical link port, physical layer matching unit, network processor that handles packet switching and forwarding functions of network layer and transport layer of OSI model, hardware initialization, management, status report and data packet processing of each device in card. Two or more line cards comprising a processor to perform work associated with the; And, A sub-switch for sub-switching data coming from the line card and the switch input / output buffer to a desired data channel, a switch input / output buffer for buffering data input / output between a switch of the routing system and the sub-switch, and initialization of each device in the card A sub-switching card comprising a processor for performing tasks related to management, status reporting and data packet processing, And the plurality of line cards and sub-switching cards are mounted on a backplane. The method of claim 1, wherein the line interface module And an Ethernet switch for connecting the processors of the line card and the sub-switching card and the main processor of the routing system to the Ethernet. The method of claim 1, And the processor of the line card and the sub switching card, and the main processor of the routing system and the Ethernet switch communicate in an inter-processor communication channel (IPC). The method of claim 1, wherein the module The devices in the line card and the sub-switching card are connected to each other in a data chain structure to form a JTAG chain. A JTAG transceiver configured to perform address allocation and on / off functions of the JTGA chain in the line card and the sub-switching card, A backplane is provided with a JTAG master that connects the JTAG chain to an alarm board in a routing system with JTAG address assignment and on / off functionality within the line interface module. The line interface module of the router, characterized in that to check the status of each card through the JTAG chain structure. A line interface module including a plurality of line cards having external connection ports and routing signals input and output to the corresponding ports, and a sub-switching card connecting the plurality of line cards to a switching module; A switching module connected to the line interface module and selectively connecting between the line interface modules; And A routing processor module which performs overall routing control functions made by the line interface module and the switch module, and performs fault management, connection between processors, and switch matching based on the line interface module as a basic unit; Routing system comprising a. The method of claim 5, wherein the sub-switching card of the line interface module A plurality of switch input / output buffers for buffering data input / output to / from the switching module; A sub-switch provided between the line card and the switch input / output buffer to sub-switch incoming data to a desired data channel; And a switching card processor that checks the initialization, management, and status of each device, reports to the routing processor module, and performs data packet switching according to an instruction from the routing processor module. The method of claim 5, wherein The line interface module further comprises an Ethernet switch for connecting the processor of the line card and the sub-switching card and the main processor of the routing system via Ethernet. The method according to any one of claims 5 to 7, The processor of the line card and the sub-switching card, the main processor of the routing system and the Ethernet switch is connected to the Ethernet, the routing system, characterized in that for data communication through an inter-processor communication channel (IPC).