KR100438926B1 - Main processor module for multifunction digital protection relay - Google Patents

Abstract

The present invention relates to a main processor module for a digital protection relay using a digital signal processor (DSP), which includes overcurrent protection, overvoltage protection, low voltage protection, differential current protection, low current protection, motor protection, ground / non-ground ground fault protection relay The present invention relates to a main processor module for performing a protection algorithm of a multifunction digital protection relay including measurement functions such as function, power, amount of electricity, reactive power, active power, frequency, power factor, and communication.

In the conventional relay protection processor board, separate CPU and I / O cards must be made for each relay type (e.g., Incomming type, Feeder type, Transformer type), and therefore, it is difficult to standardize in production, and various types of dedicated processor boards are required. There is a disadvantage that must be produced.

According to the present invention, the hardware of the I, F, M, and T types is shared and the main processor module can be easily configured by adapting to various types of relays by simply replacing a program in one hardware. By using DSP chip, it is possible to speed up data processing and to perform multi-function algorithm using high speed CPU, and to provide main processor module for digital protection relay to reduce relay and measurement error.

In addition, the present invention is not only to simplify the circuit by increasing the resolution of the CPU, but also the combination of the three types of cards to handle the input and output of all relays, as well as countermeasures against noise and surge, and can be easily made by auto-calibrating the adjustment for the analog input. The present invention provides a main processor module for a digital protective relay having a current output function.

Description

Main processor module for multifunctional digital protection relay {MAIN PROCESSOR MODULE FOR MULTIFUNCTION DIGITAL PROTECTION RELAY}

The present invention relates to a main processor module for a digital protection relay using a digital signal processor (DSP), which includes overcurrent protection, overvoltage protection, low voltage protection, differential current protection, low current protection, motor protection, ground / non-ground ground fault protection relay The present invention relates to a main processor module capable of performing a protection algorithm for a multifunctional digital protection relay including a function and measuring functions such as power, amount of electricity, reactive power, active power, frequency, power factor, and communication, and communicating with a remote power protection monitoring system.

In the conventional relay protection processor board, separate CPU and I / O cards must be made for each relay type (eg, I type, F type, and T type), and therefore, it is not only difficult to standardize in production, but also various types of dedicated processor boards. There is a disadvantage that must be produced.

In addition, the CPU is also a 16-bit data processing technology has the disadvantage that the analog / digital speed and resolution is poor.

In addition, in the case of the input and output card, the circuit is complicated, the countermeasure against noise and surge is difficult, and the adjustment to the analog input is complicated and difficult.

In addition, the relay and measurement data is digitally encoded and connected to a separate remote power protection and monitoring system, so that a communication state cannot be detected.

The present invention, in order to solve the above-mentioned conventional problems, the hardware of the I, F, M, T type is common and the replacement of the ROM (ROM) in one hardware to adapt to the various types of relay configuration of the main processor module The main processor module for digital protective relays is provided for simplicity.

In addition, the present invention uses a 32-bit digital signal processor (Digital Signal Processor) to increase the data processing speed and operation speed, multi-function algorithm can be performed, and relay and measurement errors for digital protection relay for communication function Provide the main processor module.

In addition, the present invention not only can simplify the circuit by increasing the resolution of the CPU, but also combine the three types of cards to handle all the input and output of the relay, as well as noise and surge countermeasures for external input signals, output contacts and communication circuits, analog input By adjusting the reference value and automatically calculating the compensation constant for the value, the adjustment can be easily performed without the need for a separate calibration, and provides a main processor module for a digital protective relay having a current output.

1 is a block diagram of a main processor module for a multifunctional digital protective relay of the present invention.

1 is a block diagram showing a main processor module for a digital protective relay according to the present invention.

The digital signal processor 1 performs a relay protection algorithm by processing first input information such as an AC sine wave small signal (Max. Range ± 10 V, 60 Hz) monitored by the digital protection relay, and outputs the digital signal processor 1 from the digital signal processor 1. And a control logic section 2 which decodes the address, and controls a ROM, a RAM, a display, a signal converter, and a signal input / output, communication, and the like.

The control logic section 2 uses a programmable high-density logic circuit dedicated chip, which constitutes address decoding logic to output a signal for control and a circuit for selecting each chip and a system control logic 201. And watchdog control logic 202 for watchdog control, logic 203 for EEPROM control, logic 204 for interrupt control, and logic 205 for communication control.

The main processor module for a digital protective relay of the present invention also includes a storage unit 3 for storing or outputting data of an address decoded by the control logic unit 2.

The storage unit 3 is composed of a ROM 301 and a RAM 302.

In addition, the main processor module for a digital protection relay of the present invention is a watchdog / power monitoring unit 4 for detecting the operation of the digital signal processor and monitoring the abnormality of the power supply, the relay parameter value input from the key input unit and the relay itself EEPROM (5) for storing addresses, critical constants, and parameters to be stored when the power is turned off, a 16-channel multiplexer (6) for properly selecting an analog input for each relay type, and the output of the multiplexer (6) And a filter 7 for filtering the signal, and an analog digital converter 8 for converting the filtered input signal into a digital signal and outputting the digital signal.

In addition, the main processor module for a digital protective relay of the present invention includes a buffer 9 for inputting a digital signal, a latch 10 for outputting data for driving a relay, and a latch for outputting data for displaying a relay output. (11), a buffer 12 for inputting key input data, a digital analog converter 13 for converting a digital signal for analog signal output, a display display section 14 for displaying various kinds of information, It includes a download port 15 for receiving a program download directly from the PC so that the CPU card can be started.

And as the interface unit 100; An analog input unit 101 for inputting an analog signal such as phase voltage and current to the multiplexer 6, a digital input unit 102 for inputting a digital signal to the buffer 9, and the latch 10. For relay output display driven by the output of the relay 11 and the latch 11 for inputting a key operation instruction by the user to the buffer 12, and the relay output unit 103 for driving the relay by the output digital data. A key input / LED output unit 104 including an LED and an analog output unit 105 for outputting an analog signal output from the digital analog converter 13 are included.

The analog input unit 101 includes a circuit for noise and surge protection and an overcurrent protection function 101a for preventing system damage due to overcurrent, and the digital input unit 102 provides a signal isolation and surge protection function 102a. The relay output unit 103 has a built-in signal isolation and surge protection function 103a.

And a communication control unit 16, a drive control logic 17, and a communication port 18, which are in charge of communicating with external devices by the output of the control logic 2 according to the control of the digital signal processor 1. do.

The operation of the main processor module for a digital protective relay of the present invention configured as described above is as follows.

Each phase current and the phase voltage input from the field are input from the analog input unit 101 to the 16 channel multiplexer 6 through the noise and surge protection and the overcurrent protection function 101a.

At this time, the current input from the field is 2-100A, 0.5-40A, 0.2-10A, 1-18mA, and the voltage input from the field is 3.8-14V, 55-240V. It is processed into an AC 60 Hz sine wave signal of ± 10 V and input to the channel multiplexer 6.

The multiplexer 6 selects the input according to the control signal MUX_EN and the data LD0 to LD3 of the control logic 2 that decodes the address of the digital signal processor 1 and filters it through the filter 7. Input to analog digital converter (7).

The analog digital converter 7 receives the control signals R_C and BUSY of the control logic 2, converts the analog input signal into a signal, and outputs 16-bit data, which are system data buses D0 to D15. It is stored in the ring buffer in the digital signal processor 1 through.

The digital signal processor 1 stores the data stored in the ring buffer in the SRAM 302 in the form of coded data by performing calculations such as RMS according to the relay protection algorithm of the ROM 301 at a time when 12 samples are stored.

On the other hand, the digital input unit 102 has a signal insulation and surge protection function 102a by receiving a contact signal from an external relay (another board), for example, response (response) information on the control of a monitoring system or a device. Stored in the buffer 9, the buffer 9 receives the control signal DI_CS of the control logic 2 and is input to the digital signal processor 1 through the data buses D0 to D4.

The above-mentioned information becomes the information of the monitoring, judgment, and measurement of the situation by the digital signal processor 1.

Algorithm activation of the ROM 301 is performed by control signals ROM_CS and RD of the control logic 2, and data storage and output of the SRAM 302 are control signals SRAM_CS1 and SRAM_CS2 of the control logic 2. , RD / WR).

As a result, the digital signal processor 1 performs the digital protection relay algorithm stored in the ROM 301, and the result value is controlled by the control signal DO_CLK of the control logic 2 that decodes the address of the digital signal processor 1. It is latched to the latch 10 via the buses D0 to D9.

The latch 10 data is output from the relay output unit 103 through the signal isolation and surge protection function 103a to drive the respective breakers, and together with the latch 11 as the control signal LEDOUT_CLK. Control to drive the relay output alarm LED of the key input / LED output unit 104.

The relay output alarm LED output in this way is reset only by the ACK key of the key input / LED output unit 104.

The key input / LED output unit 104 inputs the key signals KEY0 to KEY7 corresponding to the key command input by the user to the buffer 12 in order to determine the range of the relaying function. The control signal KEY_CS of the control logic 2 is stored in the buffer 12, and the key signal data stored therein is recognized by the digital signal processor 1 through the system buses D0 to D7.

On the other hand, as described above, the result of the measurement algorithm (measurement data) performed by the digital signal processor 1 is input to the digital analog converter 13 by the system buses D0 to D11, and the digital analog converter 13 Converts the input digital signal into an analog signal by the control signals DA1 and DA2 of the control logic 2 and outputs the analog signal through the analog output unit 105.

The analog value output from the digital analog converter 13 is 2 channels with a level of 0-10V, and this value is output by 4-20 mA by the analog output part 105 which is an I / O card.

The output function of the analog signal through the analog output unit 105 is to enable an external meter to be displayed directly with an external meter without a separate transducer, and the analog output unit 105 also uses a key input for voltage. Users can set up the desired items such as over current, power factor and output.

On the other hand, the download port 15 allows the CPU card to be started by downloading directly from the PC without replacing the ROM during program debugging (Debugging) to adapt to various types of relays.

The display display unit 14 receives the display-related control signals VFD_CS, VFD_WR, and VFD_BUSY outputted from the control logic 2, and transmits the data four cycles before the fault (for the relay operated), and the EEPROM. The setting information, relay address, and voltage, current, and power values output to the digital analog converter are displayed.

As described above, selection and control of peripheral chips of the digital signal processor 1 are performed by the control logic 2 as described above.

That is, the address decoding and system control logic 201 is a chip read / write (RD / WR), multiplexer control (MUX_EN), digital input or output and the control of the chip related to the signal conversion (DI_CS, DA1, DA2, R_C, BUSY), LED drive control (LEDOUT_CLK), key input control (KEY_CS), ROM and SRAM control (ROM_CS, RD, SRAM_CS, RD / WR).

The relay parameter value and the relay self address value keyed in by the key input / LED output unit 104 are stored in the EEPROM 5 by the control signals 93C46_CS and CLK of the EEPROM control logic 203.

The information to be stored is, for example, 4-cycle data at the time of fault, the unique address of the device, and the set value.

Meanwhile, the interrupt control logic 204 generates the interrupt control signals INTR0 to INTR3 so that the digital signal processor 1 performs the interrupt processing, and the watchdog control logic 202 is the watchdog / power monitoring unit 4. ) And control signal (WD, RST), if reset occurs (if the edge does not take the set time, it is reported as hardware or software error and reset). Prevent power outages and prepare for power outages.

The control logic unit 2 has a communication control logic unit 205 to control a communication unit 16 for controlling the communication unit 16 for digitally encoding and communicating current measurement and relay state information with a separate remote monitoring control system. It takes charge of 82530_CS, 82530_CLK, RD, WR) to configure synchronous and asynchronous communication.

According to the main processor module for a digital protective relay of the present invention, it is possible to standardize in production and only one type of module can be manufactured since only one ROM is replaced for each relay type in one hardware.

In addition, the main processor module for the digital protective relay of the present invention is a 32-bit high-speed data processing, the use of a digital filter can reduce the noise as well as the multi-function algorithm can be performed using the high-speed CPU, relay and measurement errors There is an advantage to reduce.

In addition, according to the main processor module for the digital protective relay of the present invention, since the CPU resolution is increased, the circuit protection as well as the input and output of all types of digital protective relays can be handled.

In addition, according to the main processor module for a digital protective relay of the present invention, since countermeasures against noise and surge are provided, circuit malfunction can be minimized and high reliability can be ensured.

In addition, automatic adjustment to the analog input is possible and the analog output unit can eliminate current output (additional configuration for connecting an external meter).

In addition, by digitally encoding the current measurement and relay value by the main processor module for the digital protective relay of the present invention, a synchronous and asynchronous communication port is built in through a program that can be selectively internally connected to an external monitoring device for remote monitoring and control. There is a feature that is possible.

Claims (2)

The digital signal processor 1 performs a relay protection algorithm by processing first input information such as voltage and current monitored by the digital protection relay, and decodes an address output from the digital signal processor 1, and reads a ROM. And a control logic unit 2 for controlling a RAM, a display unit, a signal conversion unit, signal input / output, communication, and the like, and a storage unit for storing or outputting data of an address decoded by the control logic unit 2 ( 3) a watchdog / power monitoring unit 4 which detects the operation of the digital signal processor and monitors an abnormal power supply, and an EEPROM 5 which stores relay parameter values inputted from a key input unit and the relay self address. And a 16-channel multiplexer 6 for appropriately selecting analog inputs for each relay type, a filter 7 for filtering the output of the multiplexer 6, and the filtered input. Analog digital converter 8 for converting and converting a call into a digital signal, a buffer 9 for inputting a digital signal, a latch 10 for outputting data for relay driving, and data for displaying a relay output. A latch 11 for outputting a signal, a buffer 12 for inputting key input data, a digital analog converter 13 for converting a digital signal for analog signal output, and a display display unit for displaying a variety of information ( 14) and communication units 16, 17 and 18, which can be connected to an external remote sensing control system and digitally encode current measurement and relay data to enable synchronous and asynchronous communication. A main processor module for a digital protective relay comprising a download port (15) for enabling the card to be activated. The apparatus of claim 1, further comprising: as an interface unit (100); An analog input unit 101 for inputting an analog signal such as phase voltage and current to the multiplexer 6, a digital input unit 102 for inputting a digital signal to the buffer 9, and the latch 10. For relay output display driven by the output of the relay 11 and the latch 11 for inputting a key operation instruction by the user to the buffer 12, and the relay output unit 103 for driving the relay by the output digital data. A key processor / LED output unit (104) comprising an LED and an analog output unit (105) for outputting an analog signal output from the digital analog converter (13).