KR100437337B1 - Amplitude control circuit - Google Patents

Amplitude control circuit Download PDF

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Publication number
KR100437337B1
KR100437337B1 KR10-2002-0014074A KR20020014074A KR100437337B1 KR 100437337 B1 KR100437337 B1 KR 100437337B1 KR 20020014074 A KR20020014074 A KR 20020014074A KR 100437337 B1 KR100437337 B1 KR 100437337B1
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South Korea
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adjustment
cutoff
value
drive
video signal
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KR10-2002-0014074A
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KR20030022005A (en
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오타하라마사유키
오가와히데토
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삼성에스디아이 주식회사
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    • G—PHYSICS
    • G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G3/00—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes
    • G09G3/20—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters
    • G09G3/22—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources
    • G09G3/28—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources using luminous gas-discharge panels, e.g. plasma panels
    • G—PHYSICS
    • G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G2320/00—Control of display operating conditions
    • G09G2320/02—Improving the quality of display appearance
    • G—PHYSICS
    • G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G2320/00—Control of display operating conditions
    • G09G2320/02—Improving the quality of display appearance
    • G09G2320/0271—Adjustment of the gradation levels within the range of the gradation scale, e.g. by redistribution or clipping

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  • Engineering & Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • Plasma & Fusion (AREA)
  • Computer Hardware Design (AREA)
  • General Physics & Mathematics (AREA)
  • Theoretical Computer Science (AREA)
  • Processing Of Color Television Signals (AREA)
  • Control Of Indicators Other Than Cathode Ray Tubes (AREA)
  • Controls And Circuits For Display Device (AREA)
  • Control Of Gas Discharge Display Tubes (AREA)

Abstract

화이트밸런스를 조정할 때 컷오프조정에 의한 화이트피크측의 흰색일그러짐 등을 방지하는 진폭조정회로를 제공한다. 드라이브조정계수에 따라 입력영상신호의 게인을 조정하여 출력하는 드라이브조정승산기(1)와, 컷오프조정값에 따라 입력영상신호의 오프셋레벨을 조정하여 출력하는 컷오프조정가감산기(3)와, 드라이브조정회로에 주는 드라이브조정계수를 컷오프조정값에 따라 컷오프조정회로에 의한 영상신호출력의 화이트피크측의 레벨의 증감을 상쇄하도록 변경하는 피크값판정감산기(5)를 구비한다.When adjusting the white balance, an amplitude adjustment circuit is provided to prevent white distortion on the white peak side due to the cutoff adjustment. A drive adjustment multiplier (1) for adjusting the gain of the input video signal according to the drive adjustment coefficient and outputting it, a cutoff adjustment subtractor (3) for adjusting the offset level of the input video signal according to the cutoff adjustment value, and a drive adjustment circuit. And a peak value determination subtractor 5 for changing the drive adjustment coefficient so as to cancel the increase or decrease of the level on the white peak side of the video signal output by the cutoff adjustment circuit in accordance with the cutoff adjustment value.

Description

진폭조정회로{AMPLITUDE CONTROL CIRCUIT}Amplitude Control Circuit {AMPLITUDE CONTROL CIRCUIT}

본 발명은 디지털 영상신호의 화이트밸런스를 조정하기 위한 진폭조정회로에 관한 것이다.The present invention relates to an amplitude adjustment circuit for adjusting the white balance of a digital video signal.

PDP(Plasma Display Panel) 등의 디지털표시소자에 있어서는 영상신호입력이 디지털입력이기 때문에 신호의 상한과 하한이 명확하게 정해져 있다.In a digital display element such as a plasma display panel (PDP), since the video signal input is a digital input, the upper and lower limits of the signal are clearly defined.

한편, 현재의 PDP에서는 휘도, 계조수 모두 CRT(Cathode Ray Tube)에 대하여 뒤떨어지기 때문에, 통상은 그 한정된 다이나믹레인지(Dynamic Range)를 최대한으로 이용하여 영상표시를 행하고 있다.On the other hand, in the current PDP, since both luminance and gray level are inferior to the CRT (Cathode Ray Tube), video display is usually performed using the limited dynamic range to the maximum.

따라서, 화이트밸런스조정을 할 경우 등에서도 역시 그 다이나믹레인지의 범위 내에서밖에 행할 수 없다.Therefore, even in the case of white balance adjustment, it can only be performed within the range of the dynamic range.

화이트밸런스조정을 할 경우, 통상 화이트피크측의 색도를 조정할 때에는 영상신호 전체의 진폭의 게인을 조정하는 드라이브(Drive)조정에 의해 행하고(도 2(a) 참조), 검정색에 가까운 저레벨의 색도를 조정할 때에는 전체의 오프셋레벨을 조정하는 컷오프(Cut Off)조정에 의해 행하고 있다(도 2(b) 참조).In the case of white balance adjustment, when adjusting the chromaticity of the white peak side, it is performed by the drive adjustment which adjusts the gain of the amplitude of the entire video signal (see Fig. 2 (a)), and the low-level chromaticity close to black is obtained. In the adjustment, the cutoff is adjusted to adjust the overall offset level (see Fig. 2 (b)).

여기서, 8비트 입력의 PDP를 예로 들면, 최소치 : 0으로부터 최대치 : 255까지를 영상표시를 위해 모두 사용하는 것이 통례이다. 이 때, RGB 3색 중 컷오프조정에 의해 어떤 색의 오프셋레벨을 화이트밸런스 조정을 위해 올린 경우, 이미 화이트피크는 최대치인 255까지 달하고 있기 때문에 전체의 레벨이 올라가면 화이트피크측이 다이나믹레인지를 넘기 때문에 계조를 잃게 되어 소위 흰색일그러짐이라는 현상이 된다(도 3 참조).Here, using an 8-bit input PDP as an example, it is common to use the minimum value from 0 to the maximum value 255 for image display. At this time, if the offset level of a certain color is raised for white balance adjustment by adjusting the cutoff among the three colors of RGB, the white peak already reaches the maximum value of 255, so when the whole level rises, the white peak side exceeds the dynamic range. Loss of gradation results in a phenomenon called so-called white distortion (see FIG. 3).

특히, 화이트밸런스조정을 위한 기능을 사용자에게 해방한 경우 등, 사용자는 이 메커니즘을 이해하기가 어려우므로 쉽게 크레임을 받는 요인이 된다.In particular, it is difficult to understand the mechanism, for example, when the user has released a function for adjusting the white balance, and thus, the user easily receives a claim.

또한, 컷오프조정을 -(마이너스) 방향으로 한 경우에는 역으로 화이트피크측도 동시에 내려가므로 화이트피크측의 화이트밸런스가 변동하게 된다는 문제점이 있다(도 4 참조).In addition, when the cutoff adjustment is made in the-(minus) direction, the white peak side also goes down at the same time, so that the white balance on the white peak side is changed (see FIG. 4).

따라서 본 발명의 목적은 상기한 문제점을 감안하여 이루어진 것으로, 화이트밸런스를 조정할 때 컷오프조정에 의한 화이트피크측의 흰색일그러짐 등을 방지하는 진폭조정회로를 제공하는 데 있다.Accordingly, an object of the present invention has been made in view of the above problems, and an object of the present invention is to provide an amplitude adjustment circuit that prevents white distortion on the white peak side due to cutoff adjustment when white balance is adjusted.

도 1은 본 발명의 실시예에 따른 진폭조정회로의 구성을 나타내는 블록도이다.1 is a block diagram showing the configuration of an amplitude adjustment circuit according to an embodiment of the present invention.

도 2는 영상신호에 대한 각 조정을 예시한 도면으로, (a)는 드라이브조정을 예시하고, (b)는 컷오프조정을 예시하는 도면이다.2 is a diagram illustrating each adjustment for a video signal, (a) illustrates a drive adjustment, and (b) illustrates a cutoff adjustment.

도 3은 종래의 드라이브조정과 컷오프조정에 의한 문제점을 예시하는 도면이다.3 is a diagram illustrating problems caused by conventional drive adjustment and cutoff adjustment.

도 4는 종래의 드라이브조정과 컷오프조정에 의한 문제점을 예시하는 다른 도면이다.4 is another diagram illustrating problems caused by conventional drive adjustment and cutoff adjustment.

도 5는 본 발명의 실시예에 따른 진폭조정회로에 의한 동작(개선효과)을 나타내는 도면이다.5 is a view showing the operation (improving effect) by the amplitude adjustment circuit according to the embodiment of the present invention.

도 6은 본 발명의 실시예에 따른 진폭조정회로에 의한 동작(개선효과)을 나타내는 다른 도면이다.6 is another diagram showing the operation (improving effect) by the amplitude adjustment circuit according to the embodiment of the present invention.

< 도면의 주요부분에 대한 부호의 설명 ><Description of Symbols for Major Parts of Drawings>

1 : 드라이브조정승산기1: Drive Adjustment Multiplier

2 : 드라이브조정계수기2: Drive Adjustment Counter

3 : 컷오프조정DC가감산기(컷오프조정가감산기)3: Cutoff adjustment DC adder (cutoff adjustment adder)

4 : 컷오프조정계수기4: cutoff adjustment counter

5 : 피크값판정감산기5: Peak value determination subtractor

본 발명의 진폭조정회로는,The amplitude adjustment circuit of the present invention,

드라이브조정계수에 따라 입력영상신호의 게인을 조정하여 출력하는 드라이브조정승산기와, 컷오프조정값에 따라 입력영상신호의 오프셋레벨을 조정하여 출력하는 컷오프조정가감산기와, 상기 드라이브조정회로에 주는 드라이브조정계수를 상기 컷오프조정값에 따라 상기 컷오프조정회로에 의한 영상신호출력의 화이트피크측의 레벨의 증감을 상쇄하도록 변경하는 피크값판정감산기를 구비하는 것을 특징으로 한다.A drive adjustment multiplier that adjusts and outputs an input video signal gain according to a drive adjustment coefficient, a cutoff adjustment subtractor that adjusts and outputs an offset level of an input video signal according to a cutoff adjustment value, and a drive adjustment coefficient given to the drive adjustment circuit And a peak value judging subtractor for changing the value so as to cancel the increase or decrease of the level of the white peak side of the video signal output by the cutoff adjustment circuit in accordance with the cutoff adjustment value.

또한, 본 발명의 진폭조정회로에 있어서, 상기 피크값판정감산기는 설정된 드라이브조정계수로부터 설정된 컷오프조정값을 감산하여 상기 드라이브조정승산기에 줌으로써 상기 컷오프조정회로에 의한 영상신호출력의 화이트피크측의 레벨의 증감을 상쇄하는 것을 특징으로 한다.Further, in the amplitude adjusting circuit of the present invention, the peak value judging subtractor subtracts the set cutoff adjustment value from the set drive adjustment coefficient and gives it to the drive adjustment multiplier so that the level at the white peak side of the video signal output by the cutoff adjustment circuit. It is characterized by offsetting the increase and decrease of.

이하, 본 발명의 실시예에 대해 도면을 참조하여 설명한다.Hereinafter, embodiments of the present invention will be described with reference to the drawings.

도 1은 본 발명의 일실시예에 따른 진폭조정회로의 구성을 나타내는 블록도이다. 이 도 1은 RGB신호 중 하나의 신호(예를 들면 R신호)를 처리하는 계통에 관하여 나타내고 있다. 본 실시예에서는 다른 G신호, B신호를 처리하는 계통에 대해서도 같은 회로구성을 사용한다.1 is a block diagram showing the configuration of an amplitude adjustment circuit according to an embodiment of the present invention. 1 shows a system for processing one signal (e.g., an R signal) of RGB signals. In the present embodiment, the same circuit configuration is used for the systems for processing other G signals and B signals.

도 1에 있어서, 부호 1은 드라이브조정승산기이다. 이 드라이브조정승산기(1)는 화이트밸런스조정을 위해 하기의 피크값판정감산기(5)를 개재하여 드라이브조정계수기(2)로부터 주어지는 드라이브조정계수(예를 들면, 0~255)에 비례하는 승산계수(예를 들면, 0~1)와 디지털영상신호입력을 승산하여 영상신호 전체의 진폭을 조정하는 회로이다.In Fig. 1, reference numeral 1 denotes a drive adjustment multiplier. The drive adjustment multiplier 1 is a multiplication factor proportional to the drive adjustment coefficient (for example, 0 to 255) given from the drive adjustment counter 2 via the following peak value determination subtractor 5 for white balance adjustment. (For example, 0 to 1) multiplies the digital video signal input to adjust the amplitude of the entire video signal.

이 드라이브조정승산기(1)는, 예를 들면 0~255(8bit)의 값을 취하는 드라이브조정계수(k)가 주어진 경우 승산계수로서 k/255의 값을 입력영상신호에 곱하여 출력한다.The drive adjustment multiplier 1 multiplies an input video signal by a value of k / 255 as a multiplication factor when a drive adjustment coefficient k having, for example, a value of 0 to 255 (8 bits) is given.

드라이브조정계수기(2)는 공장출하시 혹은 사용자에 의해 외부로부터 주어지는 화이트밸런스조정을 위해 설정되는 설정치에 대응하는 드라이브조정계수를 하기의 컷오프조정계수기(4)를 개재하여 드라이브조정승산기(1)에 주는 회로이다.The drive adjustment counter 2 supplies the drive adjustment coefficient corresponding to the set value set for the white balance adjustment supplied from the factory or externally by the user to the drive adjustment multiplier 1 through the cutoff adjustment counter 4 below. The state is a circuit.

이 드라이브조정계수기(2)로는, 간단하게는 로터리스위치 등을 이용할 수 있다.As this drive adjustment counter 2, a rotary switch etc. can be used simply.

부호 3은 컷오프조정DC가감산기이다. 컷오프조정DC가감산기(3)는 디지털영상신호 입력에 하기의 컷오프조정계수기(4)로부터 주어지는 컷오프조정값을 가감산하여 화이트밸런스조정을 위해 전체의 오프셋레벨을 조정하는 회로이다.Reference numeral 3 is a cutoff adjustment DC adder. The cutoff adjustment DC adder 3 is a circuit for adjusting the overall offset level for white balance adjustment by adding or subtracting the cutoff adjustment value given from the cutoff adjustment counter 4 to the digital video signal input.

컷오프조정값은, 예를 들면 -128~127(8bit)의 값을 취하며, 컷오프조정DC가감산기(3)는 컷오프조정값으로서 양의 값 혹은 「0」이 주어진 경우는 그 값을 가산하고, 음의 값이 주어진 경우는 그 절대값을 감산한다.The cutoff adjustment value is, for example, a value of -128 to 127 (8 bits), and the cutoff adjustment DC adder 3 adds the value when a positive value or "0" is given as the cutoff adjustment value. If a negative value is given, the absolute value is subtracted.

컷오프조정계수기(4)는 공장출하시 혹은 사용자에 의해 외부로부터 주어진 화이트밸런스조정을 위해 설정된 설정치에 대응하는 컷오프조정값을 컷오프조정DC가감산기(3) 및 피크값판정감산기(5)에 주는 회로이다. 이 컷오프조정계수기(4)로는, 간단하게는 로터리스위치 등을 이용할 수 있다.The cutoff adjustment counter 4 supplies a cutoff adjustment value to the cutoff adjustment DC adder 3 and the peak value determination subtractor 5 corresponding to a set value set for the white balance adjustment supplied from the factory or externally by the user. to be. As this cutoff adjustment counter 4, a rotary switch etc. can be used simply.

부호 5는 피크값판정감산기이다. 이 피크값판정감산기(5)는 드라이브조정계수기(2)의 출력값인 드라이브조정계수로부터 컷오프조정계수기(4)의 출력값인 컷오프조정값을 감산하여 변경한 드라이브조정계수를 드라이브조정승산기(1)에 줌으로써 드라이브조정승산기(1)의 출력의 화이트피크값이 변화하지 않도록 하기 위한 회로이다.Reference numeral 5 is a peak value determination subtractor. The peak value determination subtractor 5 subtracts the cutoff adjustment value, which is the output value of the cutoff adjustment counter 4, from the drive adjustment coefficient that is the output value of the drive adjustment counter 2, to the drive adjustment multiplier 1. This is a circuit for preventing the white peak value of the output of the drive adjustment multiplier 1 from changing.

다음으로, 이와 같이 구성된 본 발명의 실시예에 따른 진폭조정회로의 동작에 대하여 설명한다.Next, the operation of the amplitude adjusting circuit according to the embodiment of the present invention configured as described above will be described.

먼저, 컷오프조정계수기(4)의 출력값인 컷오프조정값이 「0」인 경우에는 피크값판정감산기(5)는 드라이브조정계수(k)로부터 컷오프조정값「0」을 감한다. 즉 드라이브조정계수(k) 자체의 값을 드라이브조정승산기(1)에 준다.First, when the cutoff adjustment value that is the output value of the cutoff adjustment counter 4 is "0", the peak value determination subtractor 5 subtracts the cutoff adjustment value "0" from the drive adjustment coefficient k. That is, the value of the drive adjustment coefficient (k) itself is given to the drive adjustment multiplier (1).

드라이브조정계수(k)를 받은 드라이브조정승산기(1)는 입력영상신호에 승산계수로서, 예를 들면 k/255의 값을 곱하여 출력한다.The drive adjustment multiplier 1 having received the drive adjustment coefficient k multiplies the input video signal as a multiplication coefficient, for example, and outputs a value of k / 255.

여기서, 컷오프조정DC가감산기(3)에는 컷오프조정계수기(4)로부터 컷오프조정값으로서 「0」이 주어져 있으므로 컷오프조정DC가감산기(3)는 드라이브조정승산기(1)로부터 받은 영상신호를 그대로 출력한다.Since the cutoff adjustment DC adder 3 is given "0" as the cutoff adjustment value from the cutoff adjustment counter 4, the cutoff adjustment DC adder 3 outputs the video signal received from the drive adjustment multiplier 1 as it is. do.

이 예에서는, 입력영상신호의 화이트피크값이 「255」인 경우(PDP 등에서는 일반적으로 다이나믹레인지의 전영역을 사용하고 있으므로, 화이트피크값은 통상 「255)(8bit의 경우)가 된다), 드라이브조정승산기(1)의 출력은 255×(k-0)/255=k가 되고, 따라서 컷오프조정DC가감산기(3)의 출력은 k가 된다.In this example, when the white peak value of the input video signal is "255" (PDP etc. generally uses the entire range of the dynamic range, the white peak value is usually "255" (8 bits)), The output of the drive adjustment multiplier 1 is 255 x (k-0) / 255 = k, so the output of the cutoff adjustment DC adder 3 is k.

다음, 컷오프조정계수기(4)의 출력값인 컷오프조정값(c)이 양의 값인 경우, 즉 영상신호에 컷오프조정값(c)이 가산되는 경우, 피크값판정감산기(5)는 드라이브조정계수(k)로부터 컷오프조정값(c)를 감한 값 「k-c」를 드라이브조정승산기(1)에 준다.Next, when the cutoff adjustment value c, which is an output value of the cutoff adjustment counter 4, is a positive value, that is, when the cutoff adjustment value c is added to the video signal, the peak value determination subtractor 5 determines the drive adjustment coefficient ( The value "kc" obtained by subtracting the cutoff adjustment value (c) from k) is given to the drive adjustment multiplier (1).

드라이브조정계수 「k-c」를 받은 드라이브조정승산기(1)는 입력영상신호에 승산계수로서, 상기예에 따르면 (k-c)/255의 값을 곱하여 출력한다.The drive adjustment multiplier 1 having received the drive adjustment coefficient &quot; k-c &quot; multiplies the value of (k-c) / 255 according to the above example and outputs the input video signal as a multiplication coefficient.

여기서, 컷오프조정DC가감산기(3)에는 컷오프조정계수기(4)로부터 컷오프조정값으로서 양의 값「c」이 주어져 있으므로, 컷오프조정DC가감산기(3)는 드라이브조정승산기(1)로부터 받은 영상신호에 「c」를 가산하여 출력한다.Since the cutoff adjustment DC adder 3 is given a positive value "c" from the cutoff adjustment counter 4 as the cutoff adjustment value, the cutoff adjustment DC adder 3 receives the image received from the drive adjustment multiplier 1. "C" is added to the signal and output.

이 예에서는, 입력영상신호의 화이트피크값이 「255」인 경우, 드라이브조정승산기(1)의 출력은 255×(k-c)/255=(k-c)가 되고, 따라서 컷오프조정DC가감산기(3)의 출력은 (k-c)+c=k가 된다.In this example, when the white peak value of the input video signal is "255", the output of the drive adjustment multiplier 1 becomes 255 x (kc) / 255 = (kc), and therefore the cutoff adjustment DC adder 3 Outputs (kc) + c = k.

이와 같이, 컷오프조정DC가감산기(3)에 있어서의 화이트피크측의 출력레벨은 컷오프조정값이 「0」인 경우와 마찬가지가 되고, 영상신호에 컷오프조정값(c)이 가산되어도 최종출력에는 컷오프조정에 의한 흰색일그러짐이 발생하지 않는다(도 5 참조).In this way, the output level on the white peak side in the cutoff adjustment DC adder 3 is the same as the case where the cutoff adjustment value is "0", and even if the cutoff adjustment value c is added to the video signal, White distortion does not occur due to the cutoff adjustment (see FIG. 5).

다음, 컷오프조정계수기(4)의 출력값인 컷오프조정값(c)이 음의 값인 경우, 즉 영상신호에 컷오프조정값(c)의 절대값「-c」가 감산되는 경우, 피크값판정감산기(5)는 드라이브조정계수(k)로부터 컷오프조정값인 c를 감한 값「k-c」를 드라이브조정승산기(1)에 준다.Next, when the cutoff adjustment value c, which is an output value of the cutoff adjustment counter 4, is negative, that is, when the absolute value "-c" of the cutoff adjustment value c is subtracted from the video signal, the peak value determination subtractor ( 5) gives the drive adjustment multiplier 1 a value "kc" obtained by subtracting the cutoff adjustment value c from the drive adjustment coefficient k.

드라이브조정계수「k-c」를 받은 드라이브조정승산기(1)는 입력영상신호에 승산계수로서, 상기예에 따르면 (k-c)/255의 값을 곱하여 출력한다.The drive adjustment multiplier 1 having received the drive adjustment coefficient &quot; k-c &quot; multiplies the value of (k-c) / 255 according to the above example as the multiplication coefficient to the input video signal and outputs it.

여기서, 컷오프조정DC가감산기(3)에는 컷오프조정계수기(4)로부터 컷오프조정값으로서 음의 값「c」가 주어져 있으므로, 컷오프조정DC가감산기(3)는 드라이브조정승산기(1)로부터 받은 영상신호로부터 컷오프조정값의 절대값「-c」를 감산하여 출력한다.Since the cutoff adjustment DC adder 3 is given a negative value "c" from the cutoff adjustment counter 4 as the cutoff adjustment value, the cutoff adjustment DC adder 3 receives the image received from the drive adjustment multiplier 1. The absolute value "-c" of the cutoff adjustment value is subtracted from the signal and output.

이 예에서는, 입력영상신호의 화이트피크값이 「255」인 경우, 드라이브조정승산기(1)의 출력은 255×(k-c)/255=(k-c)가 되고, 따라서컷오프조정DC가감산기(3)의 출력은 (k-c)-(-c)=k가 된다.In this example, when the white peak value of the input video signal is "255", the output of the drive adjustment multiplier 1 becomes 255 x (kc) / 255 = (kc), and therefore the cutoff adjustment DC adder 3 Outputs (kc)-(-c) = k.

이와 같이, 컷오프조정DC가감산기(3)에 있어서의 화이트피크측의 출력레벨은 컷오프조정값이 「0」인 경우와 마찬가지가 되며, 영상신호에 컷오프조정값(c)의 절대값「-c」가 감산되어도 컷오프조정에 의한 최종출력의 화이트피크측의 드라이브조정 결과에 영향을 주지 않는다(도 6 참조).In this way, the output level on the white peak side in the cutoff adjustment DC adder 3 is the same as when the cutoff adjustment value is "0", and the absolute value "-c" of the cutoff adjustment value c is added to the video signal. Is subtracted from the drive adjustment result on the white peak side of the final output by the cutoff adjustment (see Fig. 6).

이상으로부터 알 수 있는 바와 같이 본 발명의 실시예에 따른 진폭조정회로에 의하면, 컷오프조정값의 설정 여하에 관계없이 출력영상신호의 화이트피크값은 일정하게 유지된다.As can be seen from the above, according to the amplitude adjustment circuit according to the embodiment of the present invention, the white peak value of the output video signal is kept constant regardless of the setting of the cutoff adjustment value.

이상, 이 발명의 실시예를 도면을 참조하여 상술했는데, 구체적인 구성은 이 실시 형태에 한정되는 것이 아니라, 이 발명의 요지를 벗어나지 않는 범위의 구성 등도 포함된다. 예를 들면, 상기 실시예에서는, 드라이브조정승산기의 출력을 컷오프조정가감산기에 주고 있으나, 역으로 컷오프조정가감산기의 출력을 드라이브조정승산기에 주는 구성으로 해도 된다.As mentioned above, although the Example of this invention was described above with reference to drawings, the specific structure is not limited to this embodiment, The structure etc. which do not deviate from the summary of this invention are included. For example, in the above embodiment, the output of the drive adjustment multiplier is supplied to the cutoff adjustment subtractor, but conversely, the cutoff adjustment may be configured to give the output of the drive adjustment multiplier to the drive adjustment multiplier.

이상, 상세하게 설명한 바와 같이, 본 발명에 의하면, 드라이브조정계수에 따라 입력영상신호의 게인을 조정하여 출력하는 드라이브조정승산기와, 컷오프조정값에 따라 입력영상신호의 오프셋 레벨을 조정하여 출력하는 컷오프조정가감산기와, 상기 드라이브조정회로에 주는 드라이브조정계수를 상기 컷오프조정값에 따라 상기 컷오프조정회로에 의한 영상신호출력의 화이트피크측의 레벨의 증감을 상쇄하도록 변경하는 피크값판정감산기를 구비하므로, 화이트밸런스의조정을 할 때 컷오프조정에 의한 계조일그러짐 현상을 방지할 수 있고, 또한 컷오프조정에 의한 드라이브조정에의 영향(화이트밸런스의 변동)을 막을 수 있다.As described above, according to the present invention, a drive adjustment multiplier for adjusting and outputting a gain of an input video signal according to a drive adjustment coefficient, and a cutoff for adjusting and outputting an offset level of an input video signal according to a cutoff adjustment value An adjustment value subtractor and a peak value determination subtractor for changing the drive adjustment coefficient given to the drive adjustment circuit so as to cancel the increase or decrease of the level of the white peak side of the video signal output by the cutoff adjustment circuit in accordance with the cutoff adjustment value. When adjusting the white balance, the gradation distortion caused by the cutoff adjustment can be prevented, and the influence of the drive adjustment (the change in the white balance) due to the cutoff adjustment can be prevented.

또한, 본 발명에 의하면, 상기 피크값판정감산기가, 설정된 드라이브조정계수로부터 설정된 컷오프조정값을 감산하여 상기 드라이브조정승산기에 줌으로써, 상기 컷오프조정회로에 의한 영상신호출력의 화이트피크측의 레벨의 증감을 상쇄하므로 간단한 구성으로 상기 효과를 얻을 수 있다.Further, according to the present invention, the peak value determination subtractor subtracts the set cutoff adjustment value from the set drive adjustment coefficient and gives it to the drive adjustment multiplier, thereby increasing or decreasing the level of the white peak side of the video signal output by the cutoff adjustment circuit. Since it cancels out the said effect can be acquired by a simple structure.

Claims (2)

드라이브조정계수에 따라 입력영상신호의 게인을 조정하여 출력하는 드라이브조정승산기와,A drive adjustment multiplier for adjusting the gain of the input video signal according to the drive adjustment coefficient and outputting it; 컷오프조정값에 따라 입력영상신호의 오프셋레벨을 조정하여 출력하는 컷오프조정가감산기와,A cutoff adjustment subtractor for adjusting and outputting an offset level of an input video signal according to the cutoff adjustment value; 상기 드라이브조정회로에 주는 드라이브조정계수를, 상기 컷오프조정값에 따라 상기 컷오프조정회로에 의한 영상신호출력의 화이트피크측의 레벨의 증감을 상쇄하도록 변경하는 피크값판정감산기A peak value determination subtractor for changing the drive adjustment coefficient given to the drive adjustment circuit so as to cancel the increase or decrease of the level of the white peak side of the video signal output by the cutoff adjustment circuit in accordance with the cutoff adjustment value. 를 구비하는 것을 특징으로 하는 진폭조정회로.Amplitude adjustment circuit comprising a. 제1항에 있어서,The method of claim 1, 상기 피크값판정감산기는,The peak value determination subtractor, 설정된 드라이브조정계수로부터 설정된 컷오프조정값을 감산하여 상기 드라이브조정승산기에 줌으로써 상기 컷오프조정회로에 의한 영상신호출력의 화이트피크측의 레벨의 증감을 상쇄하는By subtracting the set cutoff adjustment value from the set drive adjustment coefficient and giving it to the drive adjustment multiplier, the increase and decrease of the level on the white peak side of the video signal output by the cutoff adjustment circuit is canceled. 것을 특징으로 하는 진폭조정회로.Amplitude adjustment circuit, characterized in that.
KR10-2002-0014074A 2001-09-06 2002-03-15 Amplitude control circuit KR100437337B1 (en)

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JPH09200571A (en) * 1996-01-18 1997-07-31 Matsushita Electric Ind Co Ltd Video signal processor
JP2001027890A (en) * 1999-05-10 2001-01-30 Matsushita Electric Ind Co Ltd Picture display device and picture display method
JP2001134226A (en) * 1999-11-08 2001-05-18 Matsushita Electric Ind Co Ltd Picture display device and picture display method

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* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH09200571A (en) * 1996-01-18 1997-07-31 Matsushita Electric Ind Co Ltd Video signal processor
JP2001027890A (en) * 1999-05-10 2001-01-30 Matsushita Electric Ind Co Ltd Picture display device and picture display method
JP2001134226A (en) * 1999-11-08 2001-05-18 Matsushita Electric Ind Co Ltd Picture display device and picture display method

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