KR100430369B1 - RF Differential Switch Circuit - Google Patents

Abstract

The present invention constitutes a differential switch circuit having a virtual ground terminal by connecting each ground terminal to a pair of switch circuits having the same structure composed of FETs, and having the same size and opposite phase as the input signal. By applying complementary signal, it is a switch having excellent isolation characteristics without any external ground terminal to the differential switch circuit.

Description

Ultra high frequency differential switch circuit {RF Differential Switch Circuit}

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a switch circuit used for wireless communication, and in particular, a differential switch circuit in which a virtual ground terminal is formed by connecting each ground terminal to a pair of switch circuits having the same structure consisting of FETs. It is possible to omit a separate external ground terminal to the differential switch circuit by applying a complementary signal having the same magnitude and opposite phase to each other as its input signal.

A switch circuit is a circuit that electrically connects or shorts two terminals by using a field effect transistor (hereinafter referred to as FET). The drain and source terminals of the FET are used as input and output terminals, and the gate terminal has a threshold voltage. The input and output terminals are electrically connected when a high regulating voltage is applied, and the input and output terminals are electrically disconnected when a regulating voltage lower than a threshold voltage is applied to the gate terminal. This switch circuit uses the antenna terminal as either a transmitting terminal or a receiving terminal. Only one terminal is connected and the other terminal is not connected. However, in this switch circuit, most input signals are transmitted to the connected terminals, but weak signals are leaked to the unconnected terminals.

Normally, the insertion loss indicates how much signal is transmitted to the input terminal compared to the input signal, and the ratio of the input signal leaking to the non-connected terminal may be represented as a separation diagram.

In the switch circuit, when the FET is electrically disconnected, a small capacitance component remains in series between the drain terminal and the source terminal. Since the small portion of the input signal leaks to the output terminal, the disconnection characteristic of the switch is deteriorated.

In view of this point, a switch circuit arranged in T-shapes using three FETs has been proposed in the related art.

1, reference numeral 100 denotes an antenna terminal, 101 a transmission terminal, and 102 a reception terminal. 110-112 constitutes a T-type transmitter switch, and 120-122 constitutes a T-type receiver switch.

The transmitter switch is composed of a T-type FET 110-112, control terminals 110a-112a for applying a control voltage to open and close each FET, and a ground terminal 113 of the FET 112.

The switch circuit having such a structure opens a channel of the FETs 110 and 111 by applying a control voltage higher than the threshold voltage to the control terminals 110a and 111a when the transmitter switch is connected to the control terminal 112a. The control voltage lower than the threshold voltage is applied to close the channel of the FET 112.

On the contrary, when the transmitter switch is disconnected, a control voltage lower than the threshold voltage is applied to the control terminals 110a and 111a to close the channel of the FET 110 and 111, and a control voltage higher than the threshold voltage is applied to the control terminal 112a. Walk to open the channel of FET 112.

The receiver switch includes a FET 120-122, a control terminal 120a-122a for applying a control voltage to open and close each FET 120-122, and a ground terminal 123 of the FET 122.

The receiver switch having such a structure opens a channel of the FETs 120 and 121 by applying a control voltage higher than the threshold voltage to the control terminals 121a and 121a when the switch is connected, and thresholds the control terminal 122a. A regulated voltage lower than the voltage is applied to close the channel of the FET 122.

On the contrary, when the receiver switch is disconnected, a voltage lower than the threshold voltage is applied to the control terminals 120a and 121a to close the channel of the FET 120 and 121, and a control voltage higher than the threshold voltage is applied to the control terminal 122a. Walk to open the channel of FET 122.

In the reception mode, the signal coming into the antenna terminal 100 is transmitted to the receiving terminal 102 through the connected receiving switch, and is not transmitted to the transmitting terminal 101 by the broken transmitting switch.

On the contrary, in the transmission mode, the signal coming into the transmission terminal 101 is transmitted to the antenna terminal 100 through the connected transmitter switch and is not transmitted to the reception terminal 102 by the broken reception switch.

Therefore, when the switch circuit having the above structure is electrically disconnected, the two series FETs are closed and the signal leaks out through the capacitor component, but the parallel FET which is electrically connected is grounding between the two series FETs. Can be improved.

2 is a conventionally packaged switch circuit, and the description of the same parts as in FIG. 1 will be omitted. The difference between FIG. 1 and FIG. 2 is that the parasitic component 114 is added between the FET 112 constituting the transmitter switch and its ground terminal 113, the FET 122 constituting the receiver switch and its ground terminal 123. The parasitic component terminal 124 added in between.

When packaging a switch circuit made of a chip for practical use, the Au wire and the lead of the package are connected between the FET 112, 122 and ground terminals 113, 123 of the switch circuit. This results in parasitic inductance components. In the ultra-high frequency region, such parasitic components 114 and 124 seriously degrade the switch performance, and as a result, there is a problem of degrading the separation characteristics of the switch circuit.

SUMMARY OF THE INVENTION An object of the present invention is to prevent degradation of separation characteristics caused by incomplete ground characteristics in an ultra high frequency switch circuit, and in particular, to provide an ultra high frequency differential switch circuit capable of omitting an external ground terminal.

The ultra-high frequency differential switch circuit of the present invention for achieving the above object has a T-shaped (+) transmission switch formed by connecting the first and second FETs in series, and the third FET in parallel, The same structure as the (+) transmit switch, and includes (-) transmit switch, (+) receive switch and (-) receive switch, respectively;

Electrically connecting the third FET of the (+) transmission switch and the third FET of the (-) transmission switch to form a virtual ground terminal (G1) (G2) at a connection point thereof;

Electrically connecting the third FET of the (+) receiving switch and the third FET of the (−) receiving switch to form a virtual ground terminal (G3) (G4) at a connection point thereof;

The first FET of the (+) transmitting switch and the first FET of the (+) receiving switch are electrically connected to each other, and used as a (+) antenna.

Electrically connecting the first FET of the (-) transmitting switch and the first FET of the (-) receiving switch to use as a (-) antenna,

Electrically connecting the second FET of the (+) transmitting switch and the second FET of the (-) transmitting switch to use as a transmitting terminal;

Electrically connecting the second FET of the (+) receiving switch and the second FET of the (−) receiving switch to use as a receiving terminal;

By electrically connecting the (+) antenna and the (-) antenna to form an antenna terminal, the signals received through the antenna terminal are divided into (+) and (-) received signals having the same magnitude and opposite phases. Combines the positive and negative transmission signals which are received or are out of phase; And

In the process of dividing or synthesizing a received signal or a transmitted signal, an external ground terminal is omitted by forming a virtual ground terminal using a cancellation phenomenon of two complementary signals of opposite phases and the same magnitude.

According to this configuration, the present invention constitutes a differential switch circuit in which a pair of switch circuits having the same structure are connected to each other and the external ground terminals are removed, and their input signals are the same in size and in phase. By applying the opposite complementary signal, a virtual ground terminal can be made in the differential switch circuit to improve the isolation characteristics without a separate external ground terminal.

1 is a conventional microwave switch circuit diagram,

Figure 2 is a conventional packaged ultra-high frequency switch circuit diagram,

3 is an ultrahigh frequency differential switch circuit diagram of the present invention;

4 is a separation characteristic diagram between a transmitting and receiving terminal in a transmission mode of a switch;

5 is a diagram illustrating separation characteristics between an antenna and a transmitting terminal in a receiving mode of a switch.

* Description of the symbols for the main parts of the drawings *

10; (+) Transmit Switch 20; (-) Transmit Switch

30; (+) receiving switch 40; (-) receiving switch

50; antenna terminal 60; transmitter terminal

61; receiving terminal

Hereinafter, preferred embodiments of the present invention will be described with reference to the accompanying drawings. 3 is a differential switch circuit diagram of the present invention.

According to the present invention, three FETs are formed as a group, and two FETs, that is, a first switch and a second FET are connected in series, and the other one is connected to the third FET in parallel to use a switch circuit. To form.

The purpose of the present invention is to disclose a differential switch structure that eliminates external ground terminals by connecting FETs used as respective ground terminals in a pair of group switch circuits having such a structure.

Referring to the drawings, reference numeral 50 denotes an antenna terminal, 51 denotes a (+) antenna terminal, 52 denotes a (-) antenna terminal, 54 denotes a (+) transmitting terminal, 55 denotes a negative terminal, and 56 denotes a positive terminal. , 57 is a negative terminal, 60 is a transmitting terminal, 61 is a receiving terminal.

In the present invention, the three FETs 11-13 are the (+) transmission switch 10, the three FETs 21-23 are the (-) transmission switch 20, and the three FETs 31-33 are the (+) The receiving switch 30 and the three FETs 31 to 33 include a negative receiving switch 40, and each of the switches 10 to 40 has three FETs to form a T shape.

The positive transmission switch 10 has control terminals 11a-13a for applying a control voltage for opening and closing each of the FETs 11-13, and the positive transmission switch 10 has a third FET ( 13 is electrically connected via terminal G1 of 13 and terminal G2 of third FET 23 of (-) transmission switch 20, and these terminals G1 and G2 are disclosed in the present invention. Used as a virtual ground terminal.

According to the present invention having such a structure, when the positive transmission switch 10 is connected, a control voltage higher than a threshold voltage is applied to the control terminals 11a and 12a to provide a channel of the first and second FETs 11 and 12. Is opened, and a control voltage lower than the threshold voltage is applied to the control terminal 13a to close the channel of the third FET 13.

On the contrary, in the case where the (+) transmission switch 10 is disconnected, a control voltage lower than a threshold voltage is applied to the control terminals 11a and 12a to close the channels of the first and second FETs 11 and 12 and the control terminal. A control voltage higher than the threshold voltage is applied to 13a to open the channel of the third FET 13.

The (-) transmission switch 20 is composed of three FETs 21-23, and a control terminal 21a-22a and a signal terminal of the FET 23 that apply a control voltage to open and close each FET 21-22. It consists of 23a.

When the (-) transmission switch 20 is connected, a control voltage higher than a threshold voltage is applied to the control terminals 21a and 22a to open the channels of the first and second FETs 21 and 22, and the control terminal 23a. ), The control voltage lower than the threshold voltage is applied to close the channel of the third FET 23.

When the (-) transmission switch 20 is disconnected, a control voltage lower than a threshold voltage is applied to the control terminals 21 and 22 to close the channels of the first and second FETs 21 and 22 and the control terminal 23a. ), The control voltage higher than the threshold voltage is applied to open the channel of the third FET 23.

The positive receiving switch 30 has the same structure as the positive transmitting switch 10, and constitutes a T-type switch with three FETs 31-33, and each of the first and second FETs 31 Control terminals 31a and 32a for applying a control voltage to open and close the reference numeral 32 and a signal terminal 33a of the third FET 33.

According to the present invention having the above structure, when the positive receiving switch 30 is connected, the control terminals 31a and 32a are applied with a control voltage higher than the threshold voltage to the channels of the first and second FETs 31 and 32. Is opened, and a control voltage lower than the threshold voltage is applied to the control terminal 33a to close the channel of the third FET 33.

On the contrary, when the (+) receiving switch 30 is disconnected, a control voltage lower than a threshold voltage is applied to the control terminals 31a and 32a to close the channels of the first and second FETs 31 and 32, and the control terminal is closed. A control voltage higher than the threshold voltage is applied to 33a to open the channel of the third FET 33.

The (-) receiving switch 40 is composed of FETs 41-43, and has control terminals 41a-42a for applying a control voltage to open and close the first and second FETs 41, 42. The signal terminal 43a of the FET 43 is formed.

When the (-) receiving switch 40 is in a connected state, a control voltage higher than a threshold voltage is applied to the control terminals 41a and 42a to open a channel of the first and second FETs 41 and 42, and the control terminal 43a. ), The control voltage lower than the threshold voltage is applied to close the channel of the third FET 43.

When the (-) receiving switch 40 is in a broken state, a control voltage lower than a threshold voltage is applied to the control terminals 41a and 42a to close the channels of the first and second FETs 41 and 42 and the control terminal 43a. ), A control voltage higher than the threshold voltage is applied to open the channel of the third FET 43.

Hereinafter, the operation of the differential switch configured as in the above embodiment will be described.

In the differential switch, in the receiving mode, the received signals entering the antenna terminal 50 are received signals having the same magnitude and opposite phases through the balun 53 and having the opposite phases. (+) Receiving signal, which is separated and separated from the (+) antenna terminal 51, is transmitted to the (+) receiving terminal 56 through the connected (+) receiving switch 30, and is disconnected (+) transmission. It is not transmitted to the (+) transmitting terminal 54 by the switch 10, and at the same time, the (-) receiving signal coming into the (-) antenna terminal 52 is connected to the (-) receiving switch 40 (-). It is transmitted to the reception terminal 57, and is not transmitted to the (-) transmission terminal 55 by the broken (-) transmission switch 20.

In this state of switching to the reception mode as described above, a voltage higher than the threshold voltage is applied to the control terminals 31a and 32a of the first and second FETs 31 and 32 of the (+) receiving switch 30 to be electrically connected to the first. 2 FETs 31 and 32 are energized to open the positive receiving terminal 56 and at the same time, the regulating terminal 41a of the first and second FETs 41 and 42 of the negative receiving switch 40. By applying a voltage higher than the threshold voltage to) 42a, the first and second FETs 41 and 42 are electrically energized to open the negative terminal 57.

On the contrary, in the reception mode, the first and second FETs are electrically applied by applying a voltage lower than the threshold voltage to the control terminals 11a and 12a of the first and second FETs 11 and 12 of the (+) transmission switch 10. (11) The circuit 12 is short-circuited, and at the same time, a voltage lower than the threshold voltage is also applied to the control terminals 21a and 22a of the first and second FETs 21 and 22 of the (-) transmission switch 20 electrically. The first and second FETs 21 and 22 are shorted.

As a result, the (+) receiving signal transmitted to the (+) receiving terminal 56 and the (-) receiving signal transmitted to the (-) receiving terminal 57 merge with each other in the same phase while passing through the balun 59 and receive the receiving terminal. Forwarded to 61.

On the contrary, in the transmission mode, the transmission signals entering the transmission terminal 60 are divided into transmission signals having the same magnitude and opposite phases through the balun 58, and the (+) transmission terminal. The positive (+) transmission signal coming into the (54) is transmitted to the (+) antenna terminal 51 through the connected (+) transmission switch 10 and the (+) receiving terminal (30) by the disconnected (+) receiving switch 30. 56 is not transmitted, and at the same time, the (-) transmission signal entering the (-) transmission terminal 55 is transmitted to the (-) antenna terminal 52 through the open (-) transmission switch 20 and closed (-). It is not transmitted to the negative receiving terminal 57 by the receiving switch 40.

In this state of switching to the transmission mode, a voltage higher than the threshold voltage is applied to the control terminals 11a and 12a of the first and second FETs 11 and 12 of the (+) transmission switch 10 to be electrically connected. 2 FETs 11 and 12 are energized to be delivered to the positive antenna terminal 51, and at the same time, the control terminals of the first and second FETs 21 and 22 of the (-) transmission switch 20 A voltage higher than the threshold voltage is also applied to 21a and 22a to electrically transfer the first and second FETs 21 and 22 to the negative antenna terminal 52.

On the contrary, in the transmission mode, the first and second FETs are electrically applied by applying a voltage lower than the threshold voltage to the control terminals 31a and 32a of the first and second FETs 31 and 32 of the (+) receiving switch 30. (31) Short-circuits (32) and at the same time electrically applies a voltage lower than the threshold voltage to the control terminals (41a) (42a) of the first and second FETs (41) (42) of the (-) receiving switch (40). The first and second FETs 41 and 42 are shorted.

As a result, the (+) transmission signal transmitted to the (+) antenna terminal 51 and the (-) transmission signal transmitted to the (-) antenna terminal 52 are added to each other in the same phase while passing through the balun 53 to the antenna terminal. 50 is passed.

The signal terminal G1 of the FET 13 constituting the (+) transmission switch 10 and the signal terminal G2 of the FET 23 constituting the (-) transmission switch 20 are connected to each other (+). When the (+) signal is applied to the transmission switch 10 and the (-) signal having the same magnitude and opposite phase is applied to the transmission switch 10, the terminals G1 and G2 become virtual ground terminals.

In addition, the signal terminal G3 of the FET 33 constituting the (+) receiving switch 30 and the signal terminal G4 of the FET 43 constituting the (-) receiving switch 40 are connected to each other ( When the (+) signal is applied to the (+) receiving switch 30 and the (-) signal having the same magnitude and opposite phase is applied to the (+) receiving switch 30, the terminals G3 and G4 become virtual ground terminals.

Therefore, since terminal G1, G3 or terminal G2, G4 is a ground terminal by itself, there is no need to apply a ground signal from the outside, so it is not affected by parasitic components by the package. Can be.

4 and 5 compare the characteristics of the conventional switch circuit and the differential switch circuit of the present invention, and show the deterioration of the separation characteristic of the switch when the package parasitic inductance is converted to 0-3nH.

4 shows the rate at which the transmission signal entering the transmission terminals 54 and 55 leaks through the reception terminals 56 and 57 when the switch operates in the transmission mode. Assuming that it is worse from -40.3dB to -20.8dB.

FIG. 5 shows the rate at which the received signal entering the antenna terminal 50 leaks through the transmission terminals 54 and 55 when the switch is operated in the reception mode, and assumes that the package parasitic component is 2nH. You can see that it is worse from -41.5dB to -23.0dB.

As described above, the differential switch circuit of the present invention has a virtual ground terminal, so there is no package parasitic component, so that the separation property is not degraded, and thus the separation property is superior to the conventional switch circuit. have.

Claims (1)

(-) Transmission switch having a T-shaped (+) transmission switch formed by connecting the first and second FETs in series and connecting the third FETs in parallel, respectively having the same structure as the (+) transmission switch, A positive receiving switch and a negative receiving switch; Forming a virtual ground terminal (G1) (G2) at the connection point by electrically connecting the third FET of the (+) transmission switch and the third FET of the (-) transmission switch; Forming a virtual ground terminal (G3) (G4) at the connection point by electrically connecting the third FET of the (+) receiving switch and the third FET of the (−) receiving switch; The first FET of the (+) transmitting switch and the first FET of the (+) receiving switch are electrically connected to each other, and used as a (+) antenna. Electrically connecting the first FET of the (-) transmitting switch and the first FET of the (-) receiving switch to use as a (-) antenna; Electrically connecting the second FET of the (+) transmission switch and the second FET of the (-) transmission switch to use as a transmission terminal, Electrically connecting the second FET of the (+) receiving switch and the second FET of the (−) receiving switch to use as a receiving terminal; By electrically connecting the (+) antenna and the (-) antenna to form an antenna terminal, the signals received through the antenna terminal are divided into (+) and (-) received signals having the same magnitude and opposite phases. Combines the positive and negative transmission signals which are received or are out of phase; And In the process of dividing or synthesizing a received signal or a transmitted signal, an external ground terminal is omitted by forming a virtual ground terminal using a cancellation phenomenon of two complementary signals of opposite phases and the same magnitude. Shuttle switch circuit.