KR100424817B1 - Manutacturing process of wafer probe and probe card within vertical type cantilever beam - Google Patents

Abstract

PURPOSE: A wafer probe having a vertical type cantilever beam and a manufacturing method of a probe card are provided to be capable of carrying out the burn-in test for a wafer state and being easily connected with a PCB(Printed Circuit Board). CONSTITUTION: An N+ type diffusion layer(20), an N type epitaxial layer(30), and a nitride layer are sequentially formed on a silicon wafer(10). A predetermined pattern is formed at the backside of the silicon wafer for electrically connecting a probe metal line with a PCB. A hole(300) is formed at the silicon wafer by carrying out an etching process using a protection layer. A conductive layer is formed in the hole for connecting a cantilever beam type probe contact portion with the PCB. The N+ type diffusion layer is transformed into a porous silicon layer. A three-dimensional cantilever beam type probe is formed by removing the porous silicon layer. A probe substrate having a vertical type probe is formed in a furnace by carrying out a heat treatment using the thermal stress between thin films. A probe card is completed by electrically connecting the probe substrate to the PCB substrate.

Description

Manufacturing method of wafer probe and probe card with vertical cantilever beam {MANUTACTURING PROCESS OF WAFER PROBE AND PROBE CARD WITHIN VERTICAL TYPE CANTILEVER BEAM}

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a probe and a probe card used for a probing test of a semiconductor device integrated on a wafer. In particular, the present invention relates to a change in wafer state by using the same material as the semiconductor device to be inspected. The present invention relates to a method of manufacturing a probe and a probe card, which enables burn-in testing and facilitates connection to a PCB.

Semiconductor integrated circuit manufacturing technology is becoming more and more functional and highly integrated with the development of MEMS technology. The MEMS (Micro Electro Mechanical Systems) is a micro sensor using a micromachining technology using a semiconductor process, especially integrated circuit technology. It is a field for manufacturing and experimenting actuators and electromechanical structures. Micromachines manufactured by micromachining techniques can realize sizes of mm or less and precision of μm or less.

The micromachining technology used in MEMS can be classified into bulk micromachining by silicon bulk etching and surface micromachining by depositing polycrystalline silicon, silicon nitride film, oxide film and metal film on silicon and etching them according to the designed shape. .

The bulk micromachining is a technique that uses an etching property in which an alkaline solution etches silicon single crystals at different speeds according to the crystal direction. The bulk micromachining can implement a desired three-dimensional structure by etching a silicon single crystal wafer, and precise etching depth and shape control are key. . It is a technology widely used in the manufacture of microfluidic devices such as accelerometers, angular speedometers, microvalve valves, nozzles, and micropumps.

In addition, the surface micromachining forms a microstructure through a process of depositing and etching a structure layer and a sacrificial layer on a silicon substrate. In other words, after the sacrificial layer and the structural layer are formed on the substrate, the sacrificial layer is etched to leave only the structural layer.

On the other hand, the size of devices (DEVICE) in the semiconductor integrated circuit is getting smaller, but the problem of heat generation due to the integration is increasing, these devices are before and after the manufacturing process, or packaging (packaging) It is essential to check whether the product is manufactured in accordance with the design and whether it is defective.

Probe cards with horizontal needles are widely used to make these tests, but due to the increase in the number of device pads and the reduction of the pad size, it is possible to reduce the pitch of the needle contact to increase the density of the probe. It was difficult and difficult to align the needle contacts to the same height due to the increase in the number of needles.

Therefore, as proposed in Korean Patent Registration No. 214162 (hereinafter referred to as Prior Art 1), many methods for a wafer probe card that can solve the above problems have been proposed.

In the prior art 1, as shown in FIG. 1, five steps (a to e) for forming a microstructure of a silicon cantilever beam using a silicon wafer are sequentially performed.

In step (a), an oxide film (not shown) of about 8,000 Å is grown on the n-type silicon wafer 10. Next, after removing the oxide film on the portion where the n + diffusion layer 20 is to be formed by using photolithography, an n + diffusion layer 20 is formed on the n-type wafer 10 to which the oxide film is selectively exposed using POCl ₃ . Finally, all the oxide film remaining on the silicon wafer 10 is removed.

In the step (b), the n-epi layer 30 to form the cantilever beam 50 of the microstructure is grown on the top.

In step (c), after the photoresist is coated on the n-epi layer 30, a mask pattern having a desired shape is formed by using photolithography. Next, the n + diffusion layer 20 is exposed through selective etching of the n-epi layer 30 exposed by the pattern formation by a wet etching method or a dry etching method.

In step (d), the n + diffusion layer 20 exposed in step (c) is subjected to anodization for a suitable time using a constant voltage or constant current source in a high concentration of HF solution to form porous silicon (40, PSL). .

In the step (e), the cantilever beam 50 having a predetermined size and shape on the n-type silicon wafer 10 by removing the porous silicon 40 formed in the step (d) to an etching solution such as a 5% NaOH solution. To form.

Another conventional wafer-type probe technology is domestic patent registration No. 202998 (hereinafter referred to as prior art 2), the prior art 2 is formed using the prior art 1 as shown in Fig. 2 and 3 A metal film or an oxide film is deposited on the cantilever beam as shown in FIGS. 2A and 3A and heat-treated to form a cantilever beam as shown in FIGS. 2B and 3B.

However, in the prior arts 1 and 2, when forming the cantilever beam and depositing the metal film and the oxide film, it is difficult to manufacture a plurality of probes and probe cards having independent electrical connections with the individual cantilever beams. there was.

The present invention has been made to solve the above problems, and has an independent electrical connection with the individual cantilever beam using a semiconductor integrated circuit manufacturing process and MEMS technology to manufacture a wafer probe card having a plurality of probes. It is an object of the present invention to provide a method of manufacturing a probe card, in which a plurality of probes and probes are dense at a fine pitch.

Another object of the present invention is to provide a method for manufacturing a vertical probe card in the form of a cantilever beam using a wafer, which is a semiconductor material.

Another object of the present invention is to provide a method of electrically connecting a wafer type vertical probe and a PCB among components constituting the probe card.

Another object of the present invention is to provide a probe and a probe card capable of a burn-in test of a wafer state, which has not been performed in the conventional method, by using a wafer of the same material as the device to be tested. .

1 is a cross-sectional view sequentially illustrating a process for forming an initial microstructure of a silicon micro tip,

2A and 2B are cross-sectional views sequentially illustrating a process for depositing a thin film on the microstructure manufactured by the process of FIG. 1 and forming a silicon micro tip by heat treatment;

3A and 3B are cross-sectional views sequentially illustrating a process for forming a silicon micro tip by forming a thermal oxide film on a microstructure manufactured by the process of FIG. 1;

Figure 4a is a cross-sectional view schematically showing a probe substrate having a fine probe in the form of a cantilever beam according to the present invention,

Figure 4b is a cross-sectional view showing a probe card connecting the probe substrate to the PCB using a buffer pad as an embodiment of the present invention,

Figure 4c is a cross-sectional view showing a probe card connecting the probe substrate to the PCB without a buffer pad as another embodiment according to the present invention,

4D is a state diagram showing an operating state of a cantilever beam on a device pad in the probe card shown in FIG. 4B;

4E is a state diagram showing an operating state of a cantilever beam on a device pad in the probe card shown in FIG. 4C;

5A to 5H are process diagrams sequentially illustrating a process of manufacturing a probe and a probe substrate as an embodiment of the present invention.

<Brief description of the major symbols in the drawings>

10: silicon substrate 20: n + diffusion layer

30: n-epi layer 40: porous silicon

50: micro cantilever beam 60: nitride film (Si ₃ N ₄ )

70: insulating film 80: metal film

90: fine probe with metal wiring

100: buffer pad 200: wire

300: KOH hole for connection to PCB 301: Micro solder ball

400: main circuit board (PCB) 500: connection between the probe board and the PCB

600: semiconductor device pad 700: semiconductor device

In order to achieve the above technical problem, a method of manufacturing a wafer probe and a probe card according to the present invention and an embodiment of the wafer probe and the probe card produced thereby will be described with reference to the accompanying drawings.

Figure 4a is a schematic cross-sectional view showing a probe substrate having a fine probe in the form of a cantilever beam according to the present invention, Figure 4b is a probe card connecting the probe substrate to the PCB using a buffer pad as an embodiment according to the present invention 4C is a cross-sectional view illustrating a probe card connecting a probe substrate to a PCB without a buffer pad as another embodiment according to the present invention, and FIG. 4D is a cross-sectional view of the probe card shown in FIG. 4B. Figure 4e is a state diagram showing the operating state of the cantilever beam, Figure 4e is a state diagram showing the operating state of the cantilever beam on the device pad in the probe card shown in Figure 4c, Figures 5a to 5h As an example, it is a process chart which shows the process which manufactures a probe and a probe board sequentially.

As shown in FIG. 4A, the cantilever beam type probe 90 according to the present invention performs selective etching and anodization on a part of single crystal silicon (Silicon) on which a metal film having a low thermal stress and a low resistivity is deposited. Formed through, the area 300 to connect the probe substrate and the external PCB 400 is defined using a photolithography process, and then formed by a wet etching method or a dry etching method.

The probe 90 of the cantilever beam type is produced through a certain manufacturing process, a detailed description will be described later in the process of Figures 5a to 5h, as the probe 90 produced by the prior art 1 as in the present invention It will not be effective.

On the other hand, the probe 90 is manufactured as a probe card through a separate process, hereinafter, the process will be described separately by the embodiment.

As an embodiment of the present invention, as shown in FIG. 4B, the cantilever beam-type probe 90 is a PCB substrate 400 using a buffer pad 100 in which a ceramic or alumina substrate is processed and a metal wire 200 is inserted therein. Can be directly connected to fabricate a wafer-type probe card having an electrically conducting vertical cantilever beam.

In addition, as another embodiment of the present invention as shown in Figure 4c is a vertical cantilever that is electrically conductive by directly connecting using the contact portion 500 and the micro solder ball 301 of the PCB 400 without the buffer pad 100 A wafer type probe card having a beam can be manufactured, and a high temperature conductor can be used instead of the micro solder ball.

Accordingly, the probe card using the buffer pad 100 as shown in FIG. 4D and the probe card not using the buffer pad as shown in FIG. 4E are applied with a constant pressure to the probe, thereby The pad 600 is used in contact with the state.

Hereinafter, a manufacturing process of a probe and a probe substrate according to an exemplary embodiment of the present invention will be described in detail with reference to FIGS. 5A to 5H.

The process shown in FIG. 5A forms an n ⁺ diffusion layer 20 and an n-epi layer 30 having a constant depth on the silicon wafer 10, and a nitride film (Si ₃ N ₄ ; 60) of about 1,500 to 1,800 Å. Is grown by using low-pressure chemical vapor deposition (LPCVD), wherein the thickness of n ⁺ diffusion layer 20 and n-epi layer 30 is that the cantilever beam has a radius of curvature and the elasticity of the probe and the wafer In order to use, it becomes very important. As an embodiment of the present invention, it is preferable to grow the thickness of the n ⁺ diffusion layer 20 to 20 µm or more and the n-epi layer 30 to about 2 to 10 µm.

The process illustrated in FIG. 5B is a step for forming a region 300 for electrical connection between the probe metallization and the PCB substrate 400 on the back surface of the silicon wafer. The pattern is defined using a photolithography process and dry etching. To remove the nitride film (Si ₃ N ₄ ; 60).

The process illustrated in FIG. 5C is a step of forming a predetermined size hole 300 on a silicon wafer by using a protective film 60, wherein the process selectively wets or dry etch used in a silicon etching method. In one embodiment of the present invention, the thickness of the silicon wafer in consideration of the mechanical strength as the probe substrate and the subsequent connection with the PCB 400 may be used to adjust the thickness of the silicon wet etching and the silicon wafer using the anisotropic wet etching solution. Through dry etching (Deep-RIE, etc.) through the silicon wafer is completely penetrated, and finally the insulating film 70 is formed to insulate not only the hole (300) but the entire probe substrate.

The process illustrated in FIG. 5D is a step for electrically conducting the cantilever beam type probe contact 90 and the hole 300 for connecting the PCB 400 to the front surface of the silicon wafer using a thin film formation method. After the 80 is formed, the probe 90 and the metal wires are formed through the photolithography process. Therefore, the holes 90 connected to the probe 90 and the metal wires and the PCB 400 are electrically connected to each other. do.

The metal film 80 is nickel-chromium alloy (Ni-Cr) or nickel (Ni), etc., which has better adhesion and thermal stress than other metal films, and has a low specific resistance, good conductivity, and relatively high hardness. It is desirable to deposit high gold (Au) or copper (Cu), and the metal film 80 should be compatible with subsequent processes.

In another method, a thin layer 80 is formed on a silicon wafer by using a thin film forming method. Then, the probe 90 and the metal wiring pattern are defined through a photolithography process and a cantilever beam through a plating process. Gold plating of a certain thickness is performed to sufficiently reduce the mechanical strength and contact resistance. Thereafter, the photoresist is removed and the unnecessary base metal film is etched, so that the hole 90 connected to the probe 90, the metal wire, and the PCB 400 is electrically conductive.

The process illustrated in FIG. 5E is a step for forming a probe 90 in the form of a silicon cantilever beam, defining a probe region through a photolithography process, removing the insulating layer 70 by dry etching, and finally, an n-epi layer. Dry etching the 30 creates an area for the cantilever beam.

The process illustrated in FIG. 5F is a step of denaturing the n ⁺ diffusion layer 20 to porous silicon (PSL) 40. As an embodiment of the present invention, the n ⁺ diffusion layer 20 exposed by the process of FIG. 5E has a high concentration. In the HF aqueous solution, anodic reaction is carried out for a predetermined time using a constant voltage or constant current source to denature to porous silicon (PSL) 40.

The process shown in FIG. 5G is a step of removing the porous silicon 40 modified by the process of FIG. 5F. As an embodiment of the present invention, the three-dimensional cantilever is etched by etching the porous silicon 40 in 5 wt% aqueous NaOH solution. A beam 90 probe is formed.

The process shown in FIG. 5H is a step of heat-treating the probe 90 formed by the process of FIG. 5G in a furnace at a constant temperature for a predetermined time, by using thermal stress between the thin films constituting the cantilever beam by the heat treatment. Probe substrate formation with a vertical probe 90 several hundred microns in height is complete.

On the other hand, the completed wafer probe substrate can be connected to the PCB substrate 400 by a variety of methods, in one embodiment of the present invention by processing a ceramic or alumina substrate buffer pad 100 into which the metal wire 200 is inserted Using the micro solder ball 301 to connect the PCB substrate 400 and the wafer probe substrate.

In another embodiment of the present invention, the electrically conductive wafer-type probe card is completed by directly connecting the probe substrate to the contact portion 500 of the PCB 400 and the micro solder ball 301 without the buffer pad 100.

As described above, it is possible to manufacture a vertical probe card in which a portion of a silicon wafer forms a cantilever beam-type probe by using a semiconductor integrated circuit manufacturing process and MEMS technology. Since it is proposed as an embodiment, manufacturing a vertical probe card by changing or modifying the order of the manufacturing process is all within the scope of the present invention.

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a probe probe and a probe card used for a probing test of a semiconductor device integrated on a wafer. In particular, the state of a wafer can be achieved by using the same material as the semiconductor device to be inspected. The present invention relates to a method of manufacturing a probe and a probe card that enables burn-in testing of the device and facilitates connection with a PCB. The material and physical properties of a device to be inspected using a semiconductor integrated circuit manufacturing process and MEMS technology By using silicon wafers with the same characteristics, a probe having a smaller size than a device PAD can be manufactured, and the density of the probe can be increased.

In addition, by using a semiconductor integrated circuit manufacturing process and the MEMS technology to manufacture the probe and the probe substrate integrally, there is no need for additional processes, it is possible to reduce the size, integration and reproducibility easily and low cost.

In addition, there is an effect that a burn-in test of the wafer state, which has not been performed in the conventional method, is possible.

In addition, since the probe card manufactured by the present invention uses a silicon wafer, the probes have an effect of maintaining sufficient height and high elasticity even after repeated use.

In addition, according to the present invention, the number, size, force and shape of the probe can be varied, and by directly connecting the probe substrate and the PCB substrate, auxiliary components of the currently used probe card, such as a glass substrate, an auxiliary circuit board, a buffer pad, etc. Since the use of the same parts is excluded, the productivity is improved.

Claims (16)

In the wafer probe and probe card used for semiconductor wafer probing inspection, Forming a n ⁺ diffusion layer and an n-epi layer having a predetermined depth on the silicon wafer, and growing a nitride film (Si ₃ N ₄ ) having a predetermined thickness using low-pressure chemical vapor deposition (LPCVD); Defining a pattern using a photolithography process and removing a nitride film using dry etching to form a region for electrical connection between the probe metallization and the PCB substrate at the back side of the silicon wafer; Forming a predetermined size hole on the silicon wafer using a protective film by a silicon etching method; Electrically conducting a hole for connecting the probe contact portion in the form of a cantilever beam and the PCB; Defining a probe region through a photolithography process, removing the insulating layer by dry etching, and finally forming an area for the cantilever beam by dry etching the n-epi layer; denaturing n ⁺ diffusion layer with porous silicon; Removing the modified porous silicon to form a probe in the form of a three-dimensional cantilever beam; Heat-treating the probe in a furnace at a constant temperature to form a probe substrate with a vertical probe having hundreds of micro heights using thermal stress between the thin films; And electrically conducting the wafer probe substrate to the PCB substrate to complete the probe card. The method of claim 1, The thickness of the n ⁺ diffusion layer is 20㎛ or more, the thickness of the n-epi layer is 2 ~ 10㎛, the thickness of the nitride film is 1,500 ~ 1,800Å, the method of manufacturing a wafer probe and probe card having a vertical cantilever beam . The method of claim 1, The hole penetrates the silicon wafer completely by at least one of a wet etching method and a silicon dry etching method in consideration of a connection with a PCB later, and finally forms an insulating film to insulate not only the hole but the entire probe substrate. A method of manufacturing a wafer probe and a probe card having a vertical cantilever beam. The method of claim 3, The wet etching method is a wafer probe and probe card having a vertical cantilever beam, characterized in that an anisotropic wet etching solution is used in consideration of the thickness of the silicon wafer in consideration of the mechanical strength as a probe substrate and the connection with the PCB 400 later. Manufacturing method. The method of claim 3, The dry etching method is a method of manufacturing a wafer probe and a probe card having a vertical cantilever beam that completely penetrates the silicon wafer using dry etching (Deep-RIE, etc.) by adjusting the thickness of the silicon wafer. The method of claim 1, The porous silicon is a method of manufacturing a wafer probe and probe card having a vertical cantilever beam, characterized in that the n ⁺ diffusion layer is denatured by anodic reaction for a predetermined time using a constant voltage or a constant current source in a high concentration of HF solution. The method of claim 1, The modified porous silicon is a wafer probe and probe card manufacturing method having a vertical cantilever beam characterized in that the porous silicon is immersed in 5wt% NaOH aqueous solution. The method of claim 1, In order to electrically conduct the hole, a metal film is formed on the entire surface of the silicon wafer by using a thin film formation method, and then a probe and a metal wire are formed by a photolithography process. How to make a card. The method of claim 1, In order to electrically conduct the hole, a thin layer is formed on the entire surface of the silicon wafer by using a thin film forming method, and then a probe and a metal wiring pattern are defined through a photolithography process, and a plating process is performed on the cantilever beam. Vertical cantilever, characterized by performing gold plating of a certain thickness to sufficiently reduce mechanical strength and contact resistance, and then removing the photoresist and etching unnecessary base metal films. A method of manufacturing a wafer probe and a probe card having a beam. The method of claim 8, The metal film may be formed of a nickel-chromium alloy or nickel, which is relatively excellent in adhesion and thermal stress, and at least one of gold (Au) or copper (Cu) having a low specific resistance, good conductivity, and high hardness. A method of manufacturing a wafer probe and a probe card having a vertical cantilever beam. The method of claim 8, The metal film deposits a nickel-chromium (Ni-Cr) alloy having excellent adhesion and thermal stress, and deposits gold (Au) thereon, followed by contact resistance through a photolithography process and a plating process. A method of manufacturing a wafer probe and a probe card having a vertical cantilever beam, which is plated again with low gold (Au). delete delete delete delete delete