KR100413184B1 - Switched-Capacitor circuit using inverting amplifier - Google Patents
Switched-Capacitor circuit using inverting amplifier Download PDFInfo
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- KR100413184B1 KR100413184B1 KR10-2001-0030842A KR20010030842A KR100413184B1 KR 100413184 B1 KR100413184 B1 KR 100413184B1 KR 20010030842 A KR20010030842 A KR 20010030842A KR 100413184 B1 KR100413184 B1 KR 100413184B1
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- 239000003990 capacitor Substances 0.000 title claims abstract description 63
- 238000000034 method Methods 0.000 claims description 3
- XUIMIQQOPSSXEZ-UHFFFAOYSA-N Silicon Chemical compound [Si] XUIMIQQOPSSXEZ-UHFFFAOYSA-N 0.000 abstract description 3
- 229910052710 silicon Inorganic materials 0.000 abstract description 3
- 239000010703 silicon Substances 0.000 abstract description 3
- 230000003321 amplification Effects 0.000 description 1
- 238000003199 nucleic acid amplification method Methods 0.000 description 1
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- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06G—ANALOGUE COMPUTERS
- G06G7/00—Devices in which the computing operation is performed by varying electric or magnetic quantities
- G06G7/12—Arrangements for performing computing operations, e.g. operational amplifiers
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- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06G—ANALOGUE COMPUTERS
- G06G7/00—Devices in which the computing operation is performed by varying electric or magnetic quantities
- G06G7/12—Arrangements for performing computing operations, e.g. operational amplifiers
- G06G7/14—Arrangements for performing computing operations, e.g. operational amplifiers for addition or subtraction
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- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06G—ANALOGUE COMPUTERS
- G06G7/00—Devices in which the computing operation is performed by varying electric or magnetic quantities
- G06G7/12—Arrangements for performing computing operations, e.g. operational amplifiers
- G06G7/16—Arrangements for performing computing operations, e.g. operational amplifiers for multiplication or division
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- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03F—AMPLIFIERS
- H03F1/00—Details of amplifiers with only discharge tubes, only semiconductor devices or only unspecified devices as amplifying elements
- H03F1/30—Modifications of amplifiers to reduce influence of variations of temperature or supply voltage or other physical parameters
- H03F1/303—Modifications of amplifiers to reduce influence of variations of temperature or supply voltage or other physical parameters using a switching device
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- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03F—AMPLIFIERS
- H03F3/00—Amplifiers with only discharge tubes or only semiconductor devices as amplifying elements
- H03F3/005—Amplifiers with only discharge tubes or only semiconductor devices as amplifying elements using switched capacitors, e.g. dynamic amplifiers; using switched capacitors as resistors in differential amplifiers
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- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03G—CONTROL OF AMPLIFICATION
- H03G1/00—Details of arrangements for controlling amplification
- H03G1/0005—Circuits characterised by the type of controlling devices operated by a controlling current or voltage signal
- H03G1/0088—Circuits characterised by the type of controlling devices operated by a controlling current or voltage signal using discontinuously variable devices, e.g. switch-operated
- H03G1/0094—Circuits characterised by the type of controlling devices operated by a controlling current or voltage signal using discontinuously variable devices, e.g. switch-operated using switched capacitors
Abstract
본 발명은 반전증폭기를 이용한 스위치드-커패시터(Switched-Capacitor) 회로(이하, "SC 회로")에 관한 것으로서, 본 발명은 반전증폭기의 입력단자와 신호 입력단자 사이의 제1커패시터(C1), 반전증폭기의 출력단자와 최종 출력단자 사이의 제2커패시터(C2), 반전증폭기의 입력단과 출력단 사이에 연결된 피드백 커패시터(Cf), 상기 제1커패시터 및 제2커패시터와 그라운드 사이를 스위칭하는 제1상 스위치(φ1), 피드백 커패시터와 병렬 연결되어 반전증폭기의 입출력단을 연결시키도록 스위칭하는 제1상 스위치(φ1), 상기 제1커패시터에 인가되는 입력전압을 스위칭하는 제2상 스위치(φ2)로 구성된다. 본 발명에 따른 반전증폭기를 사용한 SC 회로는 전력 소모와 실리콘 면적을 획기적으로 감소시켜, 다양한 초저전력, 초소형 SC 회로, SC필터, ADC 및 DAC 등을 구현하는데 사용될 수 있는 효과를 거둘 수 있다.The present invention relates to a switched-capacitor circuit using an inverting amplifier (hereinafter referred to as "SC circuit"), and the present invention relates to a first capacitor (C 1 ) between the input terminal and the signal input terminal of the inverting amplifier, A second capacitor C 2 between the output terminal and the final output terminal of the inverting amplifier, a feedback capacitor C f connected between the input terminal and the output terminal of the inverting amplifier, the first capacitor and a second capacitor switching between the ground and the second capacitor; a first phase switch (φ 1), second phase switch for switching an input voltage applied to the first capacitor 1, the switch is (φ 1), the parallel connection and the feedback capacitor to switch to couple the input and output terminals of the inverting amplifier (φ 2 ). SC circuit using the inverting amplifier according to the present invention can significantly reduce the power consumption and silicon area, can be used to implement a variety of ultra-low power, ultra small SC circuit, SC filter, ADC and DAC.
Description
본 발명은 반전증폭기를 이용한 스위치드 커패시터(Switched-Capacitor) 회로 (이하, "SC 회로")에 관한 것이다. 보다 구체적으로는 반전증폭기를 이용한 SC 회로를 구현하되 입력과 출력 사이의 옵셋(Offset) 전압의 효과를 제거하여 다양한 SC 회로를 구현하는 것에 관한 것이다.The present invention relates to a switched capacitor circuit (hereinafter, "SC circuit") using an inverting amplifier. More specifically, the present invention relates to implementing various SC circuits by implementing an SC circuit using an inverting amplifier, but removing an effect of an offset voltage between an input and an output.
종래기술로서, 도1의 (a), (b)와 같은 SC 회로는 OTA(Operation Transconductance Amplifier)와 스위치 및 커패시터를 이용하여 비교적 오차가 적은 아날로그 회로(증폭기, 덧셈기, 적분기 등)를 구현하는 회로 설계 방법으로, 이산시간 아날로그 필터, AD/DA 변환기 등에 널리 사용되고 있는 회로요소이다.As a prior art, SC circuits such as (a) and (b) of FIG. 1 use an OTA (Operation Transconductance Amplifier), a switch and a capacitor to implement a relatively error-free analog circuit (amplifier, adder, integrator, etc.). As a design method, it is a circuit element widely used in discrete time analog filters, AD / DA converters, and the like.
기존의 SC 회로는 피드백 루프를 구성하기 위한 증폭기로서 OTA를 사용하고 있으나 OTA는 전력소모 및 실리콘 면적이 크다는 단점이 있다.Conventional SC circuits use OTA as an amplifier to form a feedback loop, but OTA has disadvantages such as high power consumption and silicon area.
본 발명은 상기한 바와 같은 기존의 SC 회로의 단점을 극복하고자 안출된 것으로서, 본 발명의 목적은 OTA보다 간단하고 전력소모가 적은 반전증폭기를 이용하여 SC 회로를 구현하되, 반전증폭기의 입력과 출력 사이에 존재하는 옵셋(offset) 전압을 해결하여 반전증폭기를 이용한 SC 회로를 제공하는 것이다.The present invention has been made to overcome the disadvantages of the conventional SC circuit as described above, the object of the present invention is to implement the SC circuit using an inverting amplifier simpler than the OTA and less power consumption, input and output of the inverting amplifier It is to provide an SC circuit using an inverting amplifier by solving the offset voltage existing between.
도1은 OTA를 이용한 SC 회로의 예시도1 is an illustration of an SC circuit using OTA
도2a는 본 발명에 따른 SC 반전증폭기Figure 2a is an SC inverting amplifier according to the present invention
도2b는 본 발명에 따른 SC 비반전증폭기Figure 2b is a SC non-inverting amplifier according to the present invention
도3는 본 발명에 따른 SC 가/감산기3 is an SC adder / subtractor according to the present invention.
도4는 본 발명에 따른 SC 적분기4 is an SC integrator according to the present invention.
도5는 본 발명에 따른 SC 로시 적분기Figure 5 is an SC Ross integrator according to the present invention
도6은 본 발명에 따른 SC 아날로그 이산시간 지연기Figure 6 is a SC analog discrete time delay according to the present invention
도7은 본 발명에 따른 SC 바이쿼드 필터Figure 7 SC biquad filter in accordance with the present invention
발명의 구성Composition of the Invention
반전증폭기는 공지의 회로구성으로서, 반전증폭기는 옵셋(off set) 전압을 가지고 있기 때문에, 반전증폭기의 입력과 출력간의 옵셋을 제거하기 위해 본 발명에서와 같은 회로구성을 취하였다.The inverting amplifier is a known circuit configuration, and since the inverting amplifier has an offset voltage, the circuit configuration as in the present invention is taken to eliminate the offset between the input and the output of the inverting amplifier.
도2a는 반전증폭기를 이용한 SC 반전증폭기 회로로서, 반전증폭기의 입력단에 제1단자가 연결되고 제2단자로는 입력전압이 인가되는 제1커패시터(C1); 반전증폭기의 출력단에 제1단자가 연결되고 제2단자로부터 출력전압이 출력되는 제2커패시터(C2); 반전증폭기의 입력단과 출력단 사이에 연결된 피드백 커패시터(Cf); 상기 제1커패시터의 제2단자와 그라운드 사이를 스위칭하고, 상기 제2커패시터의 제2단자와 그라운드 사이를 스위칭하고, 피드백 커패시터와 병렬 연결되어 반전증폭기의 입출력단을 연결시키도록 스위칭하는 제1상 스위치(φ1); 상기 제1커패시터의 제2단자에 인가되는 입력전압을 스위칭하는 제2상 스위치(φ2)로 구성된다.FIG. 2A illustrates an SC inverting amplifier circuit using an inverting amplifier, in which a first capacitor C 1 is connected to an input terminal of an inverting amplifier and an input voltage is applied to a second terminal; A second capacitor C 2 having a first terminal connected to an output terminal of the inverting amplifier and outputting an output voltage from the second terminal; A feedback capacitor C f connected between the input terminal and the output terminal of the inverting amplifier; A first phase for switching between the second terminal and the ground of the first capacitor, for switching between the second terminal and the ground of the second capacitor, and for switching in parallel with a feedback capacitor to connect the input and output terminals of the inverting amplifier. Switch φ 1 ; And a second phase switch φ 2 for switching an input voltage applied to the second terminal of the first capacitor.
도2b는 반전증폭기를 이용한 SC 비반전증폭기 회로로서, 반전증폭기의 입력단에 제1단자가 연결되고 제2단자로는 입력전압이 인가되는 제1커패시터(C1); 반전증폭기의 출력단에 제1단자가 연결되고 제2단자로부터 출력전압이 출력되는 제2커패시터(C2); 반전증폭기의 입력단과 출력단 사이에 연결된 피드백 커패시터(Cf); 상기 제1커패시터의 제2단자와 그라운드 사이를 스위칭하고, 상기 제2커패시터의 제2단자와 그라운드 사이를 스위칭하는 제1상 스위치(φ1); 상기 제1커패시터의 제2단자에 인가되는 입력전압을 스위칭하고, 피드백 커패시터와 병렬 연결되어 반전증폭기의 입출력단을 연결시키도록 스위칭하는 제2상 스위치(φ2)로 구성된다.2B is an SC non-inverting amplifier circuit using an inverting amplifier, in which a first capacitor C 1 is connected to an input terminal of an inverting amplifier and an input voltage is applied to a second terminal; A second capacitor C 2 having a first terminal connected to an output terminal of the inverting amplifier and outputting an output voltage from the second terminal; A feedback capacitor C f connected between the input terminal and the output terminal of the inverting amplifier; A first phase switch (φ 1 ) for switching between the second terminal of the first capacitor and the ground and switching between the second terminal of the second capacitor and the ground; It consists of a second phase switch φ 2 for switching the input voltage applied to the second terminal of the first capacitor, and is connected in parallel with the feedback capacitor to switch to connect the input and output terminals of the inverting amplifier.
발명의 작용Invention
발명에 사용되는 반전증폭기를 AB급 또는 B, C급으로 동작시킴으로써 기존의 OTA를 사용한 SC 회로에 비하여 획기적으로 전력소모를 줄일 수 있다.By operating the inverting amplifier used in the class AB or B, C class can significantly reduce the power consumption compared to the SC circuit using the conventional OTA.
반전증폭기는 옵셋 전압을 가지고 있으며, 옵셋 전압은 증폭기의 입력과 출력이 같도록 입력단자와 출력단자를 단락시킬 경우 입, 출력단자의 전압은 옵셋 전압값이 되므로 도2a에서 Φ1일 때 C1, C2에는 각각 옵셋 전압에 상응하는 전하가 충전된다. Φ2일 때 C1에 입력전압이 가하여지면 입력전압에 상응하는 전하의 변화가 C1에 발생하며, 이때 Cf에도 같은 양의 전하변화가 발생한다. 또한, 이때 출력단자(Vo)에서는 옵셋 전압이 제거된 출력전압이 나타나게 된다. 이와같은 원리로 반전증폭기만을 이용하여 SC 반전증폭기를 구현할수 있다.Inverting amplifier has an offset voltage, offset voltage when short-circuit the input terminal and the output terminal to be equal to the input and output of the amplifier input, the voltage at the output terminal when Φ 1 at Figure 2a since the offset voltage value C 1 , C 2 is charged with a charge corresponding to the offset voltage, respectively. When the input voltage is applied to C 1 at Φ 2 , the change of charge corresponding to the input voltage occurs at C 1 , and at the same time, the same amount of charge change occurs at C f . In this case, the output terminal Vo shows an output voltage from which the offset voltage is removed. Based on this principle, an SC inverting amplifier can be implemented using only an inverting amplifier.
도2a는 SC 반전증폭기이며, 도2b는 SC 비반전증폭기를 구현한 것이다. 두 경우 모두 이때 전압 증폭율은 C1/Cf로 주어진다.Figure 2a is an SC inverting amplifier, Figure 2b is an implementation of the SC non-inverting amplifier. In both cases the voltage amplification factor is given by C 1 / C f .
실시예Example
상기의 SC 반전증폭기 회로와 SC 비반전증폭기 회로를 이용하여 도3에 도시된 것처럼 SC 가/감산기를 구성할 수 있으며, SC 반전증폭기 회로를 이용한 가/감산기는 반전증폭기의 입력단에 제1단자가 연결되고 제2단자로는 제2입력전압이 인가되는 다른 제1커패시터(C1')를 구비하고, 상기 제1커패시터(C1')의 제2단자와 그라운드 사이를 스위칭하고, 제1커패시터(C1')의 제2단자에 인가되는 제2입력전압을 스위칭하는 제1상 스위치(φ1)를 추가로 구비함으로써 SC가산기를 구성하거나 제1커패시터(C1')에 연결된 스위치의 위상을 서로 바꾸어 제1커패시터(C1')에 연결된 스위치의 위상과 반대가 되게 함으로써 SC 감산기를 구현함을 특징으로 한다.Using the SC inverting amplifier circuit and the SC non-inverting amplifier circuit, the SC adder / subtractor can be configured as shown in FIG. 3, and the adder / subtracter using the SC inverting amplifier circuit has a first terminal at the input terminal of the inverting amplifier. The other terminal having another first capacitor C 1 ′ connected thereto and to which a second input voltage is applied, and switching between the second terminal of the first capacitor C 1 ′ and the ground, the first capacitor Further comprising a first phase switch φ 1 for switching the second input voltage applied to the second terminal of (C 1 ′) to configure the SC adder or phase of the switch connected to the first capacitor C 1 ′. It is characterized by implementing the SC subtractor by changing the opposite to the phase of the switch connected to the first capacitor (C 1 ').
상기의 반전 SC증폭기 회로를 응용하여 도4에 도시된 바와 같이 SC 반전 적분기를 구성할 수 있는데, 적분기는 상기 피드백 커패시터(Cf)와 반전 증폭기의 입력단 및 출력단 사이에 제2상 스위치(φ2)를 구비하여 제1상 스위치가 켜지는 동안 제2상 스위치를 열어 상기 피드백 커패시터(Cf)에 충전되어 있는 전하를 유지시켜줌으로써, 입력전압을 적분한 출력전압을 얻을 수 있는 회로이다.The inverted SC amplifier circuit may be applied to form an SC inverted integrator as shown in FIG. 4, wherein the integrator has a second phase switch φ 2 between the feedback capacitor C f and an input terminal and an output terminal of the inverting amplifier. And a second phase switch is opened while the first phase switch is turned on to maintain the charge charged in the feedback capacitor C f , thereby obtaining an output voltage integrated with the input voltage.
또한 상기의 비반전 SC증폭기 회로를 응용하여 SC적분기를 구성할 수 있으며, 이러한 적분기는 상기 피드백 커패시터(Cf)와 반전 증폭기의 입력단 및 출력단 사이에 제2상 스위치(φ2)를 구비함으로써, 입력전압을 적분한 출력전압을 얻는 SC비반전 적분기를 구현할 수 있다.In addition, the SC integrator may be configured by applying the non-inverting SC amplifier circuit, and the integrator includes a second phase switch φ 2 between the feedback capacitor C f and an input terminal and an output terminal of the inverting amplifier. An SC non-inverting integrator can be implemented that obtains the output voltage integrated with the input voltage.
도4와 같이 φ1클럭 구간 동안 C1커패시터를 피드백 루프에서 분리하고 φ2동안에만 연결함으로써 SC적분기를 구현할 수 있다. 이 회로에서, φ1, φ2가 모두 개방되는 경우 반전증폭기 출력단자 전압에 급격한 변화가 있게 되어 안정성(Stability)문제를 일으킬 수 있으며, 이러한 경우에는 C1보다 매우 작은 커패시터 Cf'를 반전증폭기의 입,출력단자 사이에 연결하여 줌으로써 안정성을 확보할 수 있다.As shown in FIG. 4, the SC integrator can be implemented by disconnecting the C 1 capacitor from the feedback loop and connecting only during φ 2 during the φ 1 clock period. In this circuit, when both φ 1 and φ 2 are open, there is a sudden change in the output voltage of the inverting amplifier, which may cause stability problems. In this case, a capacitor C f 'which is much smaller than C 1 may be replaced by an inverting amplifier. Stability can be secured by connecting between input and output terminals.
도5와 같이 상기 SC적분기에 로시(lossy) 커패시터(CL)을 추가함으로써 Cf에 적분되는 전하의 일부를 상기 로시 커패시터(CL)과 병렬연결된 제1상 스위치를 통하여 방전시켜, SC 로시 적분기를 구현할 수 있다.By adding a lossy capacitor (C L ) to the SC integrator as shown in FIG. 5, a part of the charge integrated to C f is discharged through a first phase switch connected in parallel with the loss capacitor (C L ), and the SC Ross Integrator can be implemented.
도6과 같이 옵셋제거된 SC 단일이득 증폭기를 다수 연결시킴으로써 아날로그 SC 이산시간 지연기(discrete-analog delay line)를 구현할 수 있다.As shown in FIG. 6, analog SC discrete-analog delay lines can be implemented by connecting multiple offset SC single gain amplifiers.
변형가능한 실시예Modifiable Embodiment
본 발명에 따른 회로의 조합을 이용한 변형가능 실시예는 다음과 같다.Modifiable embodiments using a combination of circuits according to the invention are as follows.
도7은 능동필터의 일종인 2차 바이쿼드(biquad) 필터를 구현한 예를 보여주고 있다.7 shows an example of implementing a second-order biquad filter, which is a kind of active filter.
VOLP까지의 전달함수는,The transfer function up to V OLP is
으로 주어져 필터의 공진주파수는 C8에 의하여, Q값(Quality factor)은 C2에 의하여 조절될 수 있다.The resonance frequency of the filter can be adjusted by C 8 and the Q factor (Quality factor) by C 2 .
본 발명에 따른 반전증폭기를 사용한 SC 회로는 전력 소모와 실리콘 면적을 획기적으로 감소시켜, 초저전력, 초소형 SC 회로, SC필터, ADC 및 DAC 등을 구현하는데 사용될 수 있는 효과를 거둘 수 있다.The SC circuit using the inverting amplifier according to the present invention can significantly reduce power consumption and silicon area, thereby achieving an effect that can be used to implement ultra low power, ultra small SC circuit, SC filter, ADC and DAC.
Claims (7)
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Citations (5)
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|---|---|---|---|---|
| US4806874A (en) * | 1988-04-01 | 1989-02-21 | National Semiconductor Corporation | Switched capacitor amplifier circuit |
| JPH1051270A (en) * | 1996-07-31 | 1998-02-20 | Yozan:Kk | Switched capacitor circuit |
| US5796300A (en) * | 1996-02-14 | 1998-08-18 | Pacesetter, Inc. | Switched-capacitor amplifier offset voltage compensation circuit |
| US5977803A (en) * | 1997-02-24 | 1999-11-02 | Mitsubishi Denki Kabushiki Kaisha | Capacitance type sensor interface circuit |
| JP2000022500A (en) * | 1998-07-06 | 2000-01-21 | Matsushita Electric Ind Co Ltd | Switched capacitor circuit |
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| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US4806874A (en) * | 1988-04-01 | 1989-02-21 | National Semiconductor Corporation | Switched capacitor amplifier circuit |
| US5796300A (en) * | 1996-02-14 | 1998-08-18 | Pacesetter, Inc. | Switched-capacitor amplifier offset voltage compensation circuit |
| JPH1051270A (en) * | 1996-07-31 | 1998-02-20 | Yozan:Kk | Switched capacitor circuit |
| US5977803A (en) * | 1997-02-24 | 1999-11-02 | Mitsubishi Denki Kabushiki Kaisha | Capacitance type sensor interface circuit |
| JP2000022500A (en) * | 1998-07-06 | 2000-01-21 | Matsushita Electric Ind Co Ltd | Switched capacitor circuit |
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