KR100408655B1 - Time-Divisional Exchanging Device for Exchanger and Controlling Method Therefor - Google Patents

Abstract

The present invention relates to a time division exchange apparatus of a switch and a control method thereof, which can improve the debugging and reliability of a time switching board by testing the presence or absence of an abnormality of a time switching board having a 5 × 5 matrix structure. A test main processor unit for storing test programs and generating respective control data for controlling processing for a test, a time division exchange unit having a control memory and a speech memory to perform a time division exchange; An EPLD unit which is installed in the time division exchange unit and interfaces with a test main processor unit and controls the time division exchange unit to perform a test, a local link board which outputs a clock signal to the time division exchange unit, and user input data. By which the processing to be tested is selected. It consists board terminal portion.

Description

Time-Divisional Exchanging Device for Exchanger and Controlling Method Therefor}

The present invention relates to an exchanger of a mobile communication system, and more particularly, a time division of an exchanger for improving the debugging and reliability of the time switching board by testing whether or not there is an error of a time switching board having a 5 × 5 matrix structure. An exchange apparatus and a control method thereof.

In general, a mobile communication system is a communication system for a mobile device such as a person, a car, a ship, a train, an aircraft, and includes a mobile phone (mobile phone, a vehicle phone), a port phone, an aircraft phone, a mobile public phone (train, Cruise ships, express buses, etc.), radio calling, radiotelephony, satellite mobile communication, amateur radio, fishing service.

These mobile communications include the AMPS (Advanced Mobile Phone Service) system using analog methods, CDMA and TDMA (Time Division Multiple Access) systems using digital methods, and Frequency Division Multiple Access (FDMA) systems. Systems, and systems such as PCS (Personal Communication System) and IMT-2000 are used.

1 is a block diagram of a general mobile communication system.

As shown in FIG. 1, a state management unit 11 managing a state of an exchange 10 and a call processor 12 performing a call processing at the exchange 10 constitute a subscriber's call path. And a switch 10 for connecting to another communication network, a state manager 21 for managing a state of the control station 20, and a call processor 22 for performing call processing at the control station 20. And a control station 20 which controls a radio link and a wire link, and performs a handoff function for maintaining the continuity of the call even when the subscriber is on the move, and the terminal 40 using a protocol in a radio section. It consists of a base station 30 that performs communication, and a terminal 40 that is a terminal device for allowing a subscriber to communicate through a mobile communication network. Thus, the call of the terminal 40 is realized through the exchange 10, the control station 20, and the base station 30.

Here, a time switching board (not shown) is built in the exchanger 10.

However, the time switch board developed for time-division exchange of PCM speech path data has more than twice the capacity of the conventionally developed board, so that the existing test program can increase the capacity. There was a problem that it could not be tested properly, and that the debugging of the newly developed board and the reliability of the board could not be proved.

Accordingly, an object of the present invention is to solve the problems according to the prior art described above, and an object of the present invention is to test debugging and reliability of a time switching board by testing whether there is an abnormality of a time switching board having a 5 × 5 matrix structure. The present invention provides a time division exchange device for a switch and a control method thereof.

Features of the time division exchange device of the exchanger according to the present invention for achieving the above object,

In an exchanger of a mobile communication system having a control memory and a speech memory,

A test main processor unit for storing each control data for storing a test program and controlling processing for a test;

A time division exchange unit having a control memory and a speech memory to perform time division exchange;

An EPLD unit which is installed in the time division exchange unit and interfaces with a test main processor unit and controls the time division exchange unit to perform a test;

A local link board for outputting a clock signal to the time division switch;

It consists of a terminal terminal in which the processing to be tested by the user's input data is selected.

In addition, the characteristics of the control method of the time division exchange apparatus of the exchanger according to the present invention for achieving the above object,

In the control method of an exchange of a mobile communication system having a control memory and a speech memory,

Initializing the timer of the main processor to 0 and initializing the database;

Displaying a head of the main processor and determining, based on user input data, whether an individual test program or an automatic test program is selected among the test programs to be tested;

If the automatic test is selected as a result of the determination, performing the automatic test operation; and if the individual test operation is performed, performing the individual test operation;

If the two test operations are not selected, the step of terminating the test operation test is performed.

1 is a block diagram showing a general general mobile communication system,

2 is a block diagram showing a time division exchange apparatus of the exchanger according to the present invention;

3 is a flowchart illustrating a control method of a main processor of a time division exchange apparatus of an exchange according to the present invention;

4 is a flow chart illustrating an individual test routine of FIG. 3;

5 is a flowchart showing a TD-BUS interface test routine of FIG. 4;

6 is a flowchart showing a control memory write / lead test routine of FIG. 4;

7 is a flowchart illustrating the time division exchange test routine of FIG. 4.

<Explanation of symbols for the main parts of the drawings>

100: test main processor

200: time division exchange

300: Local Link Board

400: terminal terminal

Hereinafter, with reference to the accompanying drawings, preferred embodiments of a time division exchange apparatus and a control method of the exchange according to the present invention will be described.

2 is a block diagram showing a time division exchange apparatus of the exchanger according to the present invention.

As shown in FIG. 2, a test main processor unit 100 for storing a test program and generating respective control data for controlling processing for a test, a control memory 110, and A time division exchange unit 200 having a speech memory 120 for performing time division exchange, and installed in the time division exchange unit 200, and interfacing with the test main processor unit 100 for a time. The EPLD unit 130 controls the division switching unit 200 to perform the test, the local link board 300 outputting a clock signal to the time division switching unit 200, and the user's input data. The processing consists of a terminal terminal 400 to be selected.

Looking at the operation of the time division exchange device of the exchange configured as described above are as follows.

First, the terminal terminal 400 selects the processing to be tested by the user's input data.

The control data of the test main processor 100 is transmitted to the 5 × 5 time division switching unit 200 according to the selected processing, and the time division switching unit 200 clocks the data according to the implemented 304pin EPLD logic. Receive according to.

Here, the EPLD unit 130 receiving the data generates the PCM pattern data to be tested by its implementation logic, and the memory related to the time division exchange in the magnetic board, that is, the control memory 110 and the speech memory 120. Send these data so that a time division exchange occurs.

In addition, the time-division exchanged data is again received by the EPLD unit 130 via a path.

The EPLD unit 130 receiving the exchanged PCM pattern data transmits the data to the test main processor by its implementation logic.

The test main processor 100 compares the first transmission data and the received data by each bit unit to determine whether the test is properly performed.

Therefore, the time division exchange apparatus of the exchange according to the present invention does not need a separate clock generator as in the conventional space division exchange board, and only a link board mounted next to the system is required. This test makes it easy to determine not only the paths of the time division exchange boards, but also the control memory and speech memory involved in the time division exchange, and whether the interface between the EPLD chip and the main processor is properly performed. Do it.

These tests also make it easy to find debugging pointers to make the board normal in the event of a test failure.

The operation of the time division exchange apparatus of the exchange configured as described above will be described in detail with reference to FIG. 3.

3 is a flowchart illustrating a control method of a main processor of a time division exchange apparatus of an exchange according to the present invention.

As shown in FIG. 3, first, the timer of the main processor is initialized to 0, and the database is initialized (S101) (S103).

Then, the head of the main processor is displayed (S105) (S107), and it is determined whether an individual test program or an automatic test program is selected among the test programs to be tested by the user input data (S109).

If the automatic test is selected as the determination result, the automatic test operation is performed (S111). If the individual test operation is performed, the individual test operation is performed (S113).

If the two test operations are not selected, the test operation test is terminated (S115).

On the other hand, as shown in Figure 4, when the individual test operation is selected, the TSMA-A board is set and a message of the test type selection is displayed (S201) (S203).

Then, it is determined whether the test program to be tested is the TD-BUS interface test, the control memory write / read test, and the time division exchange test routine (S205).

As a result of the determination, if the test program to be tested selects the TD-BUS interface test, the TD-BUS interface test routine is tested (S207).

If the test program to be tested selects the control memory write / read test, the control memory write / lead test routine is tested (S209).

In addition, when the test program to be tested selects the time division exchange test, the time division exchange test routine is tested (S211).

Meanwhile, as shown in FIG. 5, when the TD-BUS interface test is selected, the ok and nok counters are initialized to 0, and then a TD-BUS selection message is displayed (S301) (S303).

Then, according to the selection of the TD-BUS selection messages (('A', 'a'), ('B', 'b'), (default)), that is, if the user selects 'A', 'a' test port = A_PORT, if the user selects 'B', 'b', test port = B_PORT; if the user selects 'default', test port = A_PORT (S305) (S307) (S309) ( S311).

Here, a message in which the TD-BUS is a port and the test-side is A / B set (port, side, data, test channel) is displayed on the Tsma-a board (S313).

The data is sequentially written to the registers from '00' to '256', the data is read sequentially, and it is determined whether the data is data read from the register (S315) (S317) (S319).

If the data is not read from the register as a result of the determination, the bell rings and the error counter is incremented by one (S321).

Then, the writer data '00' to 'FF' and the read data '00' to 'FF' of the register are displayed, and it is determined whether the test is to be continued (S323) (S325).

If the test does not continue the determination result, the test is terminated (S327).

On the other hand, it is the data read from the result of the determination in S319, and if the test is continued, it is determined whether the i value is greater than or less than 256 by increasing the 'ok counter' by 1 (S329) (S331) (S333). .

If the i value is greater than 256, the ok counter or the error counter is read (S335) (S337).

When the error counter is greater than '0', the result is NOK, and the error counter is smaller than '0' and the result is ok to end the test (S339) (S341) (S343).

On the other hand, when the control memory writer / lead test is selected as shown in FIG. 6, after initializing the ok counter and the error counter to 0, one control memory is selected from a plurality of control memories (0 to 4). (S401) (S403).

A number is input to the selected control memory and a Tsma-a board (A-port, side, control memory, data) is set (S405) (S407).

Then, data is written to the control memory and data is read from the control memory (S409).

At this time, it is determined whether the values of the write data and the read data of the control memory match.

As a result of the determination, if the values of the write data and the read data of the control memory do not coincide, the bell rings and the error counter is incremented by one (S413).

Then, as a result of reading from the control memory, that is, time slots '00' to '31', write data '00' to 'FF', and read data '00' to 'FF' are displayed, and the test is to be continued. It determines (S415) (S417).

If it is determined that the test is not to be continued, the test is terminated (S419).

On the other hand, when the value of the write data and the read data of the control memory coincide or continue the test, it is determined whether the i value is larger or smaller than 2048 by increasing the 'ok counter' by 1 (S421) (S423) ( S425).

If the i value is greater than 2048, the ok counter or the error counter is read, and it is determined whether the error counter is greater than or less than zero (S427) (S429).

If the error counter is greater than '0', the result is NOK, and the error counter is smaller than '0' and the result is ok to end the test (S431) (S433) (S435).

On the other hand, as shown in FIG. 7, when the time division exchange test is selected, after initializing the ok counter and the error counter to 0, the message "Tsma-a sp-path test" is displayed (S501) (S503). ).

Then, one input / output data is selected from the plurality of input / output data 0 to 4 (S505).

In addition, a speech memory related to input / output is selected, and a Tsma-a board (port, control memory, speech memory, input data, output data) is set (S507) (S509).

Then, it is determined whether the control memory is larger than 4 or smaller (S511).

If the control memory is less than 4, the control memory is incremented by one (S513).

In addition, it is determined whether the speech memory is larger or smaller than 4 (S515).

As a result of the determination, if the speech memory is less than 4, the speech memory counter is incremented by 1 and it is determined whether the pattern data is larger or smaller than FF (S517) (S519).

If the pattern data is smaller than FF as a result of the determination, data is read / read in the control memory, and the data input through the path is read after time-division exchange, in step S521.

Then, it is determined whether the lighter pattern data and the read pattern data are the same (S523).

If the lighter pattern data and the lead pattern data are not the same as the result of the determination, the test result is NOK, and the ok counter and the error counter are read by increasing the 'ok counter' by one (S525) (S527) (S529) (S531).

Then, it is determined whether the error counter is larger or smaller than zero (S533).

If the error counter is greater than '0' as a result of the determination, the execution result is NOK, and the error counter is smaller than '0' and the execution result is ok (S535) (S537) and S539.

As described above, the present invention has the effect of being able to test only a terminal terminal, a time division switching board, and a processor without having a system completely.

In addition, by applying the time-division exchange board verified through this test to the system, it is effective to improve the reliability and stability of the system.

Claims (6)

In an exchanger of a mobile communication system having a control memory and a speech memory, A test main processor unit for storing each control data for storing a test program and controlling processing for a test; A time division exchange unit having a control memory and a speech memory to perform time division exchange; An EPLD unit which is installed in the time division exchange unit and interfaces with a test main processor unit and controls the time division exchange unit to perform a test; A local link board for outputting a clock signal to the time division switch; A time division exchange apparatus of an exchange comprising a terminal terminal for which processing to be tested is selected by user input data. In the control method of an exchange of a mobile communication system having a control memory and a speech memory, Initializing the timer of the main processor to 0 and initializing the database; Displaying a head of the main processor and determining, based on user input data, whether an individual test program or an automatic test program is selected among the test programs to be tested; If the automatic test is selected as a result of the determination, performing the automatic test operation; and if the individual test operation is performed, performing the individual test operation; And if the two test operations are not selected, terminating a test operation test. The method of claim 2, If you selected individual test actions, Setting a TSMA-A board and displaying a message of a test type selection; Determining whether the test program to be tested is a TD-BUS interface test, a control memory write / lead test and a time division exchange test routine; Testing the TD-BUS interface test routine when the test program to be tested selects the TD-BUS interface test; Testing the control memory write / lead test routine when the test program to be tested selects the control memory write / lead test; And if the test program to be tested selects the time division exchange test, performing a time division exchange test routine. The method of claim 3, If you choose TD-BUS interface test, initializing both the ok counter and the nok counter to 0 and displaying a TD-BUS selection message; According to the selection of the TD-BUS selection message (('A', 'a'), ('B', 'b'), (default)), that is, if the user selects 'A', 'a' Testing A_PORT, testing port = B_PORT if the user selects 'B', 'b', and testing port = A_PORT if the user selects 'default'; Displaying a message on the Tsma-a board in which TD-BUS is port and Test-side is A / B set (port, side, data, test channel); Writing data to registers sequentially from '00' to '256', reading data sequentially, and determining whether the data is data read from a register; If it is not the data read from the result of the determination, ringing and incrementing the error counter by one; Displaying write data ('00' to 'FF') and read data ('00' to 'FF') of the register and determining whether to continue the test; Terminating the test if the test is not continuously performed; Determining whether i is greater than or less than 256 by increasing the 'ok counter' by 1 when the test result is data read from the register and the test is continued; If the i value is greater than 256, reading the ok counter or the error counter; And if the error counter is greater than '0', performing the NOK, and if the error counter is smaller than '0', ok the execution result to end the test. Control method. The method of claim 3, When Control Memory Writer / Lead Test is selected, initializing the ok counter and the error counter to 0 and selecting one control memory from the plurality of control memories (0 to 4); Inputting a number into the selected control memory and setting a Tsma-a board (A-port, side, control memory, data); Writing data to and from the control memory; Determining whether a value of write data and read data of the control memory match; If the value of the write data and the read data of the control memory do not match, determining that the ringing and the error counter are incremented by one; As a result of reading from the control memory, that is, time slots '00' to '31', write data '00' to 'FF', and read data '00' to 'FF' are displayed, and it is determined whether to continue the test. Steps; Terminating the test if the test is not continuously performed; Determining whether the i value is greater than or less than 2048 by increasing the 'ok counter' by 1 when the value of the write data and the read data of the control memory coincide with each other or if the test is continuously performed; If the i value is greater than 2048, reading the ok counter or the error counter, and determining whether the error counter is greater than or less than zero; And if the error counter is greater than '0', performing the NOK, and if the error counter is smaller than '0', ok the execution result to end the test. Control method. The method of claim 3, If you choose the time division exchange test, initializing the ok counter and the error counter to 0 and displaying a "Tsma-a sp-path test" message; Selecting one input / output data from the plurality of input / output data (0 to 4); Selecting a speech memory related to input / output and setting a Tsma-a board (port, control memory, speech memory, input data, output data); Determining whether the control memory is greater than or less than four; If the control memory is less than four, increasing the control memory by one; Determining whether the speech memory is greater than or less than four; If the speech memory is less than 4, the speech memory counter is incremented by one, and the pattern data is determined to be larger or smaller than FF; If the pattern data is smaller than FF as a result of the determination, reading and reading data from the control memory by time-changing the data and reading data entered through a path; Determining whether the lighter pattern data and the read pattern data are the same; If the lighter pattern data and the lead pattern data are not the same, determining the test result as NOK, and increasing the 'ok counter' by 1 to read the ok counter and the error counter; Determining whether the error counter is greater than or less than zero; If the error counter is greater than '0', the execution result is NOK, and the error counter is smaller than '0', and the operation is completed. Control method of the device.