KR100394036B1 - Power Line Communication Transceiver Utilizing Spectrum Spreading Scheme - Google Patents

Abstract

In transmitting and receiving data through a power line, a data transceiver capable of retransmitting data without degrading communication efficiency and detecting high data reliability can be performed at a high communication reliability.

The power line communication transceiver is electrically connected to an application device having a predetermined application circuit to transmit transmission data from the application device to another application device via the power line, and supply data received from the other application device to the application device. The transceiver includes a transmitter, a receiver and a coupling circuit. The transmitter modulates the transmission data to supply the modulated signal to the power line and outputs an enable signal that is only activated for a predetermined mute period. The receiver detects and demodulates the signal level on the power line to restore the received data and supplies the received data to the application. In the present invention, the receiver is only activated when the enable signal is activated. The coupling circuit couples the transmitter and receiver to a power line.

Description

Power Line Communication Transceiver Utilizing Spectrum Spreading Scheme

The present invention relates to a communication system, and more particularly to a power line communication system.

In general, a data communication system via a power line transmits and receives data using a zero cross point on a power line. Such a communication system is described, for example, in a number of documents, including the patent publication of Patent No. 0261512 (name of the invention: a remote control apparatus using a two-way power line communication and a control method thereof). However, when communicating using the zero cross point as described above, since only one data bit is normally transmitted or received at each zero cross point, there is a problem that the data communication speed is low. In addition, when a plurality of transceivers simultaneously transmit data and data collision occurs on a line, communication efficiency is further reduced because each of the corresponding transceivers has to retransmit data again.

SUMMARY OF THE INVENTION The present invention has been made to solve this problem, and the present invention is capable of retransmitting data without reducing communication efficiency when detecting data collision in transmitting and receiving data through a power line, and can perform high-speed data communication with high communication reliability. The technical problem is to provide a data transceiver.

1 is a block diagram of a preferred embodiment of a power line communication transceiver in accordance with the present invention.

FIG. 2 is a detailed block diagram of an embodiment of the spread spectrum transmitter shown in FIG.

3A to 3M are waveform diagrams showing an example of a signal input or output by each functional block of the spread spectrum transmitter of FIG.

4 is a detailed block diagram of an embodiment of a spread spectrum receiver shown in FIG. 1;

5 is a detailed block diagram of another embodiment of the spread spectrum receiver shown in FIG.

6A to 6F are waveform diagrams showing an example of a signal input or output by each functional block of the spread spectrum receiver of FIG.

7 is a detailed block diagram of one embodiment of the retransmission control unit shown in FIG.

8 is a detailed block diagram of another embodiment of the retransmission control unit shown in FIG. 1;

9 is a detailed block diagram of another embodiment of the retransmission control unit shown in FIG. 1;

<Description of the symbols for the main parts of the drawings>

1: power line 2: application circuit

10: power line communication transceiver 20: coupling circuit

30: transmission buffer 40: spread spectrum transmitter

50: spread spectrum receiver 60: retransmission controller

In order to achieve the above technical problem, a power line communication transceiver of the present invention includes an application device having a predetermined application device circuit, wherein transmission data from the application device circuit is transmitted to another application device via a power line, and from another application device. Receive the received data and provide it to the application circuit. The transceiver includes a transmitter, a receiver and a coupling circuit. The transmitter modulates transmission data to output a modulated signal through a power line, and outputs an enable signal that is activated while the modulated signal is output through the power line. The receiver detects and demodulates the signal level on the power line to restore the received data and supplies the received data to the application. In the present invention, the receiver is only activated when the enable signal is activated. The coupling circuit couples the transmitter and receiver to a power line.

In a preferred embodiment, the transmitter comprises a parallel / serial converter, a modulation circuit, a formatting unit and a digital / analog converter. The parallel / serial converter receives the transmission data in a parallel format and converts it into serial transmission data. The modulation circuit displays the logic " 1 " of the odd bit of the serial transmission data as a 1T spread spectrum bit stream and the logic " 0 " of the odd bit as a 2T spread spectrum bit stream. The logic "1" of the even-numbered bits is represented by a mute section of 1T, and the logic "0" of the even-numbered bits is represented by a mute section of 2T, thereby generating a modulated signal. The formatting unit configures a frame in a predetermined format with respect to the modulated signal and outputs a framed signal. The digital / analog converter converts the framed signal into a digital / analog converter.

In a preferred embodiment, the receiver comprises an analog / digital converter, a correlation means, a logic discriminator, a select switch and a combiner. An analog / digital converter detects the signal level on the power line and converts it to digital received data. The correlation means obtains a correlation value between the digital received data and a predetermined spread spectrum pattern and outputs a correlation determination signal having a logic " 1 " only when the correlation value is higher than a predetermined determination value. The logic discriminating unit determines the logic level of the received data as one of "1", "0" and "mute" based on the temporal length of the valid data bits in the correlation determination signal. The selection switch separates the in-phase signal and the quadrature signal from the logic level data determined by the logic discriminating unit. The combiner interleaves the in-phase signal and the quadrature signal to output received serial data.

Hereinafter, with reference to the accompanying drawings will be described in detail a preferred embodiment of the present invention.

1 shows a preferred embodiment of a power line communication transceiver according to the present invention. The power line communication transceiver 10 (hereinafter, abbreviated as " transceiver ") includes a coupling circuit 20, a transmission buffer 30, a spread spectrum transmitter 40, a spread spectrum receiver 50, and a retransmission controller 60. Such a transceiver 10 may be employed in, for example, an application such as a computer, a television, a boiler, a lamp, and a refrigerator. The application includes a circuit 2 for performing a function of the device other than the transceiver 10. Include. The transceiver 10 receives the transmission data that the application device circuit 2 intends to transmit to another application device voluntarily or in response to a user's input, and transmits it to the transceiver of another application device via the power line 1. In addition, the transceiver 10 demodulates a signal received from a transceiver of another application device through the power line 1, and transmits the demodulated received data to the application device circuit 2.

In the transceiver 10, the combining circuit 20 couples the spread spectrum transmitter 40 and the spread spectrum receiver 50 to the power line 1 to spread the spread spectrum transmitter 40 and the spread spectrum receiver 50. Allow each to transmit and receive signals over power line 1. The transmission buffer 30 temporarily stores the transmission data from the application device circuit 2 until the transmission is completed, and the spread spectrum transmitter 40 modulates the data from the transmission buffer 30 by spreading the modulated signal. Is transmitted through the power line (1). The spread spectrum receiver 50 detects a signal on the power line 1 and demodulates it, and transmits the demodulated signal to the application device circuit 2. The retransmission control unit 60 spreads the bandwidth when a data collision occurs on the power line 1, that is, when a signal from another application device is received through the spread spectrum receiver 50 while the spread spectrum transmitter 40 transmits a signal. The data frame is retransmitted through the transmitter 40. On the other hand, a driver for amplifying the power of the transmission signal may be additionally provided between the spread spectrum transmitter 40 and the coupling circuit 20.

In the present invention, the spread spectrum transmitter 40 provides the enable signal to the spread spectrum receiver 50 so that the spread spectrum receiver 50 is selectively enabled in response to the enable signal. In the preferred embodiment, the enable signal is deactivated while the spread spectrum transmitter 40 transmits the signal through the power line 1 so that the spread spectrum receiver 50 does not operate, whereas the spread spectrum transmitter 40 Is activated while the signal does not transmit the signal, allowing the spectrum assurance receiver 50 to operate. In a particularly preferred embodiment, the enable signal may be activated during a mute period in which the transmission signal maintains a 0 volt or other constant voltage state while the spread spectrum transmitter 40 transmits the signal.

2 shows an embodiment of the spread spectrum transmitter 40 in more detail. The spread spectrum transmitter 40 includes a parallel / serial converter 100, an error correcting encoder 102, a sorter 104, an I data separator 110, a Q data separator 112, and a first band spreader. 114, the second spreader 116, the first mute generator 118, the second mute generator 120, the mixer 122, the preamble pattern generator 130, the formatter 132, And a digital / analog converter 134 and a mute pattern extractor 136.

The parallel / serial conversion section 100 converts the transmission data input from the application circuit 2 into serial data, for example, in an 8-bit parallel format. An example of parallel transmission data input to the parallel / serial converter 100 is shown in FIG. 3A, and the first 8 bits of the serial transmission data are shown in FIG. 3B.

The error correcting coder 102 performs error correcting on the serial transmission data from the parallel / serial converter 100 using a cyclic redundancy (CRC) code, and inserts parity bits to be used for error detection at the receiving end. In the waveform diagram of FIG. 3C or less, these parity bits will be omitted for convenience.

The sorter 104 classifies the error corrected coded data into bit units to generate in-phase (I) data and quadrature (Q) data. For example, every odd bit of the error corrected coded data is incorporated into I data, and every even bit is incorporated into Q data. I data and Q data sorted by the sorter 104 are shown in FIG. 3C.

The I data separator 110 separates "1" and "0" of the I data and outputs a first I signal and a second I signal. Here, the first I signal indicates the position of "1" in the I data, and the second I signal indicates the position of "0" in the I data. The waveforms of the first and second I signals are shown in FIG. 3D. Similarly, the Q data separating unit 112 separates "1" and "0" of the Q data, and outputs a first Q signal and a second Q signal. Here, the first Q signal indicates the position of "1" in the Q data, and the second Q signal indicates the position of "0" in the Q data. Waveforms of the first and second Q signals are shown in FIG. 3E.

The first spreader 114 forms a waveform of the first I signal and spreads and modulates the waveform. The second spreader 116 forms a waveform and modulates the spread of the second I signal. Output signals of the first and second spreaders 114 and 116 are shown in FIGS. 3F and 3G. 3F and 3G are shown for simplicity of explanation, the hatched portion of the logic " 1 " in these figures is a bit spread spectrum rather than one bit, unlike in FIGS. 3A-3E. Keep in mind. Meanwhile, the first mute generator 118 shapes the waveform of the first Q signal, and the second mute generator 120 shapes the waveform of the second Q signal. Output signals of the first and second mute generators 120 are shown in FIGS. 3H and 3I. The mixer 122 combines the output signals of the first and second band spreaders 114 and 116 and the output signals of the first and second mute generators 120 in units of clock periods (T) to obtain the signal of FIG. 3J. Outputs

As can be seen in FIGS. 3F to 3J, the bits that are logic "1" in the second I signal and the second Q signal during the waveform shaping process, that is, the bits that were logic "0" in the I data and the Q data are 2T. Indicated by a signal. On the other hand, after mixing, the logic " 1 " of the output signals of the first and second mute generators 118 and 120 is represented by a mute period (ie, no signal). As a result, logic "1" in the I data shown in FIG. 3C is represented by a 1T spread spectrum bit stream after mixing, logic "0" in the I data is represented by a spread spectrum bit stream of 2T, and is shown in FIG. 3C. Logic " 1 " in the Q data is represented by a mute section of 1T after mixing, and logic " 0 " in the Q data is represented by a mute section of 2T.

The preamble pattern generator 130 generates a preamble pattern for synchronization on the receiving side. An example of the preamble pattern is shown in FIG. 3K. As shown, in the embodiment, " 1110 " is used at the beginning of the frame and " 100 " is used at the end of the frame as the preamble pattern. The preamble pattern is also processed to display the waveform shaping, spread spectrum modulation, and mute interval in the same form as the signals input to the mixer 122. The preamble pattern may be used after being stored in a separate table. The formatting unit 132 adds a preamble pattern to the output signal of the mixer 122 and outputs a data frame having a format as shown in FIG. 3L.

The digital / analog converter 134 receives the data frame from the formatter 132 and performs digital / analog conversion, and outputs the converted signal to the power line 1 via the coupling circuit 20. The mute pattern extractor 136 detects the mute section in the data frame from the formatting unit 132 and supplies the enable signal to the spread spectrum receiver 50 that is activated only in the mute section.

Meanwhile, in another embodiment in which the spread spectrum transmitter 40 of FIG. 2 is modified, the formatting unit 132 may be inserted between the error correcting encoder 102 and the sorter. In addition, the mute pattern extractor 136 may also be disposed at another position. 4 shows an example of such an embodiment. In FIG. 4, the formatting unit 152 adds a preamble pattern to an error corrected coded signal, and causes a data frame to which the preamble pattern is added is modulated. In addition, the mute pattern extractor is implemented by a mixer 156 for mixing the output signals of the first and second mute generators 118 and 120.

5 shows an embodiment of the spread spectrum receiver 50 in more detail. The spread spectrum receiver 50 includes an analog / digital converter 200, a spread spectrum pattern storage unit 202, a correlator 204, a correlation coefficient setting unit 206, a correlation degree determination unit 208, and a logic determination unit ( 210, a preamble detector 212, an I / Q select switch 214, a combiner 216, and a serial / parallel converter 218.

The analog / digital converting unit 200 converts the frequency spread signal received from the power line 1 through the combining circuit 20 into a digital signal of two levels. Examples of waveforms of the input signal and the output signal of the analog / digital converter 200 are shown in FIGS. 6A and 6B, respectively. In the illustrated example, it is assumed that the signal shown in FIG. 3M is input as it is. Here, the spread spectrum receiver 50 may receive, demodulate and monitor a signal on the power line 1 only while the enable signal from the spread spectrum transmitter 40 is activated. In particular, in the present embodiment, the enable signal is supplied to the analog / digital converter 200, and it is determined whether the analog / digital converter 200 is operated according to the enable signal. On the other hand, while the enable signal is active even while the spread spectrum transmitter 40 is transmitting a signal, that is, when the transmit signal is a mute signal in the No Signal state, the spread spectrum receiver 50 receives a signal on the power line 1. Can be received, demodulated and monitored.

The spread pattern storage unit 202 stores the same spread pattern, that is, the PN sequence, used in the spread spectrum transmitter 40. Here, the PN sequence stored in the spread spectrum pattern storage unit 202 is stored in the form of a waveform when the analog signal is converted into an analog signal and then converted into a digital signal, that is, as shown in FIG. 6B.

The correlator 204 compares the digitally converted received signal with the spreading pattern from the spread spectrum pattern storage unit 202 and outputs a signal representing a correlation value. The correlation signal waveform is shown in FIG. 6C. The correlation coefficient setting unit 206 stores a correlation determination value for determining valid data bits in the correlation value signal. This determination value can be changed in response to a user's operation or a command from the application circuit 2 or the like. The correlation degree determining unit 208 compares the correlation value signal from the correlator 204 with the correlation determination value, and generates a correlation determination signal having a logic "1" only when the correlation value signal level is higher than the correlation determination value. Output A correlation determination signal is shown in FIG. 6D.

The logic determining unit 210 determines the logic level of the received data based on the temporal length t of the valid data bits in the correlation determination signal. Specifically, as shown in FIG. 6E, the logic determining unit 210 determines the logic level of the received data as "1" when 0 <t <T, and determines "0" when T <t <2T. If there is no valid data, that is, if t = 0, it is determined as a "mute" section. The preamble detector 212 receives the logic level data determined by the logic discriminator 210, and detects the start and end of the preamble pattern added by the transmitter 40. This preamble pattern is used as a synchronization signal in the I / Q selection switch 214.

The I / Q selection switch 214 separates the I and Q signals from the logic level data determined by the logic discriminating unit 210 in synchronization with the start and end portions of the preamble pattern. . The separated I and Q signals are shown in FIG. 6F. Decoupling unit 216 interleaves the I and Q signals to restore the original serial data. The error correction decoding unit 218 performs error correction decoding on the combined serial data, corrects an error introduced in the transmission process, and removes parity bits. The serial / parallel converter 220 converts the decoded serial data into parallel data.

On the other hand, in a normal state, that is, a state where no data collision occurs on the line, the mute signal should always be received for the Q signal output by the I / Q selection switch 214. Therefore, if there is a non-mute section, it indicates that a data collision has occurred. Therefore, the Q signal is supplied to the retransmission control section 60 as a collision detection signal.

FIG. 7 shows an embodiment of the retransmission controller 60 shown in FIG. 1. The retransmission control unit 60 includes a collision count counter 300, a calculator 302, a random number generator 304, an accumulator 306, and a delay time timer 308, which are implemented by a program manufactured by software or middleware. Can be. In FIG. 7, for convenience of description, the transmission buffer 30 and the spread spectrum transmitter 40 shown in FIG. 1 are shown together. As described above, the retransmission controller 60 transmits a signal from another application device through the spread spectrum receiver 50 when a data collision occurs on the power line 1, that is, while the spread spectrum transmitter 40 transmits a signal. When received, the data frame is retransmitted through the spread spectrum transmitter 40.

In FIG. 7, the collision count counter 300 receives the error information determined by the CRC check from the error correction decoding unit 218 of FIG. 5 and counts the collision count N. The operator 302 calculates a B = 2 ^p −1 value by subtracting 1 after calculating a binary value of 2 with P as a multiplier. The random number generator 304 finds a random number T having B as the maximum value. The integrator 306 multiplies the random number T by the total packet time length to the frame time length to obtain the delay time N. The delay time timer 308 counts the delay time N, and when the delay time is over, the transmission data stored in the transmission buffer 30 is retransmitted by the spread spectrum transmitter 40. This retransmission control process is executed repeatedly until no error occurs in the CRC check, thereby solving the problem caused by data collision. On the other hand, when the retransmission is completed during the data collision, the collision count counter 300 is reset.

However, even when using the retransmission control unit 60 of FIG. 7, there may be a disadvantage that communication efficiency may be very low due to a high possibility of collision and re-collision when many devices simultaneously perform data transmission. Therefore, in order to increase the transmission efficiency, a method of avoiding a collision is preferable. Therefore, in the present invention, as described above, data reception is not performed while data transmission is performed by providing the spread spectrum receiver 50 with a mute signal derived from Q data in the spread spectrum transmitter 40 as an enable signal. To be avoided. The spread spectrum receiver 50 basically outputs a collision detection signal (Q signal) that maintains a mute state in a state where there is no error. In another embodiment of the retransmission controller 60, the collision detection signal is used. By controlling the retransmission process quickly, data collisions can be avoided.

8 shows another embodiment of the retransmission controller 60 capable of performing such a function. The spread spectrum receiver 50 receives a signal only when the enable signal from the transmitter 40 is in the mute state, and if there is no data collision, the collision detection signal always maintains the mute state. If a frequency spread signal from another external device is received, the receiver 50 notifies the retransmission controller 60 of the data collision state through the collision detection signal, thereby promptly informing the collision state. The collision count counter 320 counts the collision count P from the collision detection signal. Since the functions and operations of the calculators 322 to the delay time timer 328 are similar to those in FIG. 7, detailed description thereof will be omitted. On the other hand, in the present invention, when it is determined that a data collision has occurred from the collision detection signal, the retransmission control unit 60 or the reception unit 50 causes the transmission unit 40 to transmit a portion not yet transmitted in the frame being transmitted. You can also control not to.

In FIG. 8, substantially the same collision with an external device occurs due to the separation of the I / Q signal, the Mute (No signal) processing of the Q signal, and the selective activation of the receiver 50 by the enable signal. Therefore, the retransmission control unit 60 can be simplified as shown in FIG.

The retransmission controller 60 of FIG. 9 includes an accumulator 340 and a delay time timer 342. When it is determined that a data collision has occurred from the collision detection signal, the accumulator 340 outputs a delay time N equal to the total packet time length to the frame time length to the delay time timer 342. The delay time timer 308 counts the delay time N, and when the delay time is over, the transmission data stored in the transmission buffer 30 is retransmitted by the spread spectrum transmitter 40.

Those skilled in the art to which the present invention pertains will understand that the present invention can be implemented in other specific forms without changing the technical spirit or essential features. Therefore, the above-described embodiments are to be understood as illustrative in all respects and not as restrictive. The scope of the present invention is shown by the following claims rather than the detailed description, and all changes or modifications derived from the meaning and scope of the claims and their equivalents should be construed as being included in the scope of the present invention. do.

As described above, the power line communication transceiver of the present invention makes it possible to retransmit data without detecting a collision of data in transmitting and receiving data through the power line without degrading communication efficiency. Since data is transmitted and received by spreading modulation, there is an advantage that high-speed data communication can be performed with high communication reliability. In particular, since the receiving unit is selectively activated by an enable signal that must basically maintain a mute state, there is an effect that data collision can be prevented and the structure of the retransmission controller can be simplified.

Claims (7)

In an application having a predetermined application circuit, a transceiver for transmitting data from the application circuit to another application through a power line and receiving the data from the other application and providing the application data to the application circuit. as, A transmitter for modulating the transmission data and outputting a modulated signal through the power line, and outputting an enable signal activated during a predetermined mute period; A receiver configured to detect and demodulate a signal level on the power line to restore the received data, supply the received data to the application, and activate only when the enable signal is activated; And Coupling circuitry for coupling the transmitter and receiver to the power line; Power line communication transceiver comprising a. The method of claim 1, wherein the transmitting unit A parallel / serial conversion unit which receives the transmission data in a parallel format and converts the transmission data into serial transmission data; Logical " 1 " of odd-numbered bits of the serial transmission data is represented by a 1T spread spectrum bit stream, and Logical " 0 " A modulation circuit for displaying a logic " 1 " in a mute section of 1T and a logic " 0 " of even-numbered bits in a mute section of 2T to generate a modulated signal; A formatting unit configured to output a framed signal by configuring a frame with respect to the modulated signal in a predetermined format; And A digital / analog converter configured to digitally / analog convert the framed signal; Power line communication transceiver comprising a. The method of claim 2, A mute pattern extraction unit configured to detect a predetermined mute period from the framed signal and output the enable signal activated only in the mute period; Power line communication transceiver further comprising. The method of claim 2, wherein the modulation circuit A sorter for classifying odd-numbered bits as in-phase data and even-numbered bits as quadrature data among the serial transmission data; A first separation unit generating a first in-phase signal representing a position of logic "1" in the in-phase data and a second in-phase signal representing a position of logic "0" in the in-phase data; A second separator for generating a first quadrature signal indicating a position of logic "1" in the quadrature data and generating a second quadrature signal indicating a position of logic "0" in the quadrature data; A first spreader for spread-modulating the first in-phase signal; A second spreader for spread-modulating the second in-phase signal; A first mute generator to shape a waveform of the first quadrature signal; A second mute generator for shaping the waveform of the second quadrature signal; And A mixer configured to synthesize the output signal of the first second spreader and the output signals of the first and second mute generators to output the modulated signal; Power line communication transceiver comprising a. The method of claim 4, wherein A mute pattern extracting unit configured to receive output signals of the first and second mute generating units and generate the enable signal indicating an interval in which the output signals of the first and second muting generating units are activated; Power line communication transceiver further comprising. The method of claim 2, wherein the receiving unit An analog / digital converter configured to detect a signal level on the power line and convert the signal level into digital received data; Correlation means for obtaining a correlation value between the digital received data and a predetermined spread spectrum pattern and outputting a correlation determination signal having a logic " 1 " only when the correlation value is higher than a predetermined determination value; A logic discriminating unit which determines a logic level of the received data as one of “1”, “0” and “mute” based on the temporal length of the valid data bit in the correlation determination signal; A selection switch for separating the in-phase signal and the quadrature signal from the logic level data determined by the logic discriminating unit; And A coupling unit interleaving the in-phase signal and the quadrature signal to output received serial data; Power line communication transceiver comprising a. The method according to any one of claims 1 to 6, A transmission buffer for temporarily storing the transmission data; And A retransmission controller which controls the transmission data stored in the transmission buffer to be retransmitted through the transmission unit when the reception data is received through the reception unit while the transmission unit is transmitting the transmission data; The receiver may further detect a data collision using the enable signal, and the retransmission controller may control the transmitter to stop transmission immediately when the collision is detected and retransmit again after a predetermined delay time. Power line communication transceiver controlled to.